Commit graph

56313 commits

Author SHA1 Message Date
Zack Rusin
562835bcdf llvmpipe: implement so_overflow query
Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2013-04-26 22:58:54 -04:00
Brian Paul
49dda2d92f mesa: fix the compressed TexSubImage size checking code
Before, we'd incorrectly generate an error if we we tried to
replace a non-4x4 block near the edge of a NPOT compressed texture.
For example, if the dest image was 15 texels wide and xoffset=12
and width=3 we'd incorrectly generate GL_INVALID_OPERATION.

Verified with new tests added to piglit s3tc-errors test.

Note: This is a candidate for the stable branches.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2013-04-26 16:22:30 -06:00
Brian Paul
ff74cf62b1 llvmpipe: replace LP_MAX_THREADS with screen->num_threads in query code
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2013-04-26 16:22:24 -06:00
Brian Paul
38a751cbe8 llvmpipe: bump LP_MAX_THREADS to 16
On the mesa-users list, Burlen Loring reported a speed-up with 16 cores
and his test/app.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2013-04-26 16:22:12 -06:00
Brian Paul
8fbc36ff48 mesa: updated read_buffer_enum_to_index() comment
Remove the part about the value of gl_framebuffer::Name.
2013-04-26 08:30:25 -06:00
Christian König
e3ac293daa r600/uvd: stop advertising MPEG4 on UVD 2.x chips v2
That is just not supported by the hardware.

v2: fix compare

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-26 15:35:36 +02:00
Christian König
2c2c54b819 radeon/uvd: stop using anonymous unions
Signed-off-by: Christian König <christian.koenig@amd.com>
2013-04-26 15:35:36 +02:00
Tapani Pälli
12b0bfa6e9 mesa: fix type comparison errors in sub-texture error checking code
patch fixes a crash that happens if glTexSubImage2D is called with a
negative xoffset.

NOTE: This is a candidate for stable branches.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2013-04-26 06:47:44 -06:00
José Fonseca
c5e8573762 Revert "draw: Yield zeros for LLVM fetches of non-existing vertex elements."
After more thought/discussion, it seems it is better to handle this sort
of stuff in the state tracker.

So this reverts commit 12096f334b, except the
variant->key -> key shorthands.
2013-04-26 12:15:39 +01:00
Chia-I Wu
5816a471af ilo: add the driver to the build system
Add ilo to targets/egl-static and add a new target dri-ilo.  Update autoconf
and automake rules.
2013-04-26 16:20:52 +08:00
Chia-I Wu
825aa60707 ilo: compile VS/GS/FS with the toy compiler 2013-04-26 16:20:52 +08:00
Chia-I Wu
7118ff8bb0 ilo: add a toy shader compiler
This is a simple shader compiler that performs almost zero optimizations.  The
generated code is usually much larger comparing to that generated by i965.
The generated code also requires many more registers.

Function-wise, it lacks register spilling and does not support most TGSI
indirections.  Other than those, it works alright.
2013-04-26 16:20:52 +08:00
Chia-I Wu
0fa2d0e98a ilo: hook up pipe context GPGPU functions
This just adds a stub.
2013-04-26 16:16:43 +08:00
Chia-I Wu
cf8f3dd373 ilo: hook up pipe context video functions
This just hooks them up with auxiliary/vl layer.
2013-04-26 16:16:43 +08:00
Chia-I Wu
12dd397d0c ilo: add support for time/occlusion/primitive queries 2013-04-26 16:16:43 +08:00
Chia-I Wu
e6186b0769 ilo: hook up pipe context 3D functions 2013-04-26 16:16:43 +08:00
Chia-I Wu
5b310f6230 ilo: add GEN7 support for 3D pipeline 2013-04-26 16:16:43 +08:00
Chia-I Wu
91ce766c35 ilo: add 3D pipeline for GEN6
The 3D pipeline is a high-level interface to emit 3D commands and states.  It
uses GEN6 GPE to do the real work.
2013-04-26 16:16:43 +08:00
Chia-I Wu
67233b56d6 ilo: add GEN7 GPE 2013-04-26 16:16:43 +08:00
Chia-I Wu
d3602dfac6 ilo: add GEN6 GPE
GEN6 GPE (Graphics Processing Engine) is a low-level interface to emit 3D
commands and states.
2013-04-26 16:16:43 +08:00
Chia-I Wu
72357cf3bb ilo: hook up pipe context query functions
None of the query types are supported yet.
2013-04-26 16:16:43 +08:00
Chia-I Wu
8f949bc1da ilo: hook up pipe context transfer functions 2013-04-26 16:16:42 +08:00
Chia-I Wu
0754ff33e3 ilo: hook up pipe context blit functions 2013-04-26 16:16:42 +08:00
Chia-I Wu
89d1702b9b ilo: hook up pipe context state functions 2013-04-26 16:16:42 +08:00
Chia-I Wu
520af66797 ilo: add functions to manage shaders
This commits add shader cache, shader state, shader variant, and etc.  It does
not add the shader compiler though.
2013-04-26 16:16:42 +08:00
Chia-I Wu
86940bf41c ilo: hook up pipe context flush function 2013-04-26 16:16:42 +08:00
Chia-I Wu
eed1e5a407 ilo: add command parser
The command parser manages batch buffers and command submissions.
2013-04-26 16:16:42 +08:00
Chia-I Wu
3a4a570c34 ilo: hook up pipe screen resource functions 2013-04-26 16:16:42 +08:00
Chia-I Wu
b50e68cb67 ilo: hook up pipe screen format functions 2013-04-26 16:16:42 +08:00
Chia-I Wu
babb2b5c50 ilo: hook up pipe_screen param and fence functions 2013-04-26 16:16:42 +08:00
Chia-I Wu
e74d67738d ilo: add debug flags settable through ILO_DEBUG 2013-04-26 16:16:42 +08:00
Chia-I Wu
63b5720105 ilo: new pipe driver for Intel GEN6+
This commit adds some boilerplate code.  The header files found under include/
are copied from i965.
2013-04-26 16:16:41 +08:00
Chia-I Wu
380e6875b8 winsys/intel: new winsys for intel
This is a wrapper for libdrm_intel to allow the pipe driver to stay OS
agnostic.
2013-04-26 15:49:00 +08:00
José Fonseca
542c5b3703 gallivm: Fix trivial out-of-bounds indirection in lp_build_cube_lookup().
Courtesy of clang:

  src/gallium/auxiliary/gallivm/lp_bld_sample.c:1483:10: warning: array index of '2' indexes past the end of an array (that contains 2 elements) [-Warray-bounds]
           tmp[2] = lp_build_swizzle_aos(coord_bld, ddx_ddy[1], swizzle02);
           ^   ~
  src/gallium/auxiliary/gallivm/lp_bld_sample.c:1430:10: note: array 'tmp' declared here
           LLVMValueRef ddx_ddy[2], tmp[2], rho_vec;
           ^
  src/gallium/auxiliary/gallivm/lp_bld_sample.c:1487:56: warning: array index of '2' indexes past the end of an array (that contains 2 elements) [-Warray-bounds]
              rho_vec = lp_build_add(coord_bld, rho_vec, tmp[2]);
                                                       ^   ~
  src/gallium/auxiliary/gallivm/lp_bld_sample.c:1430:10: note: array 'tmp' declared here
           LLVMValueRef ddx_ddy[2], tmp[2], rho_vec;
           ^
  src/gallium/auxiliary/gallivm/lp_bld_sample.c:1491:56: warning: array index of '2' indexes past the end of an array (that contains 2 elements) [-Warray-bounds]
              rho_vec = lp_build_max(coord_bld, rho_vec, tmp[2]);
                                                       ^   ~
  src/gallium/auxiliary/gallivm/lp_bld_sample.c:1430:10: note: array 'tmp' declared here
           LLVMValueRef ddx_ddy[2], tmp[2], rho_vec;
           ^
2013-04-26 08:44:37 +01:00
Matt Turner
0c1d87b0d7 i965/vs: Add support for LRP instruction.
Only 13 affected programs in shader-db, but they were all helped.

total instructions in shared programs: 368877 -> 368851 (-0.01%)
instructions in affected programs:     1576 -> 1550 (-1.65%)

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-04-25 18:27:39 -07:00
Matt Turner
c0f67a127b i965/vs: Add a function to fix-up uniform arguments for 3-src insts.
Three-source instructions have a vertical stride overloaded to 4, which
prevents directly using vec4 uniforms as arguments. Instead we need to
insert a MOV instruction to do the replication for the three-source
instruction.

With this in place, we can use three-source instructions in the vertex
shader. While some thought needs to go into deciding whether its better
to use a three-source instruction rather than a sequence of equivalent
instructions (when one or more sources are uniforms or immediates), this
will allow us to skip a lot of ugly lowering code and use the BFE and
BFI2 instructions directly.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-04-25 18:27:39 -07:00
Jerome Glisse
abb96fdea7 winsys/radeon: consolidate tracing into winsys v2
This move the tracing timeout and printing into winsys and add
an debug environement variable for it (R600_DEBUG=trace_cs).

Lot of file touched because of winsys API changes.

v2: Do not write lockup file if ib uniq id does not match last one

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
2013-04-25 18:36:31 -04:00
Tom Stellard
53fbae7eac r600g/compute: Removed unused and untested code
There was a lot of code in evergreen_compute_internal.c that was not
being used at all and most of it was duplicating code from other parts
of the driver.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-25 13:32:22 -07:00
Tom Stellard
f986087d5c r600g/compute: Use a constant buffer to store kernel parameters v2
v2:
  - Fix usage of set_constant_buffer()
  - Fix typo in comment

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
2013-04-25 13:32:17 -07:00
Tom Stellard
ffadc71afb r600g: Add evergreen_emit_cs_constant_buffers() v2
v2:
  - Bump R600_NUM_ATOMS

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Marek Olšák <maraeo@gmail.com>
2013-04-25 13:25:00 -07:00
Tom Stellard
83a00a1de8 r600g/compute: Don't use radeon_winsys::buffer_wait() after dispatching a kernel
The state tracker should be responsible for waiting for the kernel to
finish.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-25 13:24:51 -07:00
Tom Stellard
09e47f7a25 r600g/compute: Fix input buffer size calculation
Buffer size should be in bytes not dwords.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-25 13:24:24 -07:00
Adam Jackson
904b03824b linux: Don't emit a .note.ABI-tag section anymore (#26663)
We don't support pre-2.6 kernels anyway - the install docs say 2.6.28
for DRI - and apparently this confuses ld.so's sorting when multiple
libGLs are installed.  Just remove it.

Note: this is a candidate for the stable branches.

Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2013-04-25 15:51:35 -04:00
Rob Clark
73de07cbbc freedreno: use writecombine buffers
Better than uncached for writes, which are common for vertex buffer
upload, etc.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-04-25 15:10:56 -04:00
Rob Clark
f706d4d340 freedreno: don't patch and re-emit same shader as much
New textures or vertex buffers don't always require patching and
re-emitting the shaders.  So do a better job of figuring out when we
actually have to patch the shader.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2013-04-25 15:10:56 -04:00
Eric Anholt
578987ce1c i965: Avoid recompiles for fragment clamping on non-clamping APIs.
Removes 75/78 state-dependent recompiles in GLB2.7 (the remaining 3 are
due to FBO-rendering size predictions).  We currently expose
GL_ARB_color_buffer_float on GL core, so we may mis-predict there, but I'm
about to send a patch for removing that silly extension in that case.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-04-25 12:03:00 -07:00
Alex Deucher
b5145ca2a8 radeonsi: add new SI pci ids
Note: this is a candidate for the 9.1 branch.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-25 14:22:46 -04:00
Alex Deucher
b3a856dfa9 r600g: add new richland pci ids
Note: this is a candidate for the stable branches.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2013-04-25 14:21:15 -04:00
José Fonseca
12096f334b draw: Yield zeros for LLVM fetches of non-existing vertex elements.
If a bug in an app/stater-tacker causes vertex buffer to fetch vertex
elements that are not bound, simply return zeros instead of crashing.

Reviewed-by: Brian Paul <brianp@vmware.com>
2013-04-25 16:16:21 +01:00
José Fonseca
28e6a272fc trace: Only close trace files on exit.
Many applications don't exit cleanly, others may create and destroy a
screen multiple times, so we only write </trace> tag and close at exit
time.
2013-04-25 14:18:33 +01:00