HTILE must be decompressed for partial resolves when the hw doesn't
write the decompressed DWORD to HTILE. The driver must also
synchronize the depth/stencil expand if using graphics (the compute
path is already correctly synchronized in the helper).
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39805>
Metal exposes helper invocation via function call and does not have a
value for this.
Reviewed-by: Arcady Goldmints-Orlov <arcady@lunarg.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39802>
Caught through VVL test NegativeWsi.SwapchainImageFormatList. The test
would try to create a swapchain with a color space from
VK_EXT_swapchain_colorspace without enabling the extension. This is
because wsi would expose those color spaces even when the extension was
not enabled.
Fixes: fd045ac99c ("wsi/metal: add support for color spaces")
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39797>
VK_KHR_android_surface is implemented by the Android platform Vulkan
loader rather than Mesa.
Mesa drivers on Android already expose the extension.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39856>
Follows what other drivers do, if we do not need to emit a draw, just
bail out early.
Signed-off-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39783>
Turing changed how draws are handled, let's use the new methods.
Seems to have the same performance characteristics as before so far.
Signed-off-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39783>
We effectively only use it to specify the draw topology and we are going
to use Turing new draw methods soon.
Signed-off-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39783>
This should not change anything apart from making it match the ordering
we have everywhere else.
Signed-off-by: Mary Guillemard <mary@mary.zone>
Reviewed-by: Mel Henning <mhenning@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39783>
Right now all the drivers align push data to GRF (32B pre Xe2, 64B
post Xe2) but the push constant delivery mechanism can actually pack
32B ranges so alignment is not required.
Off course we need the push UBO masking to deal with unaligned pushed
ranges.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Calder Young <cgiacun@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
We're currently using 2 address formats for accessing descriptor
buffers (regardless of whether EXT_descriptor_buffer is used).
nir_address_format_64bit_global_32bit_offset is used with bindless
shaders or nir_address_format_32bit_index_offset otherwise.
When using nir_address_format_32bit_index_offset, the layout pass
insert vec2(surface, offset) values in the shader to access the
descriptor buffers. With surface being the binding table entry of the
descriptor. The binding table is packed and might also contain render
targets so there is no equality mapping between the binding table
index and the descriptor set index. For example with we could have a
binding table like this :
- BT0 : render target 0
- BT1 : render target 1
- BT2 : descriptor buffer 0
- BT3 : descriptor buffer 4
In the next commit we will stop using a binding table entry to access
descriptor buffers on Gfx12.5+ and we will need the descriptor set
index access the descriptor data.
So in this commit we introduce a remapping in NIR to do the descriptor
set index to binding table entry mapping. The mapping table is a vec8
put at the beginning of the functions and the value from the vector is
extracted when loading data from the descriptor buffer
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
Will use the load/store_ssbo with nir_resource_intel_internal later in
this series.
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
A descriptor buffer promoted to push constants requires a constant
cache invalidation if it is modified on the device.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
Document the already implemented extenstions that were missing, and
update the comment for a promoted extension.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39823>
When running ci_run_n_monitor, the following error is seen,
gql.transport.exceptions.TransportQueryError: Error while fetching schema: {'message': 'Internal server error'}
If you don't need the schema, you can try with: "fetch_schema_from_transport=False"
Set fetch_schema_from_transport=False to avoid this failure.
Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39845>
It's not really usefull and only works for H264/5.
On AV1/VP9 it would cause hang.
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
This will be used for texture -> texture copy in next commit, to copy
DPB (layered texture with multiple planes). It needs to use buffer copy,
because VCN expects interleaved layers.
(layer0_plane0, layer0_plane1, layer1_plane0, layer1_plane1, ...).
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
