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anv: remove set index for descriptor buffers

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We can check the shader's layout_type.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35160>
This commit is contained in:
Lionel Landwerlin 2026-01-08 12:49:01 +02:00 • committed by Marge Bot
parent c6bbf6dff4
commit 812b62a315
6 changed files with 58 additions and 72 deletions
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5
src/intel/vulkan/anv_nir_apply_pipeline_layout.c
View file

@ -2238,10 +2238,7 @@ build_packed_binding_table(struct apply_pipeline_layout_state *state,
} else if (state->set[s].desc_buffer_used) {
map->surface_to_descriptor[map->surface_count] =
(struct anv_pipeline_binding) {
.set = (state->bind_map->layout_type ==
ANV_PIPELINE_DESCRIPTOR_SET_LAYOUT_TYPE_BUFFER) ?
ANV_DESCRIPTOR_SET_DESCRIPTORS_BUFFER :
ANV_DESCRIPTOR_SET_DESCRIPTORS,
.set = ANV_DESCRIPTOR_SET_DESCRIPTORS,
.binding = UINT32_MAX,
.index = s,
};

3
src/intel/vulkan/anv_nir_push_descriptor_analysis.c
View file

@ -137,8 +137,7 @@ anv_nir_loads_push_desc_buffer(nir_shader *nir,
const struct anv_pipeline_binding *binding =
&bind_map->surface_to_descriptor[bt_idx];
if ((binding->set == ANV_DESCRIPTOR_SET_DESCRIPTORS ||
binding->set == ANV_DESCRIPTOR_SET_DESCRIPTORS_BUFFER) &&
if (binding->set == ANV_DESCRIPTOR_SET_DESCRIPTORS &&
binding->index == push_set) {
return BITFIELD_BIT(push_set);
}

3
src/intel/vulkan/anv_private.h
View file

@ -1054,8 +1054,7 @@ VkResult anv_reloc_list_append(struct anv_reloc_list *list,
/* Shaders */
#define ANV_DESCRIPTOR_SET_PER_PRIM_PADDING (UINT8_MAX - 5)
#define ANV_DESCRIPTOR_SET_DESCRIPTORS_BUFFER (UINT8_MAX - 4)
#define ANV_DESCRIPTOR_SET_PER_PRIM_PADDING (UINT8_MAX - 4)
#define ANV_DESCRIPTOR_SET_NULL (UINT8_MAX - 3)
#define ANV_DESCRIPTOR_SET_PUSH_CONSTANTS (UINT8_MAX - 2)
#define ANV_DESCRIPTOR_SET_DESCRIPTORS (UINT8_MAX - 1)

6
src/intel/vulkan/anv_shader.c
View file

@ -285,12 +285,6 @@ get_shader_bind_map_text(const struct anv_shader *shader)
fprintf(stream, "Vulkan push constants and API params");
break;
case ANV_DESCRIPTOR_SET_DESCRIPTORS_BUFFER:
fprintf(stream, "Descriptor buffer (desc buffer) for set %d (start=%dB)",
bind_map->push_ranges[i].index,
bind_map->push_ranges[i].start * 32);
break;
case ANV_DESCRIPTOR_SET_DESCRIPTORS:
fprintf(stream, "Descriptor buffer for set %d (start=%dB)",
bind_map->push_ranges[i].index,

48
src/intel/vulkan/genX_cmd_buffer.c
View file

@ -2686,34 +2686,32 @@ emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
bt_map[s] = surface_state.offset + state_offset;
break;
case ANV_DESCRIPTOR_SET_DESCRIPTORS: {
struct anv_descriptor_set *set =
pipe_state->descriptors[binding->index];
case ANV_DESCRIPTOR_SET_DESCRIPTORS:
if (shader->bind_map.layout_type == ANV_PIPELINE_DESCRIPTOR_SET_LAYOUT_TYPE_BUFFER) {
assert(pipe_state->descriptor_buffers[binding->index].state.alloc_size);
bt_map[s] = pipe_state->descriptor_buffers[binding->index].state.offset +
state_offset;
} else {
struct anv_descriptor_set *set =
pipe_state->descriptors[binding->index];
/* If the shader doesn't access the set buffer, just put the null
* surface.
*/
if (set->is_push && shader->push_desc_info.push_set_buffer == 0) {
bt_map[s] = 0;
break;
/* If the shader doesn't access the set buffer, just put the null
* surface.
*/
if (set->is_push && shader->push_desc_info.push_set_buffer == 0) {
bt_map[s] = 0;
break;
}
/* This is a descriptor set buffer so the set index is actually
* given by binding->binding. (Yes, that's confusing.)
*/
assert(set->desc_surface_mem.alloc_size);
assert(set->desc_surface_state.alloc_size);
bt_map[s] = set->desc_surface_state.offset + state_offset;
add_surface_reloc(cmd_buffer, anv_descriptor_set_address(set));
}
/* This is a descriptor set buffer so the set index is actually
* given by binding->binding. (Yes, that's confusing.)
*/
assert(set->desc_surface_mem.alloc_size);
assert(set->desc_surface_state.alloc_size);
bt_map[s] = set->desc_surface_state.offset + state_offset;
add_surface_reloc(cmd_buffer, anv_descriptor_set_address(set));
break;
}
case ANV_DESCRIPTOR_SET_DESCRIPTORS_BUFFER: {
assert(pipe_state->descriptor_buffers[binding->index].state.alloc_size);
bt_map[s] = pipe_state->descriptor_buffers[binding->index].state.offset +
state_offset;
break;
}
default: {
assert(binding->set < MAX_SETS);

65
src/intel/vulkan/genX_cmd_draw.c
View file

@ -167,23 +167,22 @@ get_push_range_address(struct anv_cmd_buffer *cmd_buffer,
{
struct anv_cmd_graphics_state *gfx_state = &cmd_buffer->state.gfx;
switch (range->set) {
case ANV_DESCRIPTOR_SET_DESCRIPTORS: {
/* This is a descriptor set buffer so the set index is
* actually given by binding->binding. (Yes, that's
* confusing.)
*/
struct anv_descriptor_set *set =
gfx_state->base.descriptors[range->index];
return anv_descriptor_set_address(set);
}
case ANV_DESCRIPTOR_SET_DESCRIPTORS_BUFFER: {
return anv_address_from_u64(
anv_cmd_buffer_descriptor_buffer_address(
cmd_buffer,
gfx_state->base.descriptor_buffers[range->index].buffer_index) +
gfx_state->base.descriptor_buffers[range->index].buffer_offset);
}
case ANV_DESCRIPTOR_SET_DESCRIPTORS:
if (shader->bind_map.layout_type == ANV_PIPELINE_DESCRIPTOR_SET_LAYOUT_TYPE_BUFFER) {
return anv_address_from_u64(
anv_cmd_buffer_descriptor_buffer_address(
cmd_buffer,
gfx_state->base.descriptor_buffers[range->index].buffer_index) +
gfx_state->base.descriptor_buffers[range->index].buffer_offset);
} else {
/* This is a descriptor set buffer so the set index is
* actually given by binding->binding. (Yes, that's
* confusing.)
*/
struct anv_descriptor_set *set =
gfx_state->base.descriptors[range->index];
return anv_descriptor_set_address(set);
}
case ANV_DESCRIPTOR_SET_PUSH_CONSTANTS: {
if (gfx_state->base.push_constants_state.alloc_size == 0) {
@ -248,22 +247,22 @@ get_push_range_bound_size(struct anv_cmd_buffer *cmd_buffer,
assert(shader->vk.stage != MESA_SHADER_COMPUTE);
const struct anv_cmd_graphics_state *gfx_state = &cmd_buffer->state.gfx;
switch (range->set) {
case ANV_DESCRIPTOR_SET_DESCRIPTORS: {
struct anv_descriptor_set *set =
gfx_state->base.descriptors[range->index];
struct anv_state state = set->desc_surface_mem;
assert(range->start * 32 < state.alloc_size);
assert((range->start + range->length) * 32 <= state.alloc_size);
return state.alloc_size;
}
case ANV_DESCRIPTOR_SET_DESCRIPTORS_BUFFER:
/* It's hard to bound a reference to a descriptor buffer because we
* don't have an actual buffer, only an address. So just return the
* maximum size of the heap (which bounds the largest buffer size).
*/
return anv_physical_device_bindless_heap_size(
cmd_buffer->device->physical, true);
case ANV_DESCRIPTOR_SET_DESCRIPTORS:
if (shader->bind_map.layout_type == ANV_PIPELINE_DESCRIPTOR_SET_LAYOUT_TYPE_BUFFER) {
/* It's hard to bound a reference to a descriptor buffer because we
* don't have an actual buffer, only an address. So just return the
* maximum size of the heap (which bounds the largest buffer size).
*/
return anv_physical_device_bindless_heap_size(
cmd_buffer->device->physical, true);
} else {
struct anv_descriptor_set *set =
gfx_state->base.descriptors[range->index];
struct anv_state state = set->desc_surface_mem;
assert(range->start * 32 < state.alloc_size);
assert((range->start + range->length) * 32 <= state.alloc_size);
return state.alloc_size;
}
case ANV_DESCRIPTOR_SET_NULL:
case ANV_DESCRIPTOR_SET_PUSH_CONSTANTS: