Commit graph

192875 commits

Author SHA1 Message Date
Samuel Pitoiset
81b1e8356c radv: fix assigning mesh shader outputs when clip/cull distances are read in FS
The per-primitive output offsets need to be recomputed.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31224>
(cherry picked from commit 5c897d00ef)
2024-09-23 17:24:25 +02:00
Lucas Fryzek
3799f13b32 egl/dri/wl: Move swrast damage region from put to swap
Pass application provided damage region to the compositor instead
of damaging the entire display. This also gives us the possibility
in the future to have put image only copy the parts of the framebuffer
that were modified.

Fixes: fa465e34ca
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31210>
(cherry picked from commit 32af15384d)
2024-09-23 17:24:25 +02:00
Lucas Fryzek
36fb8e658a drisw: Copy entire buffer ignoring damage regions
swapping buffers with damage is supposed to swap the entire buffer
and only pass the damage region as a hint to compositor as to what
updated. This change forces drisw to copy the entire buffer as there
is no method right now to check what was updated.

Fixes: cda627eb48
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31210>
(cherry picked from commit 755e795e4c)
2024-09-23 17:24:25 +02:00
Konstantin Seurer
d19704bf7c radv: Initialize sqtt state before meta state
Sqtt needs to be initialized before BVH build pipelines are compiled to
avoid crashes on startup.

Fixes: 5fa22f9 ("radv: regroup all tools initialization in one helper")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31207>
(cherry picked from commit 60c53f5e63)
2024-09-23 17:24:25 +02:00
Lionel Landwerlin
9c20fdda31 brw: fix virtual register splitting to not go below physical register size
Otherwise we can end up generating invalid assembly not following
destination/source alignments requirements.

Fixes the following tests:

dEQP-VK.spirv_assembly.instruction.graphics.float16.arithmetic_4.tan_frag
dEQP-VK.spirv_assembly.instruction.graphics.float16.arithmetic_2.tan_frag
dEQP-VK.spirv_assembly.instruction.graphics.float16.arithmetic_1.tan_frag
dEQP-VK.spirv_assembly.instruction.graphics.float16.arithmetic_3.tan_frag

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Backport-to: 24.2
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31206>
(cherry picked from commit ed64eccab0)
2024-09-23 17:24:25 +02:00
Eric Engestrom
809659266d .pick_status.json: Mark 4b51a2c9da as denominated 2024-09-23 17:24:25 +02:00
Eric Engestrom
2f14dd8654 .pick_status.json: Update to 00c94e0cd4 2024-09-23 17:02:33 +02:00
Eric Engestrom
ebd2c2e668 docs: add sha sum for 24.2.3 2024-09-18 19:17:33 +02:00
Eric Engestrom
b235da6781 VERSION: bump for 24.2.3 2024-09-18 18:30:19 +02:00
Eric Engestrom
8a1843d345 docs: add release notes for 24.2.3 2024-09-18 18:28:24 +02:00
Samuel Pitoiset
b9fd84e942 radv: fix lowering VS inputs when offset >= stride on GFX6-7
This was supposed to be >=.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31209>
(cherry picked from commit ad3e6bb06a)
2024-09-18 10:28:07 +02:00
Samuel Pitoiset
0a9bd16602 radv,aco: fix legacy vertex attributes when offset >= stride on GFX6-7
The indexing needs to be adjusted and the best solution seems to
use soffset instead of const_offset, it's simpler and generate less
prologs than passing the vertex binding strides to the prolog.

Fixes dEQP-VK.pipeline.*.vertex_input.legacy_vertex_attributes.*stride_1*.

Fixes: 38cbc3c605 ("radv: advertise VK_EXT_legacy_vertex_attributes")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31209>
(cherry picked from commit 15b1790a1e)
2024-09-18 10:25:53 +02:00
Georg Lehmann
f35ed83b82 nir/instr_set: fix fp_fast_math
We can't just ignore the flags of the match, we need the union.

Fixes: 666647acae ("nir: track some float controls bits per instruction")

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31195>
(cherry picked from commit a3d6a770c0)
2024-09-18 10:25:52 +02:00
David Rosca
cb29f5e0a7 radeonsi: Disable EFC on VCN 2.2
VCN 2.2 doesn't support EFC.

Cc: mesa-stable

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31198>
(cherry picked from commit 009017c33c)
2024-09-18 10:25:50 +02:00
Eric Engestrom
318f75ef7f .pick_status.json: Update to ad3e6bb06a 2024-09-18 10:25:47 +02:00
Lionel Landwerlin
0722d2a0ae brw: fix vecN rebuilds
When loading a 64bit address from the push constants, we'll load a
vec2, so we need to allocate 2 GRFs and MOV each component.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11831
Fixes: 339630ab05 ("brw: enable A64 loads source rematerialization")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31010>
(cherry picked from commit 45377dc5c4)
2024-09-17 17:13:38 +02:00
Lionel Landwerlin
00c6a487d5 brw: use a builder of the size of the physical register for uniforms
Should avoid any partial write non-sense on Xe2+.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 339630ab05 ("brw: enable A64 loads source rematerialization")
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31010>
(cherry picked from commit c16b27f66f)
2024-09-17 17:13:37 +02:00
Tapani Pälli
a0da2bc120 iris: fix issues with memory object updates via glBufferSubData
Disable aysnc mapping in case we are updating a external memobj.

Fixes following Piglit tests:
   spec@ext_external_objects@vk-pix-buf-update-errors
   spec@ext_external_objects@vk-vert-buf-update-errors

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29303>
(cherry picked from commit 0e02de5a50)
2024-09-17 17:13:37 +02:00
Samuel Pitoiset
2e32cdaf65 radv: fix lowering the view index to an input varying for FS
When multiview is used and the FS is compiled separately with GPL, the
view index still needs to be lowered, otherwise it's crashing later.

The lowering doesn't need to know the previous stage because ViewIndex
is a global thing (ie. it's neither a per-vertex or a per-primitive
varying).

This fixes recent
dEQP-VK.pipeline.pipeline_library.graphics_library.misc.other.view_index_from_device_index_*_pre_rasterization

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31192>
(cherry picked from commit 656d7e887a)
2024-09-17 17:13:36 +02:00
Eric Engestrom
4440f16c6e .pick_status.json: Update to 45377dc5c4 2024-09-17 17:13:35 +02:00
Samuel Pitoiset
cab8b6df28 radv/rt: skip shaders cache for pipelines created with the capture/replay flag
Otherwise, if a pipeline is found in cache it will use a different
shader arena for allocation and the capture replay shader group handles
won't match.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31188>
(cherry picked from commit f88cf56087)
2024-09-17 17:12:18 +02:00
Rohan Garg
54630d224c intel/compiler: use the correct cache enum for loads and stores
Fixes: 74efde7 ('intel/brw/xehp+: Drop redundant arguments of lsc_msg_desc*()')

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30742>
(cherry picked from commit daea7e1651)
2024-09-16 20:52:34 +02:00
David Heidelberg
e961135ed7 ci/freedreno: move disabled a530 entries back to main gitlab-ci.yml
Fixes: 9442571664 ("ci: separate hiden jobs to -inc.yml files")
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31177>
(cherry picked from commit 52c014a453)
2024-09-16 20:52:05 +02:00
llyyr
c489fe8d1d vulkan/wsi/wayland: fix suboptimal flag being ignored with explicit sync
Signed-off-by: llyyr <llyyr.public@gmail.com>
Fixes: 5f7a5a27ef ("wsi: Implement linux-drm-syncobj-v1")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31122>
(cherry picked from commit 5450306a36)
2024-09-16 20:51:56 +02:00
Dylan Baker
7e5192cbea anv: if queue is NULL in vm_bind return early
In the error handling path we end up creating a vk_sync and then later
we vk_sync_wait() on it. If that wait fails somehow we'll end up calling
vk_queue_set_lost(&queue->vk, ...) which would segfault if queue is
NULL.

If we end up in this situation (no queue), return directly whatever the
backend's vm_bind function returned, propagating the error up if
necessary.

Fixes: dd5362c78a ("anv/xe: try harder when the vm_bind ioctl fails")
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31048>
(cherry picked from commit ed8d1d3c9b)
2024-09-16 20:51:46 +02:00
Dylan Baker
486539be66 iris: Run checks that do not require resources before creating them
This avoids the need to free the resource if we decide to return early.

Fixes: c8df09ebd4 ("iris: More gracefully fail in resource_from_user_memory")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30306>
(cherry picked from commit 0422eed255)
2024-09-16 20:44:43 +02:00
Lucas Stach
4cb4dc1b88 etnaviv: emit all PA shader attributes
While the rnndb fix increased the size of the driver internal
structures to be able to hold all data for the currently supported
number of varyings, it didn't change the state emission, so only
a subset of the PA shader attribute states was emitted.

Use the define from rnndb to avoid such inconsistencies.

Fixes: 11ffb20b70 ("etnaviv: Update headers from rnndb")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31032>
(cherry picked from commit a71003b1b8)
2024-09-16 20:44:42 +02:00
Konstantin Seurer
b73ffb6bfe radv: Work around broken terrain in Warhammer III
Hiding storage support for depth formats forces the game to take a
different, working path for terrain height map initialization.

cc: mesa-stable

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31152>
(cherry picked from commit bacf9752f4)
2024-09-16 20:44:41 +02:00
Rhys Perry
7f69a4901c nir/opt_loop: skip peeling if the loop ends with any kind of jump
Any kind of jump prevents us from moving it to the top of the loop, not
just breaks.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 6b4b044739 ("nir/opt_loop: add loop peeling optimization")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31002>
(cherry picked from commit 64ac601049)
2024-09-16 20:44:40 +02:00
Rhys Perry
1e0d723ccd nir/opt_loop: skip peeling if the break is non-trivial
If this nir_if contains continues or other breaks, we can't move it
outside the loop.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 6b4b044739 ("nir/opt_loop: add loop peeling optimization")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31002>
(cherry picked from commit af3b099e0a)
2024-09-16 20:44:39 +02:00
Rhys Perry
618c4c127d nir/opt_if: fix fighting between split_alu_of_phi and peel_initial_break
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 6b4b044739 ("nir/opt_loop: add loop peeling optimization")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11822
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31002>
(cherry picked from commit 4f44a944bb)
2024-09-16 20:44:38 +02:00
Georg Lehmann
be004d4797 nir/opt_sink: do not sink inverse_ballot out of loops
Inverse_ballot result is undefined if the input is not dynamically uniform.
And sinking out of loops might make the input divergent.

Fixes: 18a0ff137f ("nir: sink/move inverse_ballot like moves")

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30906>
(cherry picked from commit 91f8e32a85)
2024-09-16 20:44:37 +02:00
Georg Lehmann
ce70d51e83 nir/opt_sink: do not sink load_ubo_vec4 out of loops
Same reason as for load_ubo.

Fixes: d199d65c3a ("nir/nir_opt_move,sink: Include load_ubo_vec4 as a load_ubo instr.")

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30906>
(cherry picked from commit 1ec3cc2aed)
2024-09-16 20:44:36 +02:00
Kenneth Graunke
099de7a954 intel/brw: Use NUM_BRW_OPCODES in can_omit_write() check
The intention here is to detect ALU hardware instructions, but not
virtual instructions that haven't been explicitly whitelisted.

For some reason we had arbitrarily hardcoded 128 here, but our virtual
opcodes don't start at 128.  They start at NUM_BRW_OPCODES.  So, use
that instead.

This prevents regressions later when we delete some opcodes, shifting
some virtual opcodes into the 72-128 range.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30828>
(cherry picked from commit ab0b9b6792)
2024-09-16 20:44:35 +02:00
Dave Airlie
4a8d3debcc radv/video/enc: report pps overrides in feedback for h265
radv does change h265 usually so report in feedback info.

Fixes: 967e4e09de ("radv/video: add h265 encode support")
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31135>
(cherry picked from commit 7c6e3c70b6)
2024-09-16 20:44:33 +02:00
Dave Airlie
cb191d1b52 radv/video: fix encode reference slot counting
This needs the max of slot indices.

Fixes: 54d499818c ("radv/video: add initial support for encoding with h264.")
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31135>
(cherry picked from commit 8d08e92199)
2024-09-16 20:44:32 +02:00
Dave Airlie
80c9ca152b radv: Fix radeon_enc_code_ue with values over 2^16
This ports this fixes from radeonsi:

138ba42a87 ("radeonsi/vcn: Fix radeon_enc_code_ue with values over 2^16")

Cc: mesa-stable
Reviewed-by: Lynne <dev@lynne.ee>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31135>
(cherry picked from commit e89f4a48fd)
2024-09-16 20:44:31 +02:00
Mike Blumenkrantz
45e15734e3 zink: fix sparse bo deallocation
this loop was not correctly iterating the dynarray

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31124>
(cherry picked from commit bb16203a8d)
2024-09-16 20:44:29 +02:00
David Heidelberg
1efb5eb63b freedreno/ir3: Use nir_lower_mem_access_bit_sizes instead custom lowering
- More robust.
 - Handles properly UBO cases, needed for proper OpenCL support (rusticl).
 - Resolved KHR-GL46.gpu_shader_fp64.fp64.max_uniform_components failure.

Fixes: f5ce806ed7 ("freedreno/ir3: Add wide load/store lowering")
Reviewed-by: Rob Clark <robdclark@freedesktop.org>
Co-authored-by: Rob Clark <robclark@freedesktop.org>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30961>
(cherry picked from commit 78a121b8cf)
2024-09-16 20:44:27 +02:00
Boris Brezillon
4342a4eab9 pan/kmod: Don't cap VM bind operations to one
Looks like some leftovers from a debugging session.

Fixes: 97f6a62f7e ("pan/kmod: Add a backend for panthor")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: John Anthony <john.anthony@arm.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30969>
(cherry picked from commit 2149a04de3)
2024-09-16 20:40:45 +02:00
Sviatoslav Peleshko
a62057173f mesa: Reset vbo attributes after flushing them to Current in glPopAttrib
Fixes: 2fe771f4 ("vbo: use FlushVertices flags properly and clear NeedFlush correctly")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11498
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31107>
(cherry picked from commit 1aa7218a1f)
2024-09-16 20:40:44 +02:00
David Rosca
8a96aa9adf targets/vdpau: Build vdpau driver into libgallium when building with dri
Currently vdpau driver and dri driver are two separate libraries, when
radeonsi is enabled both libraries contain amdgpu winsys. radeonsi
needs shared winsys to ensure sync between OpenGL and VDPAU works.
Build vdpau driver into libgallium to avoid having two instances of amdgpu
winsys.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31079>
(cherry picked from commit b6faf586e6)
2024-09-16 20:32:35 +02:00
David Rosca
b51ea6a445 targets/va: Build va driver into libgallium when building with dri
Currently va driver and dri driver are two separate libraries, when
radeonsi is enabled both libraries contain amdgpu winsys. radeonsi
needs shared winsys to ensure sync between OpenGL and VAAPI works.
Build va driver into libgallium to avoid having two instances of amdgpu
winsys.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11598
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31079>
(cherry picked from commit 212d57f7e6)
2024-09-16 20:31:52 +02:00
David Rosca
dcaf22d01c meson/megadriver: Add megadriver_libdir argument
To be able to install symlinks to megadriver in different directory.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31079>
(cherry picked from commit 39f7ed5412)
2024-09-16 20:24:01 +02:00
Iván Briano
9e93ce2d1f anv: be consistent about aux usage with modifiers
In c1a7d520f3, we disabled AUX usage for imported images when they are
using an explicit modifier that doesn't support it.
We need to do the same when the modifier is picked by the driver,
otherwise the memory requirements reported for an exported image don't
match those we report for import.

Fixes: c1a7d520f3 ("anv: Disable aux if the explicit modifier lacks it")

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31051>
(cherry picked from commit e4ee0a2ce1)
2024-09-16 20:23:58 +02:00
Mike Blumenkrantz
e66946ff0f zink: delete erroneous kopper assert
certain present modes aren't supported by zink,
but that doesn't mean the driver needs to crash if
the driver supports them

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31121>
(cherry picked from commit 3db1a91bfe)
2024-09-16 20:23:49 +02:00
David Heidelberg
49a6ecb59d nir_lower_mem_access_bit_sizes: Assert when 0 components or bits are requested
Prevent the accidental passing of 0 components or bits, as it makes no sense.

Cc: mesa-stable
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Suggested-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31103>
(cherry picked from commit 6bf7b5bcd8)
2024-09-16 20:23:48 +02:00
Dave Airlie
8df5f285f3 radv/video: handling encoding both sps and pps in same buffer
This API should allow encoding these back to back into the same
buffer, so handle it properly.

Cc: mesa-stable
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31086>
(cherry picked from commit 7531f6fd9c)

[Eric: drop anv changes, as 3ec8f7f995 "anv/video: initial
support for h264 encoding" is not in 24.2]
2024-09-16 20:23:25 +02:00
Dave Airlie
a3a75c63ef vl/bitstream: use an int32_t for se encoding.
This seems to fix a bug found with radv and ffmpeg encoding

Fixes: 1782ab4d8b ("util: add a bitstream encoder for video stream headers.")
Acked-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31086>
(cherry picked from commit 62320232de)
2024-09-16 19:11:56 +02:00
Jordan Justen
fd84af2509 intel/dev: Fix warning for max_threads_per_psd when devinfo->verx10 == 120
Although we don't want to rely on hwconfig for devinfo->verx10 == 120,
due to the dependence on closed source software, we do check to see if
hwconfig reports different values in the DEVINFO_HWCONFIG macro.

Matt was seeing this warning on 8086:a7a0:

> MESA: warning: INTEL_HWCONFIG_TOTAL_PS_THREADS (128) != devinfo->max_threads_per_psd (64)

Reported-by: Matt Turner <mattst88@gmail.com>
Fixes: 3e4f73b3a0 ("intel/dev: Update hwconfig => max_threads_per_psd for Xe2")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31077>
(cherry picked from commit c5c349a690)
2024-09-16 19:11:56 +02:00