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Author SHA1 Message Date
Marek Olšák
2b2093961e radeonsi/gfx10: enable primitive binning by default 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
9f68367d19 radeonsi/gfx10: implement primitive binning 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
4e56a2aaa8 radeonsi: simplify primitive binning enablement 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
3521297251 radeonsi: set primitive binning tunables for dGPUs 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
d7e80ba1e7 radeonsi: set FLUSH_ON_BINNING_TRANSITION when needed 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
9dbe63ceea radeonsi/gfx10: use the new scan converter when binning is disabled 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
80b3f4b4bd radeonsi/gfx9: fix an oversight in primitive binning code 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
1f53a3e766 radeonsi: use BREAK_BATCH instead of FLUSH_DFSM when CB_TARGET_MASK changes 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
605900d7dd radeonsi/gfx10: don't expose unimplemented PIPE_CAP_QUERY_SO_OVERFLOW 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
270a8ab648 radeonsi/gfx10: launch 2 compute waves per CU before going onto the next CU 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
ab1f36a1d3 radeonsi/gfx10: set more registers and fields 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
9b65f6618c radeonsi/gfx10: enable LATE_ALLOC_GS 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
4985c3ee22 radeonsi/gfx10: set HS/GS/CS.WGP_MODE 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
329406ec9c radeonsi/gfx10: set GE_PC_ALLOC 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
9d1483de3b radeonsi/gfx10: enable 1D textures 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
1d3bffaf9c radeonsi/gfx10: enable image stores with DCC 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
5b50fb9b7f radeonsi/gfx10: no need to invalidate L2 for framebuffer -> texture coherency 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
fbf781e401 radeonsi/gfx10: support pixel shaders without exports 
It only works if there are not color and no Z exports.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
2adc8e2736 radeonsi/gfx10: enable vertex shaders without param space allocation 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
07fe51156d radeonsi: update DCC settings from PAL 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
4002913f8d radeonsi: reorder shader IO indices for better IO space usage for tess and GS 
The highest used index determines the stride for shader outputs in shaders
that use LDS or memory for outputs.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
1c99a13f89 radeonsi: decrease maximum supported GENERIC varying index from 42 to 31 
This can decrease LDS and/or memory usage for shader outputs when geometry
shaders or tessellation is used.

Only PS inputs support higher indices and those aren't eliminated by
kill_outputs.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
6335cc6a58 radeonsi: cosmetic cleanup in si_shader_io_get_unique_index 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
3be4ed2fe1 radeonsi: fix and clean up shader_type passing 
- don't pass it via a parameter if it can be derived from other parameters
- set shader_type for ac_rtld_open
- use enum pipe_shader_type instead of unsigned

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 17:24:16 -04:00
Marek Olšák
37b26671a7 radeonsi: enable RB+ for pixel shaders with no/non-contiguous color outputs 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie airlied@redhat.com
 2019-07-09 17:24:16 -04:00
Marek Olšák
5058d62b05 radeonsi: don't set READ_ONLY for const_uploader to fix bindless texture hangs 
Bindless textures can update descriptors with WRITE_DATA.

Cc: 19.1 <mesa-stable@lists.freedesktop.org>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie airlied@redhat.com
 2019-07-09 17:24:16 -04:00
Alyssa Rosenzweig
6074eae753 gallium: Add util_format_is_unorm8 check 
Useful for formats that would work with the same driver code path as
RGBA8 UNORM but that don't meet the util_format_is_rgba8_variant
criteria due to a smaller channel count.

v2: Use simpler logic (suggested by Iago).

v3: Fix spelling erorr. boolean->bool (thank you airlied).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 21:17:47 +00:00
Alyssa Rosenzweig
15000c79da nir: Add Panfrost-specific blending intrinsic 
This gives more flexibility than the normal store_deref/store_output
versions (particularly, it allows us to abuse the type system in awful
ways, which is necessary for efficient format conversion in blend
shaders.)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
 2019-07-09 14:07:23 -07:00
Pratik Vishwakarma
177a3df7b0 radeonsi: Expose support for 10-bit VP9 decode 
Fix si_vid_is_format_supported to expose support
for 10-bit VP9 decode using P016 format. Without
this change, 10-bit decode will be exposed only
for HEVC even though newer hardware support
10-bit decode for VP9.

Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
 2019-07-09 15:26:54 -04:00
Alyssa Rosenzweig
4a4b48fb05 nir: Add nir_imm_vec4_16 
We already have nir_imm_float16 and nir_imm_vec4; let's add the ability
to easily make immediate fp16 vectors as well, now that fp16 support is
maturing in NIR/GLSL.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
 2019-07-09 18:43:07 +00:00
Karol Herbst
a110a8090d nvc0: remove nvc0_program.tp.input_patch_size 
right now that's dead code

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
 2019-07-09 12:41:54 +02:00
Bas Nieuwenhuizen
14291342ec radv: Add a common member in the union to make things more clear. 
This clarifies that the struct can be used when the shader can be
one of VS/TES.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-09 09:59:07 +00:00
Bas Nieuwenhuizen
f9070743a9 Revert "radv: keep track of whether NGG is used for GS on GFX10" 
This reverts commit 63e0675d98.

The GS is merged with the preceding shader and since the preceding
shader will have as_ngg set the final binary will have is_ngg set.

So we do not need the gs key here.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-09 09:59:07 +00:00
Juan A. Suarez Romero
d33e93d332 docs: update calendar, add news item and link release notes for 19.1.2 
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
 2019-07-09 11:22:13 +02:00
Juan A. Suarez Romero
3c90baf047 docs: add sha256 checksums for 19.1.2 
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit e42399f4de)
 2019-07-09 09:19:25 +00:00
Juan A. Suarez Romero
0f51d69087 docs: add release notes for 19.1.2 
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
(cherry picked from commit fe1f7b538b)
 2019-07-09 09:19:24 +00:00
Connor Abbott
86968327df nir/lower_io_to_temporaries: Fix hash table leak 
Fixes: c45f5db527 ("nir/lower_io_to_temporaries: Handle interpolation intrinsics")
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2019-07-09 10:39:37 +02:00
Bas Nieuwenhuizen
64cd972ffb radv/gfx10: Use correct gs_out for tess point_mode. 
Fixes: 204e4da9b4 "radv: Use correct gs_out with tessellation."
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2019-07-09 09:52:50 +02:00
Samuel Pitoiset
3f50007ad8 radv: set correct number of VGPRs for GS on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 09:54:27 +02:00
Samuel Pitoiset
611ddf794e radv: fix VGT_ESGS_RING_ITEMSIZE for GS as NGG on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 09:54:24 +02:00
Samuel Pitoiset
eca8a478a5 radv: emit VGT_GS_MAX_VERT_OUT for legacy and NGG paths for GS 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 09:54:22 +02:00
Samuel Pitoiset
f240147cf7 radv: emit the geometry shader as NGG if enabled on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 09:54:21 +02:00
Samuel Pitoiset
63e0675d98 radv: keep track of whether NGG is used for GS on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 09:54:19 +02:00
Samuel Pitoiset
c81b719812 radv: add radv_pipeline_generate_hw_gs() helper 
For legacy GS path.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 09:54:17 +02:00
Samuel Pitoiset
54e2470047 radv: fix setting VGT_REUSE_OFF for TES on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 09:54:16 +02:00
Samuel Pitoiset
d2a8b63a2c radv: fix computing the number of ES VGPRS for TES on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 09:54:14 +02:00
Samuel Pitoiset
2974df819e radv: set max workgroup size to 128 for TES as NGG on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 09:54:12 +02:00
Samuel Pitoiset
53c75f17ec radv: fix allocating USER SGPRs on GFX10 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2019-07-09 09:54:11 +02:00
Alejandro Piñeiro
71446bf8e3 v3d: Early return with handle 0 when getting a bo on the simulator 
Until now we were just asking entries on the bo hash table, and don't
worry if the handle was NULL, as we were just expecting to get a NULL
in return. It seems that now the hash table assert with some reserverd
pointers, included NULL. This commit just early returns with handle 0.

This change fixes several crashes on vk-gl-cts GLES tests when using
the v3d simulator, like:
KHR-GLES3.core.internalformat.copy_tex_image.*

Reviewed-by: Eric Anholt <eric@anholt.net>
 2019-07-09 08:40:35 +02:00
Lionel Landwerlin
b031dd9010 vulkan/overlay: use a single macro to lookup objects 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
 2019-07-09 09:13:21 +03:00