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https://gitlab.freedesktop.org/mesa/mesa.git
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radv: Add a common member in the union to make things more clear.
This clarifies that the struct can be used when the shader can be one of VS/TES. Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
This commit is contained in:
parent
f9070743a9
commit
14291342ec
4 changed files with 53 additions and 50 deletions
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@ -601,11 +601,11 @@ static bool needs_view_index_sgpr(struct radv_shader_context *ctx,
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switch (stage) {
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case MESA_SHADER_VERTEX:
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if (ctx->shader_info->info.needs_multiview_view_index ||
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(!ctx->options->key.vs.out.as_es && !ctx->options->key.vs.out.as_ls && ctx->options->key.has_multiview_view_index))
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(!ctx->options->key.vs_common_out.as_es && !ctx->options->key.vs_common_out.as_ls && ctx->options->key.has_multiview_view_index))
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return true;
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break;
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case MESA_SHADER_TESS_EVAL:
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if (ctx->shader_info->info.needs_multiview_view_index || (!ctx->options->key.tes.out.as_es && ctx->options->key.has_multiview_view_index))
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if (ctx->shader_info->info.needs_multiview_view_index || (!ctx->options->key.vs_common_out.as_es && ctx->options->key.has_multiview_view_index))
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return true;
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break;
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case MESA_SHADER_GEOMETRY:
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@ -827,7 +827,7 @@ declare_vs_input_vgprs(struct radv_shader_context *ctx, struct arg_info *args)
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{
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add_arg(args, ARG_VGPR, ctx->ac.i32, &ctx->abi.vertex_id);
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if (!ctx->is_gs_copy_shader) {
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if (ctx->options->key.vs.out.as_ls) {
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if (ctx->options->key.vs_common_out.as_ls) {
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add_arg(args, ARG_VGPR, ctx->ac.i32, &ctx->rel_auto_id);
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if (ctx->ac.chip_class >= GFX10) {
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add_arg(args, ARG_VGPR, ctx->ac.i32, NULL); /* user vgpr */
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@ -1006,7 +1006,7 @@ static void create_function(struct radv_shader_context *ctx,
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bool needs_view_index = needs_view_index_sgpr(ctx, stage);
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if (ctx->ac.chip_class >= GFX10) {
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if (is_pre_gs_stage(stage) && ctx->options->key.vs.out.as_ngg) {
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if (is_pre_gs_stage(stage) && ctx->options->key.vs_common_out.as_ngg) {
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/* On GFX10, VS is merged into GS for NGG. */
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previous_stage = stage;
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stage = MESA_SHADER_GEOMETRY;
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@ -1055,10 +1055,10 @@ static void create_function(struct radv_shader_context *ctx,
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if (needs_view_index)
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add_arg(&args, ARG_SGPR, ctx->ac.i32,
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&ctx->abi.view_index);
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if (ctx->options->key.vs.out.as_es) {
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if (ctx->options->key.vs_common_out.as_es) {
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add_arg(&args, ARG_SGPR, ctx->ac.i32,
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&ctx->es2gs_offset);
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} else if (ctx->options->key.vs.out.as_ls) {
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} else if (ctx->options->key.vs_common_out.as_ls) {
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/* no extra parameters */
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} else {
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declare_streamout_sgprs(ctx, stage, &args);
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@ -1121,7 +1121,7 @@ static void create_function(struct radv_shader_context *ctx,
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add_arg(&args, ARG_SGPR, ctx->ac.i32,
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&ctx->abi.view_index);
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if (ctx->options->key.tes.out.as_es) {
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if (ctx->options->key.vs_common_out.as_es) {
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add_arg(&args, ARG_SGPR, ctx->ac.i32, &ctx->oc_lds);
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add_arg(&args, ARG_SGPR, ctx->ac.i32, NULL);
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add_arg(&args, ARG_SGPR, ctx->ac.i32,
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@ -1136,7 +1136,7 @@ static void create_function(struct radv_shader_context *ctx,
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case MESA_SHADER_GEOMETRY:
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if (has_previous_stage) {
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// First 6 system regs
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if (ctx->options->key.vs.out.as_ngg) {
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if (ctx->options->key.vs_common_out.as_ngg) {
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add_arg(&args, ARG_SGPR, ctx->ac.i32,
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&ctx->gs_tg_info);
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} else {
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@ -1314,7 +1314,7 @@ static void create_function(struct radv_shader_context *ctx,
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}
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if (stage == MESA_SHADER_TESS_CTRL ||
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(stage == MESA_SHADER_VERTEX && ctx->options->key.vs.out.as_ls) ||
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(stage == MESA_SHADER_VERTEX && ctx->options->key.vs_common_out.as_ls) ||
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/* GFX9 has the ESGS ring buffer in LDS. */
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(stage == MESA_SHADER_GEOMETRY && has_previous_stage)) {
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ac_declare_lds_as_pointer(&ctx->ac);
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@ -3156,7 +3156,7 @@ handle_ngg_outputs_post(struct radv_shader_context *ctx)
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/* TODO: streamout */
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/* TODO: VS primitive ID */
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if (ctx->options->key.vs.out.export_prim_id)
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if (ctx->options->key.vs_common_out.export_prim_id)
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assert(0);
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/* TODO: primitive culling */
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@ -3201,9 +3201,9 @@ handle_ngg_outputs_post(struct radv_shader_context *ctx)
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/* Export per-vertex data (positions and parameters). */
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ac_nir_build_if(&if_state, ctx, is_es_thread);
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{
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handle_vs_outputs_post(ctx, ctx->options->key.vs.out.export_prim_id,
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ctx->options->key.vs.out.export_layer_id,
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ctx->options->key.vs.out.export_clip_dists,
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handle_vs_outputs_post(ctx, ctx->options->key.vs_common_out.export_prim_id,
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ctx->options->key.vs_common_out.export_layer_id,
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ctx->options->key.vs_common_out.export_clip_dists,
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ctx->stage == MESA_SHADER_TESS_EVAL ? &ctx->shader_info->tes.outinfo : &ctx->shader_info->vs.outinfo);
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}
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ac_nir_build_endif(&if_state);
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@ -3463,16 +3463,16 @@ handle_shader_outputs_post(struct ac_shader_abi *abi, unsigned max_outputs,
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switch (ctx->stage) {
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case MESA_SHADER_VERTEX:
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if (ctx->options->key.vs.out.as_ls)
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if (ctx->options->key.vs_common_out.as_ls)
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handle_ls_outputs_post(ctx);
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else if (ctx->options->key.vs.out.as_ngg)
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else if (ctx->options->key.vs_common_out.as_ngg)
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break; /* handled outside of the shader body */
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else if (ctx->options->key.vs.out.as_es)
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else if (ctx->options->key.vs_common_out.as_es)
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handle_es_outputs_post(ctx, &ctx->shader_info->vs.es_info);
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else
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handle_vs_outputs_post(ctx, ctx->options->key.vs.out.export_prim_id,
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ctx->options->key.vs.out.export_layer_id,
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ctx->options->key.vs.out.export_clip_dists,
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handle_vs_outputs_post(ctx, ctx->options->key.vs_common_out.export_prim_id,
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ctx->options->key.vs_common_out.export_layer_id,
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ctx->options->key.vs_common_out.export_clip_dists,
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&ctx->shader_info->vs.outinfo);
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break;
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case MESA_SHADER_FRAGMENT:
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@ -3485,14 +3485,14 @@ handle_shader_outputs_post(struct ac_shader_abi *abi, unsigned max_outputs,
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handle_tcs_outputs_post(ctx);
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break;
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case MESA_SHADER_TESS_EVAL:
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if (ctx->options->key.tes.out.as_ngg)
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if (ctx->options->key.vs_common_out.as_ngg)
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break; /* handled outside of the shader body */
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else if (ctx->options->key.tes.out.as_es)
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else if (ctx->options->key.vs_common_out.as_es)
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handle_es_outputs_post(ctx, &ctx->shader_info->tes.es_info);
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else
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handle_vs_outputs_post(ctx, ctx->options->key.tes.out.export_prim_id,
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ctx->options->key.tes.out.export_layer_id,
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ctx->options->key.tes.out.export_clip_dists,
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handle_vs_outputs_post(ctx, ctx->options->key.vs_common_out.export_prim_id,
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ctx->options->key.vs_common_out.export_layer_id,
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ctx->options->key.vs_common_out.export_clip_dists,
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&ctx->shader_info->tes.outinfo);
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break;
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default:
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@ -3522,13 +3522,13 @@ ac_nir_eliminate_const_vs_outputs(struct radv_shader_context *ctx)
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case MESA_SHADER_GEOMETRY:
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return;
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case MESA_SHADER_VERTEX:
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if (ctx->options->key.vs.out.as_ls ||
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ctx->options->key.vs.out.as_es)
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if (ctx->options->key.vs_common_out.as_ls ||
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ctx->options->key.vs_common_out.as_es)
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return;
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outinfo = &ctx->shader_info->vs.outinfo;
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break;
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case MESA_SHADER_TESS_EVAL:
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if (ctx->options->key.vs.out.as_es)
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if (ctx->options->key.vs_common_out.as_es)
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return;
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outinfo = &ctx->shader_info->tes.outinfo;
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break;
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@ -3548,7 +3548,7 @@ ac_setup_rings(struct radv_shader_context *ctx)
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{
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if (ctx->options->chip_class <= GFX8 &&
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(ctx->stage == MESA_SHADER_GEOMETRY ||
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ctx->options->key.vs.out.as_es || ctx->options->key.tes.out.as_es)) {
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ctx->options->key.vs_common_out.as_es || ctx->options->key.vs_common_out.as_es)) {
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unsigned ring = ctx->stage == MESA_SHADER_GEOMETRY ? RING_ESGS_GS
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: RING_ESGS_VS;
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LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, ring, false);
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@ -3722,7 +3722,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm,
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if (ctx.ac.chip_class >= GFX10) {
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if (is_pre_gs_stage(shaders[0]->info.stage) &&
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options->key.vs.out.as_ngg) {
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options->key.vs_common_out.as_ngg) {
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ctx.max_workgroup_size = 128;
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}
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}
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@ -3746,7 +3746,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm,
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*/
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ctx.abi.gfx9_stride_size_workaround_for_atomic = ctx.ac.chip_class == GFX9 && HAVE_LLVM < 0x900;
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bool is_ngg = is_pre_gs_stage(shaders[0]->info.stage) && ctx.options->key.vs.out.as_ngg;
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bool is_ngg = is_pre_gs_stage(shaders[0]->info.stage) && ctx.options->key.vs_common_out.as_ngg;
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if (shader_count >= 2 || is_ngg)
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ac_init_exec_full_mask(&ctx.ac);
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@ -3844,7 +3844,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm,
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/* This needs to be outside the if wrapping the shader body, as sometimes
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* the HW generates waves with 0 es/vs threads. */
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if (is_pre_gs_stage(shaders[i]->info.stage) &&
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ctx.options->key.vs.out.as_ngg &&
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ctx.options->key.vs_common_out.as_ngg &&
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i == shader_count - 1) {
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handle_ngg_outputs_post(&ctx);
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}
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@ -3978,18 +3978,18 @@ ac_fill_shader_info(struct radv_shader_variant_info *shader_info, struct nir_sha
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shader_info->tes.spacing = nir->info.tess.spacing;
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shader_info->tes.ccw = nir->info.tess.ccw;
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shader_info->tes.point_mode = nir->info.tess.point_mode;
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shader_info->tes.as_es = options->key.tes.out.as_es;
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shader_info->tes.export_prim_id = options->key.tes.out.export_prim_id;
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shader_info->is_ngg = options->key.tes.out.as_ngg;
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shader_info->tes.as_es = options->key.vs_common_out.as_es;
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shader_info->tes.export_prim_id = options->key.vs_common_out.export_prim_id;
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shader_info->is_ngg = options->key.vs_common_out.as_ngg;
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break;
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case MESA_SHADER_TESS_CTRL:
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shader_info->tcs.tcs_vertices_out = nir->info.tess.tcs_vertices_out;
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break;
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case MESA_SHADER_VERTEX:
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shader_info->vs.as_es = options->key.vs.out.as_es;
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shader_info->vs.as_ls = options->key.vs.out.as_ls;
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shader_info->vs.export_prim_id = options->key.vs.out.export_prim_id;
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shader_info->is_ngg = options->key.vs.out.as_ngg;
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shader_info->vs.as_es = options->key.vs_common_out.as_es;
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shader_info->vs.as_ls = options->key.vs_common_out.as_ls;
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shader_info->vs.export_prim_id = options->key.vs_common_out.export_prim_id;
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shader_info->is_ngg = options->key.vs_common_out.as_ngg;
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break;
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default:
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break;
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@ -2243,7 +2243,7 @@ radv_fill_shader_keys(struct radv_device *device,
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}
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if (nir[MESA_SHADER_TESS_CTRL]) {
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keys[MESA_SHADER_VERTEX].vs.out.as_ls = true;
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keys[MESA_SHADER_VERTEX].vs_common_out.as_ls = true;
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keys[MESA_SHADER_TESS_CTRL].tcs.num_inputs = 0;
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keys[MESA_SHADER_TESS_CTRL].tcs.input_vertices = key->tess_input_vertices;
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keys[MESA_SHADER_TESS_CTRL].tcs.primitive_mode = nir[MESA_SHADER_TESS_EVAL]->info.tess.primitive_mode;
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@ -2253,16 +2253,16 @@ radv_fill_shader_keys(struct radv_device *device,
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if (nir[MESA_SHADER_GEOMETRY]) {
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if (nir[MESA_SHADER_TESS_CTRL])
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keys[MESA_SHADER_TESS_EVAL].tes.out.as_es = true;
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keys[MESA_SHADER_TESS_EVAL].vs_common_out.as_es = true;
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else
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keys[MESA_SHADER_VERTEX].vs.out.as_es = true;
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keys[MESA_SHADER_VERTEX].vs_common_out.as_es = true;
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}
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if (device->physical_device->rad_info.chip_class >= GFX10) {
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if (nir[MESA_SHADER_TESS_CTRL]) {
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keys[MESA_SHADER_TESS_EVAL].tes.out.as_ngg = true;
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keys[MESA_SHADER_TESS_EVAL].vs_common_out.as_ngg = true;
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} else {
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keys[MESA_SHADER_VERTEX].vs.out.as_ngg = true;
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keys[MESA_SHADER_VERTEX].vs_common_out.as_ngg = true;
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}
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}
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@ -2471,17 +2471,17 @@ void radv_create_shaders(struct radv_pipeline *pipeline,
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}
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/* TODO: These are no longer used as keys we should refactor this */
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keys[MESA_SHADER_VERTEX].vs.out.export_prim_id =
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keys[MESA_SHADER_VERTEX].vs_common_out.export_prim_id =
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pipeline->shaders[MESA_SHADER_FRAGMENT]->info.info.ps.prim_id_input;
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keys[MESA_SHADER_VERTEX].vs.out.export_layer_id =
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keys[MESA_SHADER_VERTEX].vs_common_out.export_layer_id =
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pipeline->shaders[MESA_SHADER_FRAGMENT]->info.info.ps.layer_input;
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keys[MESA_SHADER_VERTEX].vs.out.export_clip_dists =
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keys[MESA_SHADER_VERTEX].vs_common_out.export_clip_dists =
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!!pipeline->shaders[MESA_SHADER_FRAGMENT]->info.info.ps.num_input_clips_culls;
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keys[MESA_SHADER_TESS_EVAL].tes.out.export_prim_id =
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keys[MESA_SHADER_TESS_EVAL].vs_common_out.export_prim_id =
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pipeline->shaders[MESA_SHADER_FRAGMENT]->info.info.ps.prim_id_input;
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keys[MESA_SHADER_TESS_EVAL].tes.out.export_layer_id =
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keys[MESA_SHADER_TESS_EVAL].vs_common_out.export_layer_id =
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pipeline->shaders[MESA_SHADER_FRAGMENT]->info.info.ps.layer_input;
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keys[MESA_SHADER_TESS_EVAL].tes.out.export_clip_dists =
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keys[MESA_SHADER_TESS_EVAL].vs_common_out.export_clip_dists =
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!!pipeline->shaders[MESA_SHADER_FRAGMENT]->info.info.ps.num_input_clips_culls;
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}
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@ -118,6 +118,9 @@ struct radv_shader_variant_key {
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struct radv_fs_variant_key fs;
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struct radv_tes_variant_key tes;
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struct radv_tcs_variant_key tcs;
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/* A common prefix of the vs and tes keys. */
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struct radv_vs_out_key vs_common_out;
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};
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bool has_multiview_view_index;
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};
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@ -496,7 +496,7 @@ gather_info_output_decl(const nir_shader *nir, const nir_variable *var,
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gather_info_output_decl_ps(nir, var, info);
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break;
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case MESA_SHADER_VERTEX:
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if (options->key.vs.out.as_ls)
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if (options->key.vs_common_out.as_ls)
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gather_info_output_decl_ls(nir, var, info);
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break;
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case MESA_SHADER_GEOMETRY:
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