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radeonsi/gfx9: fix an oversight in primitive binning code

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Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Marek Olšák 2019-07-02 22:31:14 -04:00
parent 1f53a3e766
commit 80b3f4b4bd
1 changed files with 1 additions and 1 deletions
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src/gallium/drivers/radeonsi/si_state_binning.c
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@ -196,7 +196,7 @@ static struct uvec2 si_get_depth_bin_size(struct si_context *sctx)
unsigned stencil_coeff = tex->surface.has_stencil &&
dsa->stencil_enabled ? 1 : 0;
unsigned sum = 4 * (depth_coeff + stencil_coeff) *
tex->buffer.b.b.nr_samples;
MAX2(tex->buffer.b.b.nr_samples, 1);
static const si_bin_size_subtable table[] = {
{