Commit graph

82384 commits

Author SHA1 Message Date
Rob Clark
53cde5e295 freedreno/ir3: handle VARYING_SLOT_PNTC
In the glsl->tgsi path, this already gets translated to VAR8, which
matches up with rasterizer->sprite_coord_enable.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-05-15 17:25:48 -04:00
Rob Clark
2f1581059b freedreno/ir3: disable TGSI specific hacks in nir case
When we got NIR directly from state tracker (vs using tgsi_to_nir) we
need to realize this and skip some TGSI specific hacks.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-05-15 17:25:48 -04:00
Rob Clark
784086f3c1 freedreno/ir3: add support for NIR as preferred IR
For now under debug flag, since only suitable for debugging/testing.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-05-15 17:25:47 -04:00
Rob Clark
8b24f7b440 nir: fix comment typo about f2d/d2f
Signed-off-by: Rob Clark <robclark@freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-15 17:25:47 -04:00
Ilia Mirkin
be2b13e3bf nv50/ir: avoid asserts when the state tracker feeds us bogus inputs
INTERP is defined (by me) to have to have a INPUT source. However the
state tracker does not always obey this. This happens due to varying
packing logic introducing additional mov's which can't always be undone.
Instead of just giving up, we instead try harder to find the original
input. This won't always be possible, for example with indirect
accesses. There's not much we can (easily) do about that though.

This fixes the remaining interpolateAt* failures in dEQP:

dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at*

some of which were asserting due to INTERP_* being passed a non-input.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2016-05-15 14:12:56 -04:00
Ilia Mirkin
9323d084ac nvc0: don't try to go through the push path for indirect draws
This fixes

dEQP-GLES31.functional.draw_indirect.draw_elements_indirect.*.default_attribute

These tests were causing a const vbo to be set up, and were small enough
draws that the logic was trying to go via the push path (which emits
data directly into the cmd stream rather than uploading a user vbo).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2016-05-15 10:48:39 -04:00
Ilia Mirkin
2ef3cdb07e nvc0/ir: make sure to align the second arg of TXD to 4, as we do for TEX
This was handled in handleTEX(), however the way the logic works, those
extra arguments aren't added on by then, so it did nothing. Instead we
must duplicate that bit here. GK110 appears to complain about
MISALIGNED_GPR, however it's reasonable to believe that GK104 has the
same requirements.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95403
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2016-05-15 10:48:39 -04:00
Tobias Klausmann
8c02939794 nv50,nvc0: add support for cull distances
Cull distances are just a special case of clip distances as far as the
hardware is concerned. Make sure that the relevant "planes" are enabled,
and flip the clip mode to cull for those.

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
[imirkin: add enables on nvc0, add nv50 support]
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
2016-05-15 10:48:39 -04:00
Ilia Mirkin
2ad970ecf4 st/mesa: disable cull distance for now
The pass that st/mesa relies on to combine clip and cull distances has
been reverted, so we can't expose ARB_cull_distance until that is
resolved.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-05-15 10:48:38 -04:00
Jason Ekstrand
09e041d61d i965: Use blorp for all clears
We used to use a meta path on gen8 but we haven't since c7cf17ae75.  We
might as well delete the meta path since blorp works on all gens.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 14:18:21 -07:00
Jason Ekstrand
1cfb4bc890 i965: Use blorp for all stencil blits
We used to use a meta path because blorp didn't support 16x MSAA.  Now it
does, so we don't need the meta paths anymore.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 14:18:21 -07:00
Jason Ekstrand
64f2907030 i965: Use blorp for all updownsample blits
We used to use a meta path because blorp didn't support 16x MSAA.  Now it
does, so we don't need the meta paths anymore.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 14:18:21 -07:00
Jason Ekstrand
f5febc83a7 i965/blorp: Add support for 16x MSAA
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 14:18:21 -07:00
Jason Ekstrand
a32315bd19 i965: move brw_meta_set_fast_clear_color to brw_meta_util.c
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 14:18:21 -07:00
Jason Ekstrand
36529f670f i965; Move brw_meta_get_*_rect to brw_meta_util.c
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 14:18:21 -07:00
Jason Ekstrand
21034f1b08 i965: Move brw_is_color_fast_clear_compatible to brw_meta_util
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 14:18:21 -07:00
Jason Ekstrand
b05c68fc8a i965: Move brw_get_rb_for_slice to brw_meta_util
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 14:18:21 -07:00
Jason Ekstrand
672cffee0f i965/blorp: Get rid of the blorp_prog_data_int() helper
The helper was initially created to allow us to set reasonable defaults as
we mutated the brw_blorp_prog_data structure in preparation for NIR.  Now
that everything is going through brw_blorp_compile_nir_shader() which fully
fills out the brw_blorp_prog_data structure, we don't need the helper.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:54 -07:00
Jason Ekstrand
c228ea8345 i965/blorp: Delete the old blorp shader emit code
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:54 -07:00
Jason Ekstrand
c18da26abf i965/blorp: Stop doing f2i(i2f(sample_id))
NIR gets kind of awkward when you have a 3-component vector with two floats
and one int.  This led to us accidentally going through float for the
sample index.  It doesn't hurt anything but it also isn't needed.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:53 -07:00
Jason Ekstrand
e503da61c6 i965/blorp: Refactor coordinate munging
The original code-flow tried to map original blorp.  This puts things more
where they belong and simplifies some of the logic.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:53 -07:00
Jason Ekstrand
8636937dd6 i965/blorp: Add bilinear blending support to the NIR path
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:53 -07:00
Jason Ekstrand
6bd7bd6633 i965/blorp: Add support for averaging resolves to the NIR path
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:53 -07:00
Jason Ekstrand
c7269c1551 i965/blorp: Add MSAA encode/decode support to the NIR path
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:53 -07:00
Jason Ekstrand
df8c2936cd i965/blorp: Add support for W-[de]tiling to the NIR path
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:53 -07:00
Jason Ekstrand
6adb8d6d3a i965/blorp: Add support for discard-based bounds checks to the NIR path
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:53 -07:00
Jason Ekstrand
4bdace0791 i965/blorp: Add initial support for NIR-based blit shaders
Many of the more complex cases still fall back to the old shader builder.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:53 -07:00
Jason Ekstrand
b0275ad0c9 i965/blorp: Refactor getting the blit kernel into a helper
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:53 -07:00
Jason Ekstrand
6df3d75206 i965/blorp: Use NIR for clear shaders
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95373
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:53 -07:00
Jason Ekstrand
bb45f42f55 i965/blorp: Create the program key in get_clear_kernel
There's no reason to be passing a whole struct around just for a single
boolean.  We can create it later when we actually need to use it as a key.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:53 -07:00
Jason Ekstrand
c1fe8859d3 i965/blorp: Add a helper for compiling NIR shaders
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:53 -07:00
Jason Ekstrand
353eadb170 blorp: Add initial state setup support for SIMD8 dispatch
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:52 -07:00
Jason Ekstrand
cd5a2905cf i965/blorp: Add a param array to prog_data
This array allows the push constants to be re-arranged on upload.  The
actual arrangement will, eventually, come from the back-end compiler.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:52 -07:00
Jason Ekstrand
c46cbe19f4 i965/blorp: Add a prog_data_init helper
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-05-14 13:34:52 -07:00
Jason Ekstrand
50e5e1f747 i965/fs: Implement the new NIR MCS texturing
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-14 13:34:49 -07:00
Jason Ekstrand
f47faa4316 nir: Add texture opcodes and source types for multisample compression
Intel hardware does a form of multisample compression that involves an
auxilary surface called the MCS.  When an MCS is in use, you have to first
sample from the MCS with a special opcode and then pass the result of that
operation into the next sample instrucion.  Normally, we just do this
ourselves in the back-end, but we want to expose that functionality to NIR
so that we can use MCS values directly in NIR-based blorp.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-14 13:34:44 -07:00
Jason Ekstrand
87a41e862b nir/builder: Add a helper for grabbing multiple channels from an ssa def
This is similar to nir_channel except that it lets you grab more than one
channel by providing a mask.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-14 13:34:40 -07:00
Jason Ekstrand
fc58cb543f nir/builder: Generate the alu helpers directly in python
There's no reason for having a macro *and* a python generator.  We can
easily just do the whole thing in python.  This has the advantage that we
are no longer definining ALU# macros which conflict with the ones in
brw_fs_builder.h.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-14 13:34:38 -07:00
Jason Ekstrand
a0e6e5f21f i965/fs: Use MRF0 for the repclear message
This is what BLORP does.  Making them match cuts down on the noise when
looking at AUB diffs.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-14 13:34:33 -07:00
Jason Ekstrand
5a68df87da i965/blorp: Simplify the sample layout calculation
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-14 13:34:30 -07:00
Jason Ekstrand
bee160b31b i965/fs: Organize prog_data by ksp number rather than SIMD width
The hardware packets organize kernel pointers and GRF start by slots that
don't map directly to dispatch width.  This means that all of the state
setup code has to re-arrange the data from prog_data into these slots.
This logic has been duplicated 4 times in the GL driver and one more time
in the Vulkan driver.  Let's just put it all in brw_fs.cpp.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-14 13:34:25 -07:00
Jason Ekstrand
7be100ac9a i965/gen7_wm: Move where we set the fast clear op
This better matches gen8 state setup

Acked-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-14 13:34:21 -07:00
Jason Ekstrand
1ec466d0ff i965/fs: Stop setting dispatch_grf_start_reg from the visitor
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-14 13:34:18 -07:00
Jason Ekstrand
082768af30 i965/fs: Clean up the logic in compile_fs a bit
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-14 13:34:13 -07:00
Jason Ekstrand
b0f8768905 i965/state: Clean up WM/PS state to pull more things out of prog_data
Now that we have a persample_shading bit in prog_data we can reduce the
amount the state setup code needs to be looking at the GL state.  In
particular, it no longer pulls anything directly out of the
gl_fragment_program and no longer depends on NEW_FRAGMENT_PROGRAM.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-14 13:34:10 -07:00
Jason Ekstrand
712a980add i965/fs: Rework the persample shading key/prog_data bits
This commit reworks and simplifies the way we handle persample shading in
the shader key and prog_data.  The previous approach had three different
key bits that had slightly different and hard-to-decern meanings while the
new bits are far more clear.  This commit changes it to two easily
understood bits that communicate everything we need:

 1) key->persample_interp: means that the user has requested persample
    interpolation through the API.  This is equivalent to having
    SAMPLE_SHADING enabled and having MIN_SAMPLE_SHADING_VALUE set high
    enough that you actually get multiple per-sample invocations.

 2) key->multisample_fbo: means that the shader will be running on an
    actual multi-sampled framebuffer.

This commit also adds a new "persample_dispatch" bit to prog_data which
indicates that the shader should be run in persample mode.  This way the
state setup code doesn't have to look at the fragment program or GL state
and can just pull that data out of the prog_data.

In theory, this shuffle could mean more recompiles.  However, in practice,
we were shoving enough state into the key before that we were probably
hitting a recompile on every per-sample shader anyway.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-14 13:34:05 -07:00
Jason Ekstrand
a2f50d87b6 nir: Add an info bit for uses_sample_qualifier
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-05-14 13:33:52 -07:00
Kenneth Graunke
59156b2e96 i965: Fix undefined df bits in brw_reg comparisons.
Commit 5310bca024 added a new "double df"
field to the brw_reg struct, adding an extra 4 bytes of data that isn't
usually initialized (or may contain irrelevant garbage if the struct is
mutated).  This means that it's no longer safe to memcmp().

Instead, add a brw_regs_equal() function which ignores the extra df bits
unless they matter.  To keep the implementation cheap, we wrap the first
set of fields in a union/struct so that we can use a single DWord
comparison.

v2: Drop unnecessary casts (caught by Francisco Jerez).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2016-05-14 00:18:37 -07:00
Dave Airlie
9f8867d877 i965: disable cull distance temporarily.
I'll fix this up on Monday, so leave the docs changes in place.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-14 11:39:34 +10:00
Dave Airlie
7a6d55826e Revert "glsl: Extend lowering pass for gl_ClipDistance to support other arrays (v4)"
This reverts commit ad355652c2.

This broke a bunch of clip tests.
2016-05-14 11:39:34 +10:00