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i965/blorp: Delete the old blorp shader emit code

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Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
This commit is contained in:
Jason Ekstrand 2016-05-05 14:37:53 -07:00
parent c18da26abf
commit c228ea8345
8 changed files with 7 additions and 1663 deletions
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2
src/mesa/drivers/dri/i965/Makefile.sources
View file

@ -99,8 +99,6 @@ i965_compiler_GENERATED_FILES = \
i965_FILES = \
brw_binding_tables.c \
brw_blorp_blit.cpp \
brw_blorp_blit_eu.cpp \
brw_blorp_blit_eu.h \
brw_blorp_clear.cpp \
brw_blorp.c \
brw_blorp.h \

1286
src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
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File diff suppressed because it is too large Load diff

145
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.cpp
View file

@ -1,145 +0,0 @@
/*
* Copyright © 2013 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#include "util/ralloc.h"
#include "brw_blorp_blit_eu.h"
#include "brw_blorp.h"
#include "brw_cfg.h"
brw_blorp_eu_emitter::brw_blorp_eu_emitter()
: mem_ctx(ralloc_context(NULL))
{
}
brw_blorp_eu_emitter::~brw_blorp_eu_emitter()
{
ralloc_free(mem_ctx);
}
const unsigned *
brw_blorp_eu_emitter::get_program(struct brw_context *brw, bool debug_flag,
unsigned *program_size)
{
cfg_t cfg(&insts);
brw_stage_prog_data prog_data = { 0 };
brw_wm_prog_key prog_key = { 0 };
prog_data.binding_table.texture_start =
BRW_BLORP_TEXTURE_BINDING_TABLE_INDEX;
fs_generator generator(brw->intelScreen->compiler, brw, mem_ctx, &prog_key,
&prog_data, 0, false, MESA_SHADER_FRAGMENT);
if (debug_flag)
generator.enable_debug("blorp");
generator.generate_code(&cfg, 16);
return generator.get_assembly(program_size);
}
/**
* Emit code that kills pixels whose X and Y coordinates are outside the
* boundary of the rectangle defined by the push constants (dst_x0, dst_y0,
* dst_x1, dst_y1).
*/
void
brw_blorp_eu_emitter::emit_kill_if_outside_rect(const struct brw_reg &x,
const struct brw_reg &y,
const struct brw_reg &dst_x0,
const struct brw_reg &dst_x1,
const struct brw_reg &dst_y0,
const struct brw_reg &dst_y1)
{
struct brw_reg f0 = brw_flag_reg(0, 0);
struct brw_reg g1 = retype(brw_vec1_grf(1, 7), BRW_REGISTER_TYPE_UW);
emit_cmp(BRW_CONDITIONAL_GE, x, dst_x0);
emit_cmp(BRW_CONDITIONAL_GE, y, dst_y0)->predicate = BRW_PREDICATE_NORMAL;
emit_cmp(BRW_CONDITIONAL_L, x, dst_x1)->predicate = BRW_PREDICATE_NORMAL;
emit_cmp(BRW_CONDITIONAL_L, y, dst_y1)->predicate = BRW_PREDICATE_NORMAL;
fs_inst *inst = new (mem_ctx) fs_inst(BRW_OPCODE_AND, 16, g1, f0, g1);
inst->force_writemask_all = true;
insts.push_tail(inst);
}
void
brw_blorp_eu_emitter::emit_texture_lookup(const struct brw_reg &dst,
enum opcode op,
unsigned base_mrf,
unsigned msg_length)
{
fs_inst *inst = new (mem_ctx) fs_inst(op, 16, dst, brw_message_reg(base_mrf),
brw_imm_ud(0u), brw_imm_ud(0u));
inst->base_mrf = base_mrf;
inst->mlen = msg_length;
inst->header_size = 0;
inst->regs_written = 8;
insts.push_tail(inst);
}
void
brw_blorp_eu_emitter::emit_render_target_write(const struct brw_reg &src0,
int msg_reg_nr,
unsigned msg_length,
bool use_header)
{
fs_inst *inst = new (mem_ctx) fs_inst(FS_OPCODE_BLORP_FB_WRITE, 16);
inst->src[0] = src0;
inst->sources = 1;
inst->base_mrf = msg_reg_nr;
inst->mlen = msg_length;
inst->header_size = use_header ? 2 : 0;
inst->target = BRW_BLORP_RENDERBUFFER_BINDING_TABLE_INDEX;
insts.push_tail(inst);
}
void
brw_blorp_eu_emitter::emit_combine(enum opcode combine_opcode,
const struct brw_reg &dst,
const struct brw_reg &src_1,
const struct brw_reg &src_2)
{
assert(combine_opcode == BRW_OPCODE_ADD || combine_opcode == BRW_OPCODE_AVG);
insts.push_tail(new (mem_ctx) fs_inst(combine_opcode, 16, dst,
src_1, src_2));
}
fs_inst *
brw_blorp_eu_emitter::emit_cmp(enum brw_conditional_mod op,
const struct brw_reg &x,
const struct brw_reg &y)
{
fs_inst *cmp = new (mem_ctx) fs_inst(BRW_OPCODE_CMP, 16,
vec16(brw_null_reg()), x, y);
cmp->conditional_mod = op;
insts.push_tail(cmp);
return cmp;
}

212
src/mesa/drivers/dri/i965/brw_blorp_blit_eu.h
View file

@ -1,212 +0,0 @@
/*
* Copyright © 2013 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#ifndef BRW_BLORP_BLIT_EU_H
#define BRW_BLORP_BLIT_EU_H
#include "brw_fs.h"
class brw_blorp_eu_emitter
{
protected:
brw_blorp_eu_emitter();
~brw_blorp_eu_emitter();
const unsigned *get_program(struct brw_context *brw, bool debug_flag,
unsigned *program_size);
void emit_kill_if_outside_rect(const struct brw_reg &x,
const struct brw_reg &y,
const struct brw_reg &dst_x0,
const struct brw_reg &dst_x1,
const struct brw_reg &dst_y0,
const struct brw_reg &dst_y1);
void emit_texture_lookup(const struct brw_reg &dst,
enum opcode op,
unsigned base_mrf,
unsigned msg_length);
void emit_render_target_write(const struct brw_reg &src0,
int msg_reg_nr,
unsigned msg_length,
bool use_header);
void emit_combine(enum opcode combine_opcode,
const struct brw_reg &dst,
const struct brw_reg &src_1,
const struct brw_reg &src_2);
inline void emit_cond_mov(const struct brw_reg &x,
const struct brw_reg &y,
enum brw_conditional_mod op,
const struct brw_reg &dst,
const struct brw_reg &src)
{
emit_cmp(op, x, y);
fs_inst *mv = new (mem_ctx) fs_inst(BRW_OPCODE_MOV, 16, dst, src);
mv->predicate = BRW_PREDICATE_NORMAL;
insts.push_tail(mv);
}
inline void emit_if_eq_mov(const struct brw_reg &x, unsigned y,
const struct brw_reg &dst, unsigned src)
{
emit_cond_mov(x, brw_imm_d(y), BRW_CONDITIONAL_EQ, dst, brw_imm_d(src));
}
inline void emit_lrp(const struct brw_reg &dst,
const struct brw_reg &src1,
const struct brw_reg &src2,
const struct brw_reg &src3)
{
insts.push_tail(
new (mem_ctx) fs_inst(BRW_OPCODE_LRP, 16, dst, src1, src2, src3));
}
inline void emit_mad(const struct brw_reg &dst,
const struct brw_reg &src1,
const struct brw_reg &src2,
const struct brw_reg &src3)
{
insts.push_tail(
new (mem_ctx) fs_inst(BRW_OPCODE_MAD, 16, dst, src1, src2, src3));
}
inline void emit_min(const struct brw_reg& dst,
const struct brw_reg& src1,
const struct brw_reg& src2)
{
fs_inst *inst = new (mem_ctx) fs_inst(BRW_OPCODE_SEL, 16, dst, src1, src2);
inst->conditional_mod = BRW_CONDITIONAL_L;
insts.push_tail(inst);
}
inline void emit_max(const struct brw_reg& dst,
const struct brw_reg& src1,
const struct brw_reg& src2)
{
fs_inst *inst = new (mem_ctx) fs_inst(BRW_OPCODE_SEL, 16, dst, src1, src2);
inst->conditional_mod = BRW_CONDITIONAL_GE;
insts.push_tail(inst);
}
inline void emit_mov(const struct brw_reg& dst, const struct brw_reg& src)
{
insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_MOV, 16, dst, src));
}
inline void emit_mov_8(const struct brw_reg& dst, const struct brw_reg& src)
{
insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_MOV, 8, dst, src));
}
inline void emit_and(const struct brw_reg& dst,
const struct brw_reg& src1,
const struct brw_reg& src2)
{
insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_AND, 16, dst, src1, src2));
}
inline void emit_add(const struct brw_reg& dst,
const struct brw_reg& src1,
const struct brw_reg& src2)
{
insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_ADD, 16, dst, src1, src2));
}
inline void emit_add_8(const struct brw_reg& dst,
const struct brw_reg& src1,
const struct brw_reg& src2)
{
insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_ADD, 8, dst, src1, src2));
}
inline void emit_mul(const struct brw_reg& dst,
const struct brw_reg& src1,
const struct brw_reg& src2)
{
insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_MUL, 16, dst, src1, src2));
}
inline void emit_shr(const struct brw_reg& dst,
const struct brw_reg& src1,
const struct brw_reg& src2)
{
insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_SHR, 16, dst, src1, src2));
}
inline void emit_shl(const struct brw_reg& dst,
const struct brw_reg& src1,
const struct brw_reg& src2)
{
insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_SHL, 16, dst, src1, src2));
}
inline void emit_or(const struct brw_reg& dst,
const struct brw_reg& src1,
const struct brw_reg& src2)
{
insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_OR, 16, dst, src1, src2));
}
inline void emit_frc(const struct brw_reg& dst,
const struct brw_reg& src)
{
insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_FRC, 16, dst, src));
}
inline void emit_rndd(const struct brw_reg& dst,
const struct brw_reg& src)
{
insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_RNDD, 16, dst, src));
}
inline void emit_cmp_if(enum brw_conditional_mod op,
const struct brw_reg &x,
const struct brw_reg &y)
{
emit_cmp(op, x, y);
insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_IF, 16));
}
inline void emit_else(void)
{
insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_ELSE, 16));
}
inline void emit_endif(void)
{
insts.push_tail(new (mem_ctx) fs_inst(BRW_OPCODE_ENDIF, 16));
}
private:
fs_inst *emit_cmp(enum brw_conditional_mod op, const struct brw_reg &x,
const struct brw_reg &y);
void *mem_ctx;
exec_list insts;
};
#endif /* BRW_BLORP_BLIT_EU_H */

1
src/mesa/drivers/dri/i965/brw_defines.h
View file

@ -950,7 +950,6 @@ enum opcode {
*/
FS_OPCODE_FB_WRITE_LOGICAL,
FS_OPCODE_BLORP_FB_WRITE,
FS_OPCODE_REP_FB_WRITE,
FS_OPCODE_PACK_STENCIL_REF,
SHADER_OPCODE_RCP,

1
src/mesa/drivers/dri/i965/brw_fs.h
View file

@ -437,7 +437,6 @@ private:
void generate_stencil_ref_packing(fs_inst *inst, struct brw_reg dst,
struct brw_reg src);
void generate_barrier(fs_inst *inst, struct brw_reg src);
void generate_blorp_fb_write(fs_inst *inst, struct brw_reg payload);
void generate_linterp(fs_inst *inst, struct brw_reg dst,
struct brw_reg *src);
void generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src,

21
src/mesa/drivers/dri/i965/brw_fs_generator.cpp
View file

@ -555,23 +555,6 @@ fs_generator::generate_barrier(fs_inst *inst, struct brw_reg src)
brw_WAIT(p);
}
void
fs_generator::generate_blorp_fb_write(fs_inst *inst, struct brw_reg payload)
{
brw_fb_WRITE(p,
16 /* dispatch_width */,
inst->base_mrf >= 0 ?
brw_message_reg(inst->base_mrf) : payload,
brw_null_reg(),
BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD16_SINGLE_SOURCE,
inst->target,
inst->mlen,
0,
true,
true,
inst->header_size != 0);
}
void
fs_generator::generate_linterp(fs_inst *inst,
struct brw_reg dst, struct brw_reg *src)
@ -2211,10 +2194,6 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
generate_fb_write(inst, src[0]);
break;
case FS_OPCODE_BLORP_FB_WRITE:
generate_blorp_fb_write(inst, src[0]);
break;
case FS_OPCODE_MOV_DISPATCH_TO_FLAGS:
generate_mov_dispatch_to_flags(inst);
break;

2
src/mesa/drivers/dri/i965/brw_shader.cpp
View file

@ -182,8 +182,6 @@ brw_instruction_name(const struct brw_device_info *devinfo, enum opcode op)
return "fb_write_logical";
case FS_OPCODE_PACK_STENCIL_REF:
return "pack_stencil_ref";
case FS_OPCODE_BLORP_FB_WRITE:
return "blorp_fb_write";
case FS_OPCODE_REP_FB_WRITE:
return "rep_fb_write";