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i965/gen7_wm: Move where we set the fast clear op

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This better matches gen8 state setup

Acked-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Jason Ekstrand 2016-04-28 14:40:51 -07:00
parent 1ec466d0ff
commit 7be100ac9a
1 changed files with 2 additions and 2 deletions
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4
src/mesa/drivers/dri/i965/gen7_wm_state.c
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@ -214,6 +214,8 @@ gen7_upload_ps_state(struct brw_context *brw,
if (prog_data->num_varying_inputs != 0)
dw4 |= GEN7_PS_ATTRIBUTE_ENABLE;
dw4 |= fast_clear_op;
if (prog_data->prog_offset_16 || prog_data->no_8) {
dw4 |= GEN7_PS_16_DISPATCH_ENABLE;
@ -243,8 +245,6 @@ gen7_upload_ps_state(struct brw_context *brw,
ksp0 = stage_state->prog_offset;
}
dw4 |= fast_clear_op;
BEGIN_BATCH(8);
OUT_BATCH(_3DSTATE_PS << 16 | (8 - 2));
OUT_BATCH(ksp0);