Commit graph

24075 commits

Author SHA1 Message Date
Ilia Mirkin
24a7d4e437 nvc0/ir: per-patch vars are in a separate address space
There's no need to attempt to avoid overlapping generic i/o with patch
i/o. By the same token, we can't merge patch and non-patch loads/stores.

This fixes at least the

  tes-both-input-array-*-index-rd

tessellation variable-indexing tests.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-24 00:23:00 -04:00
Ilia Mirkin
9d60793a03 nvc0/ir: kepler can't do indirect shader input/output loads directly
There's a special AL2P instruction (called AFETCH in nv50 ir) which
computes a "physical" value to be used with indirect addressing with ALD.

Fixes

  tcs-input-array-*-index-rd
  tcs-output-array-*-index-wr

varying-indexing tessellation tests on Kepler.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 23:47:11 -04:00
Ilia Mirkin
7e0036a492 nvc0/ir: tess factors are now sysvals, adapt codegen to expect that
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 21:46:09 -04:00
Jose Fonseca
d6b50ba980 gallivm: Fix profile build. 2015-07-23 16:54:02 +01:00
Jose Fonseca
c6267ebd6c gallium/util: Stop bundling our snprintf implementation.
Use MSVCRT functions instead.  Their semantics are slightly
different but they can be made to work as expected.

Also, use the same code paths for both MSVCRT and MinGW.

https://bugs.freedesktop.org/show_bug.cgi?id=91418

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-07-23 15:57:53 +01:00
Tom Stellard
a3b53beaa0 gallivm: Add ifdefs so raw_debug_stream is only defined when used
Its only use is to implement a custom version of LLVMDumpValue
on some Windows and embedded platforms.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-07-23 14:13:03 +00:00
Tom Stellard
9f7a68feaf gallivm: Don't use raw_debug_ostream for dissasembling
All LLVM API calls that require an ostream object have been removed from
the disassemble() function, so we don't need to use this class to wrap
_debug_printf() we can just call this function directly.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-07-23 14:12:56 +00:00
Ilia Mirkin
88818c4cd6 gk110/ir: fake BAR support
Makes things sorta work until we figure out the real way to do this.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:09 -04:00
Ilia Mirkin
fd092328e1 nvc0/ir: cleanup private enums that have graduated to gallium
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:09 -04:00
Ilia Mirkin
da89e75d9c nvc0/ir: allow tess eval output loads to be CSE'd
These only happen for gl_TessCoord which are constant.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:09 -04:00
Ilia Mirkin
77672cdb64 nvc0/ir: add hazard for 2nd dim of vfetch/load indirect argument
Apparently a multi-word load can potentially overwrite the indirect
sources, so make sure that RA picks different registers for those.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:09 -04:00
Ilia Mirkin
7cf2bffe82 nvc0/ir: patch vertex count is stored in the upper bits 2015-07-23 03:33:09 -04:00
Ilia Mirkin
e3e2df01bf nvc0/ir: add support for reading outputs in tess control shaders
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:09 -04:00
Ilia Mirkin
71744c0692 nvc0/ir: set perPatch flag on load/stores to per-patch varyings
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:09 -04:00
Ilia Mirkin
c2350fb3db nvc0/ir: populate info structure based on new tess properties
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:09 -04:00
Ilia Mirkin
59438a4d0e nvc0/ir: mark varyings as per-patch based on semantic name
Also add proper handling for PATCH semantics

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:08 -04:00
Ilia Mirkin
4b2a58a523 nvc0: TESSCOORD comes in as a sysval, not an input
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:08 -04:00
Ilia Mirkin
c8e5337a9a nvc0: add handling for set_tess_state callback
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:08 -04:00
Ilia Mirkin
d1ffdebce6 nvc0: add support for setting patch vertices at draw time
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:08 -04:00
Ilia Mirkin
b9ea557fd0 nvc0: support MAX_SHADER_PATCH_VARYINGS 2015-07-23 03:33:08 -04:00
Ilia Mirkin
f97c14f9e4 nvc0: preliminary tess support
Uncomment the various functionality that was already there and add in
obvious missing bits that parallel vp/gp/fp functionality.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-07-23 03:33:08 -04:00
Marek Olšák
bac12c8948 radeonsi: enable tessellation, update GL3.txt & release notes
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:33 +02:00
Marek Olšák
a193c4978b radeonsi: add scratch buffer support for tessellation shaders
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:33 +02:00
Marek Olšák
12df9a7876 radeonsi: update invariant registers for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:33 +02:00
Marek Olšák
99bf47f603 radeonsi: add assertions into draw_vbo and check tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:33 +02:00
Marek Olšák
5aa5f90823 radeonsi: set the rasterization primitive type for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:33 +02:00
Marek Olšák
3344699243 radeonsi: set VGT_LS_HS_CONFIG for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:33 +02:00
Marek Olšák
09d02fa463 radeonsi: update IA_MULTI_VGT_PARAM for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:33 +02:00
Marek Olšák
74c1001d13 radeonsi: add derived tessellation state
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:33 +02:00
Marek Olšák
db267a04ce radeonsi: implement a fixed-function tessellation control shader and its state
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
b6f4fdf6a9 radeonsi: set up a ring buffer for tessellation factors
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
ebfd9e0071 radeonsi: add tessellation shader states
ls_rsrc# will be emitted as part of the derived tessellation state

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
aa2fa6723a radeonsi: update si_get_vs_info and si_get_vs_state for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
fff16e4ad2 radeonsi: add shader code generation for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
4805685b6f radeonsi: implement TGSI_OPCODE_BARRIER
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
59b3556f4c radeonsi: program VGT_SHADER_STAGES_EN for tessellation
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
d9d0de4d28 radeonsi: add translation of PATCH primitives
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
55b6f1caae radeonsi: add support for tessellation shader resources and samplers
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:32 +02:00
Marek Olšák
d1f43a7e5b radeonsi: add code for creating, binding and destroying tessellation shaders
This doesn't do anything yet.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:31 +02:00
Marek Olšák
c2670463fd radeonsi: add debug flags for dumping tessellation shaders
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:31 +02:00
Marek Olšák
3ce91c727f radeonsi: rework how shader pointers to descriptors are set
This is mainly needed for tessellation where a VS can be bound as VS, ES,
or LS, and TES (tess. evaluationshader) can be bound as VS or ES or neither.
Therefore we need the ability to move pointers to descriptors between
shaders arbitrarily.

The idea is that the context has a mapping from PIPE_SHADER_x to
SPI_SHADER_USER_DATA_x. After a shader is enabled or disabled,
si_shader_change_notify should be called to update this mapping accordingly.

There is a dirty flag for each shader pointer, but only one emit function
for all pointers in the whole context, whose code and logic is separated
from descriptors.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:31 +02:00
Marek Olšák
57b6f8d9f9 radeonsi: rename build_streamout_store -> build_tbuffer_store_dwords
It will be reused later.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:31 +02:00
Marek Olšák
f66844820e radeonsi: separate primitive ID computation
Support for new shader stages will be added here.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:31 +02:00
Marek Olšák
aa1f2af572 radeonsi: move declaring streamout parameters to its own function
It will be reused later.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:31 +02:00
Marek Olšák
2ecb06b946 radeonsi: make ES2GS offset sgpr location dynamic
It will have a different location in the tessellation evaluation shader.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:31 +02:00
Marek Olšák
1bc0fba572 gallium/radeon: expose emit_fetch
Radeonsi will use this.
2015-07-23 00:59:31 +02:00
Marek Olšák
a3be59b4a9 gallium/radeon: expose LLVM functions implementing emit_store
emit_store will be reimplemented for tessellation control shader outputs
where only radeon_llvm_saturate will be used, but radeonsi will want to
fall back to radeon_llvm_emit_store for other register types.

This exposes both functions.
2015-07-23 00:59:31 +02:00
Marek Olšák
6b37643b82 winsys/radeon: implement buffer_unmap
This has been a no-op due to performance concerns. From now on, drivers
should decide when they don't want to unmap, not the winsys.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:24 +02:00
Marek Olšák
5e3974338e gallium/radeon: remove buffer_unmap calls that can potentially decrease perf
buffer_unmap is currently a no-op on radeon and done correctly on amdgpu.
I plan to fix it for radeon, but before that, all occurences of buffer_unmap
that can negatively affect performance in the future must be removed.

There are 2 reasons for removing buffer_unmap calls:
- There is a likelihood that buffer_map will be called again, so we don't
  want to unmap yet.
- The buffer is being released, which automatically unmaps it.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:24 +02:00
Marek Olšák
0aa2446e2c radeonsi: remove switch statement in si_create_context
and make si_init_config static

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 00:59:24 +02:00