Commit graph

217113 commits

Author SHA1 Message Date
Konstantin Seurer
079d416e99 nir: Fix the types of udot_.*_uadd_sat
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39076>
2026-01-15 19:09:37 +00:00
Konstantin Seurer
38d0bd7dd3 nir: Add an assert_eq intrinsic for testing nir_opt_algebraic
During the test this will compares both sources and fails the test if they
are not equal.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39076>
2026-01-15 19:09:37 +00:00
Emma Anholt
ed8676dc28 nir: Rename the unit_test_*_amd intrinics to be un-vendored.
We'll reuse these from the nir_opt_algebraic_pattern_test.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39076>
2026-01-15 19:09:37 +00:00
Emma Anholt
0dc3276a26 nir: Define udot_2x16_uadd_sat to have UB according to the SPIRV spec.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39076>
2026-01-15 19:09:32 +00:00
Emma Anholt
f638eb1b85 nir: Define extract/insert_i8 and friends to be UB if the shift is too large.
These opcodes are generated inside NIR algebraic when the shift is
constant, but this will help us do automated algebraic pattern testing
with arbitrary inputs that are unaware of the opcode's restrictions.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39076>
2026-01-15 19:09:32 +00:00
Emma Anholt
045ae759a5 nir: Specify f2i/f2u as undefined if the float is out of range of the int.
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39076>
2026-01-15 19:09:32 +00:00
Emma Anholt
94f0e2dbaf nir/constant_expressions: Set the poison flag during i/ubitfield_extract.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39076>
2026-01-15 19:09:32 +00:00
Emma Anholt
b375da7f2a nir: Let nir_eval_const_opcode() return a poison mask in case of UB.
This is unused by any callers currently, but will be useful for nir
algebraic pattern testing, and as a way to turn our comments in
nir_opcodes.py into actual C code.  For now, always returns false.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39076>
2026-01-15 19:09:32 +00:00
Emma Anholt
f6008645f6 nir: Fix constant evaluation of non-32-bit bitfield_extract.
Caught by nir_opt_algebraic_pattern_tests.

Fixes: 226b0e28db ("nir: generalize bitfield insert/extract sizes")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39076>
2026-01-15 19:09:29 +00:00
Samuel Pitoiset
ae34627e54 ac/cmdbuf: disable ENABLE_PING_PONG_BIN_ORDER on GFX11.5
Some checks are pending
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Might be a hardware bug.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14240
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39315>
2026-01-15 17:55:26 +00:00
Erik Faye-Lund
e7ac3b32a4 lima: update unknown field
Some checks are pending
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We know what's at the four bits starting at 11:0; that's the uniform
count. But we don't know whats at 12:0, so let's update the start
address here.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38493>
2026-01-15 13:40:09 +00:00
Nick Hamilton
68cb76de5d pco: Fix encoding of branch to an empty block
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When calculating the relative offset for a branch the pco_first_igrp
function is used to find the first instruction of a block.

However if the block is empty the function does not return NULL as it
description implies but returns a pointer to the list head which is not a
valid node. Using this leads to a garbage relative offset been calculated
which leads to unexpected behaviour.

Fix is to add a check for the list been empty and return NULL (the same
issue also exists in pco_last_igrp). This leads to the calling function,
pco_cf_node_offset, searching for the next none empty block which is the
expected behaviour.

Fix deqp:
dEQP-VK.graphicsfuzz.cov-two-nested-loops-switch-case-matrix-array-increment
dEQP-VK.graphicsfuzz.stable-binarysearch-tree-false-if-discard-loop

Signed-off-by: Nick Hamilton <nick.hamilton@imgtec.com>
Reviewed-by: Simon Perretta <simon.perretta@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39287>
2026-01-15 12:09:26 +00:00
Benjamin Cheng
371656de90 radv/video_enc: Remove CTS WA
This has been fixed in CTS since ebe05a88f36e3be8e232bfce97812353c396674a.

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39242>
2026-01-15 11:45:33 +00:00
Erik Faye-Lund
70889a672e docs/faq: do not recommend basing drivers on i965
We no longer have classic drivers, don't recommend people writing new
ones.

Reviewed-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19106>
2026-01-15 11:16:26 +00:00
Erik Faye-Lund
27e71d71f6 docs: remove ancient stuff from faq
These are very unlikely to be frequently asked questions in 2026.

Reviewed-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19106>
2026-01-15 11:16:26 +00:00
Dylan Baker
1055004693 anv: initialize anv_address to ensure that the protection field is set
It is unconditionally used, but is uninitialized.

CID: 1675079
Fixes: b1e74a1bb1 ("anv: shrink image opaque data")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39245>
2026-01-15 10:19:12 +00:00
Dylan Baker
bc1ccebb0e anv: Use { 0 } to initialize struct
The previous approach does ensure that all entries are zero'd, but that
may not be clear to the reader (i.e., me). Using `{ 0 }` is clearer.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39245>
2026-01-15 10:19:12 +00:00
Yogesh Mohan Marimuthu
ddf1e34dd6 winsys/amdgpu: userq job log fwm packet debug count
Some checks are pending
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Add WRITE_DATA packet before and after FENCE_WAIT_MULTI packet. Based
on the last number written in WRITE_DATA packet buffer, it can be
found if FENCE_WAIT_MULTI packet passed or not in CP firmware.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39206>
2026-01-15 09:45:10 +00:00
Yogesh Mohan Marimuthu
2547fd0f59 winsys/amdgpu: print userq job info
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39206>
2026-01-15 09:45:09 +00:00
Yogesh Mohan Marimuthu
a542715271 winsys/amdgpu: use mesa_log functions instead of fprintf
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39206>
2026-01-15 09:45:07 +00:00
Yogesh Mohan Marimuthu
f050e6ea74 util/log: add MESA_LOG_FILE_AUTO to generate log file
if set, creates a file in /tmp folder with mesa_<process_name>_<pid>_XXXXXX.log
logging all errors, warnings, etc., rather than stderr. The XXXXXX will be replaced
with alpha numeric character so for each run of the app a new log file will be
created guaranteed.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39206>
2026-01-15 09:45:04 +00:00
Marek Olšák
fa88c65bb8 radv,radeonsi: don't set LINE_STIPPLE_TEX_ENA on gfx12
Fixes: 3c5c96fedb - radv: double pixel throughput in certain cases of PS without interpolated inputs
Fixes: 5acabdd1f8 - radeonsi: double pixel throughput in certain cases of PS without inputs
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/14646

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39316>
2026-01-15 09:12:13 +00:00
Samuel Pitoiset
c559042a2a radv/dgc: adjust task+mesh SQTT markers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39178>
2026-01-15 09:43:00 +01:00
Samuel Pitoiset
82d00a4963 radv: fix missing SQTT markers for task+mesh draws
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39178>
2026-01-15 09:43:00 +01:00
Samuel Pitoiset
aee006efcd radv/sqtt: emit userdata in the gang CS when needed
For task shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39178>
2026-01-15 09:43:00 +01:00
Samuel Pitoiset
4da2e971e6 radv/sqtt: rework radv_emit_sqtt_userdata() to support gang CS
For task shaders.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39178>
2026-01-15 09:42:59 +01:00
Emma Anholt
8ed2447554 ir3: Rename the file for ir3_nir_lower_load_sample_pos().
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38911>
2026-01-15 07:52:14 +00:00
Emma Anholt
aea58ebb4b ir3: Use the new NIR pass for load_barycentric_at_* optimization.
The core pass can do our at_sample lowering, while also optimizing it and
at_offset.  This leaves just load_sample_pos lowering in our pass, which
will be renamed in the next commit.  However, the prior load_sample_pos
lowering needed to be split between load_sample_pos and
load_sample_pos_from_id, because the new at_sample lowering generates
load_sample_pos_from_id directly.

shader-db effect (Batman: Arkham Origins, Fallout4, GTAV, Metro Exodus,
Sherlock):

Totals from 150 (0.01% of 1560788) affected shaders:
MaxWaves: 1346 -> 1586 (+17.83%); split: +17.83%, -7.73%
Instrs: 31464 -> 30311 (-3.66%); split: -4.52%, +0.57%
CodeSize: 61962 -> 68216 (+10.09%); split: -1.05%, +12.94%
NOPs: 4598 -> 4556 (-0.91%); split: -10.46%, +10.24%
MOVs: 479 -> 523 (+9.19%); split: -17.12%, +32.36%
COVs: 180 -> 171 (-5.00%)
Full: 1300 -> 1067 (-17.92%)
(ss): 880 -> 842 (-4.32%); split: -15.80%, +10.91%
(sy): 510 -> 562 (+10.20%); split: -5.10%, +19.22%
(ss)-stall: 3112 -> 2930 (-5.85%); split: -21.30%, +19.06%
(sy)-stall: 13774 -> 12429 (-9.76%); split: -16.06%, +5.10%
Preamble Instrs: 6814 -> 12145 (+78.24%)
Early Preamble: 75 -> 13 (-82.67%)
Cat0: 4971 -> 4929 (-0.84%); split: -9.68%, +9.47%
Cat1: 650 -> 677 (+4.15%); split: -15.23%, +23.85%
Cat2: 15246 -> 15210 (-0.24%); split: -0.34%, +0.10%
Cat3: 9661 -> 9595 (-0.68%)
Cat4: 2382 -> 2358 (-1.01%)
Cat5: 2209 -> 1672 (-24.31%)
Cat7: 1075 -> 600 (-44.19%)
Subgroup size: 17600 -> 18880 (+7.27%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38911>
2026-01-15 07:52:14 +00:00
Emma Anholt
5bd669868f nir: Add a note on how load_sample_pos_from_id works.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38911>
2026-01-15 07:52:14 +00:00
Samuel Pitoiset
beb3872a4e zink/ci: document a GLX crash on RADV/POLARIS10
Some checks are pending
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39229>
2026-01-15 06:43:34 +00:00
Samuel Pitoiset
1917750baf ci: uprev VKCTS main to 4d3bedc74e2258c483cf968753207cff84d9e4fc
RADV is the only driver using VKCTS main.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39229>
2026-01-15 06:43:34 +00:00
Aitor Camacho
c3aa8f3572 util: Fix HAVE_BUILD_ID ifdefs
Fixes: a77e09eaeb ("util: Introduce HAVE_BUILD_ID for build id utils")

Reviewed-by: Corentin Noël <corentin.noel@collabora.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39201>
2026-01-15 06:12:05 +00:00
Aitor Camacho
1025715c6a kk: Fix compilation error when viewMask is 0
Some checks are pending
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Reviewed-By: Arcady Goldmints-Orlov <arcady@lunarg.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39321>
2026-01-15 04:54:45 +00:00
Paulo Zanoni
b52b1a08bf intel/blorp: add blorp_shaders.cl
This gives us the infrastructure that allows us to slowly migrate
pieces of blorp shaders from NIR to OpenCL, which, IMHO, are much
easier to read. We can't fully migrate everything due to all the
conditional building we do with these shaders, but I'm sure we'll find
opportunities to replace some NIR with OpenCL eventually.

The conversion of blorp_check_in_bounds() serves as the first example.

I also plan to have the shaders from the new indirect copy extension
be OpenCL shaders (mixed with some NIR as well), so having this patch
merged now will reduce the diff for the extension later.

Thanks to Alyssa Rosenzweig for her help here.

v2:
- Use SPDX (Alyssa).
- Use nir_trim_vector() (Alyssa).
- Adjust CL variable declaration (Alyssa).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39046>
2026-01-15 04:34:55 +00:00
Paulo Zanoni
f047f0b1be intel/blorp: unionize blorp_params->wm_inputs
We have two distinct code paths sharing blorp_params->wm_inputs for
different purposes: the code from blorp_blit.c and the code from
blorp_clear.c. While blorp_blit.c uses most of the parameters (all
except clear_color), blorp_clear.c only uses clear_color and
bounds_rect. Split the parameters in two structs: one for blits and
the other for clears.

This not only helps save some space in the shader inputs, but it also
organizes things so it's more clear which parameters are used by what.
In addition, my plan is to later add struct blorp_wm_inputs_indirect,
which won't share anything that the others use, and would otherwise
grow the struct even more.

This change would reduce the size of struct blorp_wm_inputs from 96 to
80, but we have to add padding due to the assertion that compares it
to cs_prog_data->push.cross_thread.size. Still good, though.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39046>
2026-01-15 04:34:55 +00:00
Paulo Zanoni
a8dd4382bf intel/blorp: generate the fast_clear_surf shaders later
Because blorp_params_get_clear_kernel() calls
blorp_params_get_clear_kernel_cs(), which reads params->num_samples,
which we have not properly set yet at this point.

I am also planning to have the functions that create the shader to
rely on params.op, which we have not set yet either.

I found this by inspection (when writing another patch), I'm not sure
if this fixes something relevant, but it may be relevant to ver >= 30
multi-sampled cases.

Fixes: de0c547448 ("blorp: Handle 2D MSAA array image copies on compute shader")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39046>
2026-01-15 04:34:55 +00:00
Paulo Zanoni
e360afdb8a intel/blorp: blorp_blit_vars_init() doesn't need 'key'
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39046>
2026-01-15 04:34:55 +00:00
Paulo Zanoni
39a78f764a blorp: reorganize struct blorp_params
When I first looked at this struct, my tiny little brain felt
overwhelmed.

- Add some white spaces in order to group the parameters into
  "logical" groups so it's easier to reason about everything.

- Change the parameter order just a little bit - without breaking the
  logical groups - so the struct size decreases by 1.7% to 1864 bytes.

- Add a comment explaining what the void * pointers point to.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39046>
2026-01-15 04:34:55 +00:00
Paulo Zanoni
c98f5e9994 blorp: replace magic '2' with BLORP_NUM_BT_ENTRIES
If we ever add more entries, things won't explode.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39046>
2026-01-15 04:34:55 +00:00
Paulo Zanoni
814cfa909d blorp: fix argument indentation
I'm sorry, but I have OCD and the rest of the file is nicely aligned.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39046>
2026-01-15 04:34:55 +00:00
Paulo Zanoni
548d172094 hasvk: restore anv_is_aligned()
On Broadwell, using the debug mode, you can't create even a single
VkImage:

    createimage: ../../src/util/u_math.h:829: util_is_aligned: Assertion `(a != 0) && ((a & (a - 1)) == 0)' failed.

    Thread 1 "createimage" received signal SIGABRT, Aborted.
    Download failed: Invalid argument.  Continuing without source file ./nptl/./nptl/pthread_kill.c.
    __pthread_kill_implementation (threadid=<optimized out>, signo=signo@entry=6, no_tid=no_tid@entry=0) at ./nptl/pthread_kill.c:44
    warning: 44	./nptl/pthread_kill.c: No such file or directory
    (gdb) bt
    #0  __pthread_kill_implementation (threadid=<optimized out>, signo=signo@entry=6, no_tid=no_tid@entry=0) at ./nptl/pthread_kill.c:44
    #1  0x00007ffff789573f in __pthread_kill_internal (threadid=<optimized out>, signo=6) at ./nptl/pthread_kill.c:89
    #2  0x00007ffff7840462 in __GI_raise (sig=sig@entry=6) at ../sysdeps/posix/raise.c:26
    #3  0x00007ffff78284ac in __GI_abort () at ./stdlib/abort.c:77
    #4  0x00007ffff7828420 in __assert_fail_base (fmt=<optimized out>, assertion=<optimized out>, file=<optimized out>, line=829, function=<optimized out>) at ./assert/assert.c:118
    #5  0x00007ffff5a5fb0c in util_is_aligned (n=0, a=0) at ../../src/util/u_math.h:829
    #6  0x00007ffff5a6060d in memory_range_end (memory_range=...) at ../../src/intel/vulkan_hasvk/anv_image.c:51
    #7  0x00007ffff5a61c52 in check_memory_range_s (p=0x7fffffffd800) at ../../src/intel/vulkan_hasvk/anv_image.c:779
    #8  0x00007ffff5a61ef3 in check_memory_bindings (device=0x555555654d50, image=0x55555566e050) at ../../src/intel/vulkan_hasvk/anv_image.c:830
    #9  0x00007ffff5a62ea3 in anv_image_init (device=0x555555654d50, image=0x55555566e050, create_info=0x7fffffffd9d0) at ../../src/intel/vulkan_hasvk/anv_image.c:1263
    #10 0x00007ffff5a63147 in anv_image_init_from_create_info (device=0x555555654d50, image=0x55555566e050, pCreateInfo=0x7fffffffda80) at ../../src/intel/vulkan_hasvk/anv_image.c:1333
    #11 0x00007ffff5a63211 in anv_CreateImage (_device=0x555555654d50, pCreateInfo=0x7fffffffda80, pAllocator=0x0, pImage=0x7fffffffdd20) at ../../src/intel/vulkan_hasvk/anv_image.c:1356
    #12 0x00007ffff44ff376 in vvl::dispatch::Device::CreateImage (this=0x55555562c480, device=0x555555654d50, pCreateInfo=0x7fffffffdcb8, pAllocator=0x0, pImage=0x7fffffffdd20)
        at ./layers/vulkan/generated/dispatch_object.cpp:1160
    #13 0x00007ffff43e8214 in vulkan_layer_chassis::CreateImage (device=0x555555654d50, pCreateInfo=0x7fffffffdcb8, pAllocator=0x0, pImage=0x7fffffffdd20) at ./layers/vulkan/generated/chassis.cpp:2181
    #14 0x0000555555560af4 in vks::Image::init (this=0x7fffffffdcb0) at /home/przanoni/git/random-stuff/vk/vks/libvulkanscript.hpp:1298
    #15 0x000055555556557d in main () at createimage.cpp:36

Since we haven't noticed this issue as quickly as I imagined we would,
let's opt for what's mostly a revert of the behavior change in the
original commit.

Fixes: 7be63ef956 ("intel: do not NIH util_is_aligned")
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39045>
2026-01-15 04:20:29 +00:00
Mike Blumenkrantz
c9e523be97 zink: allow rendering to emulated alpha images for clears
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when executing a renderpass which is only a clear, an emulated alpha
image will have the correct value applied from having the clear value
rewritten. this still can't handle draws, but it's a small expansion of
functionality which fixes some edge cases

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39318>
2026-01-15 01:33:20 +00:00
Mike Blumenkrantz
cf9c23a5e2 zink: correctly use GENERAL layout for dynamic texture clears
missed this case

Fixes: 622612f67e ("zink: hook up global GENERAL image layouts")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39318>
2026-01-15 01:33:20 +00:00
Ian Romanick
d19ea686d3 iris/elk: Restore setting nir->num_uniforms to zero.
Elk still uses param array, so it depends on this behavior. This fixes
an assertion failure on Broadwell in gfxbench4/carchase/339.shader_test.

src/intel/compiler/elk/elk_fs_nir.cpp:148: void fs_nir_setup_uniforms(elk_fs_visitor&): Assertion `s.uniforms == s.prog_data->nr_params' failed.

Fixes: f4a0e05970 ("anv/brw/iris: get rid of param array on prog_data")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39280>
2026-01-15 01:13:24 +00:00
Natalie Vock
6f076cdfda radv: Use wave32 for RT on gfx11+
ACO got a lot better at forming VOPD instructions, and testing
feedback seems to point in a slightly positive direction for this.

gfx12 will also start requiring wave32 for dynamic VGPR allocation at
some point.

Measurements on navi31:

Cyberpunk 2077:
Difference at 95.0% confidence
        1.12333 +/- 0.42876
        1.88216% +/- 0.718391%
        (Student's t, pooled s = 0.189165)

Black Myth Wukong benchmark:
Difference at 95.0% confidence
        4 +/- 1.30862
        13.9535% +/- 4.56495%
        (Student's t, pooled s = 0.57735)

Portal with RTX:
66.2ms->61.5ms (~7.64% improvement)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39275>
2026-01-14 23:39:24 +00:00
Aitor Camacho
fcf53988c4 nir/opt_varyings: Support implementations that cannot compact 16-bits
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Add nir_io_compact_to_higher_16 flag so that the pass knows if it can
compact 16-bit varyings into the higher 16 bits of a 32-bit varying.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Aitor Camacho <aitor@lunarg.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38994>
2026-01-14 20:44:41 +00:00
Georg Lehmann
fdfe3acdf0 nir/constant_expression: remove fquantize2f16 denorm special case
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Unnessecary, as any fp32 denorm would be 0 here already.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39266>
2026-01-14 17:05:24 +00:00
Georg Lehmann
631a7ef92a nir: make fquantize2f16 32bit only
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39266>
2026-01-14 17:05:24 +00:00
Alejandro Piñeiro
ec4bcbd26d pan/bi: report stats only if the shaders got compiled
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There are some situations where we don't get a binary. In those cases
it is not relevant to report the statistics.

This was detected while using shader-db, with a shader that has a xfb
vertex shader that was not writing to gl_Position. It that case
IDVS_POSITION binary was zero, so later compiling IDVS_VARYING was
skipped. Due the skip, the pan_stat structure was not initialized, so
the debug used the wrong isa, that used different measurements. This
lead to shader-db report tool failing, due having a mix-up of
measurements.

Although an alternative would be to try to ensure that the structure
is always initialized, seems just more natural to just not report on
shaders with empty binaries (as the stats would be zero for all
measurements).

Reviewed-by: Christoph Pillmayer <christoph.pillmayer@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39310>
2026-01-14 15:38:40 +00:00
Natalie Vock
cc81c7de23 nir,aco: Clean up useless lowering of sbt_base_amd
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29580>
2026-01-14 14:19:07 +00:00