Lionel Landwerlin 18bbcf9a63 intel: introduce new VUE layout for separate compiled shader with mesh ... Mesh shaders have per vertex block in URB pretty much identical to the VUE format. Let's just reuse that concept to do all of our layout in the payload attribute registers. This will ensure that we have consistent VUE layout between Mesh & non-Mesh pipelines. We need a new way of laying out the VUE though as we have to accomodate a HW constraint of maximum (per-primitive + per-vertex) of 32 varying. This means we cannot have 2 locations in the payload for things like PrimitiveID which can come from either the per-primitive or the per-vertex block. The new layout places the PrimitiveID at the end of the per-vertex attributes and shrinks the delivery dynamically if the mesh stage is active. The shader is compiled with a MOV_INDIRECT to read the PrimitiveID from the right location in the attributes. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Ivan Briano <ivan.briano@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34109>		2025-05-08 06:48:35 +00:00
..
elk	intel: prepare VUE layout for more than 2 layouts	2025-05-08 06:48:35 +00:00
tests	brw: Rename shared function enums for clarity	2025-02-27 08:49:24 +00:00
brw_analysis.cpp	brw: Make brw_range use half-open ranges	2025-04-09 19:06:49 +00:00
brw_analysis.h	brw: Track the largest VGRF size in liveness analysis	2025-04-11 20:34:51 +00:00
brw_analysis_def.cpp	brw: Add basic infrastructure for load_reg pseudo op	2025-04-04 06:45:02 +00:00
brw_analysis_liveness.cpp	brw: Track the largest VGRF size in liveness analysis	2025-04-11 20:34:51 +00:00
brw_analysis_performance.cpp	intel/compiler: Add support for MSAA typed load/store messages	2025-03-07 23:06:14 +00:00
brw_asm.c	brw: Rework label tracking in assembler	2025-03-06 17:06:20 -08:00
brw_asm.h	brw: Fix size in assembler when compacting	2025-03-03 20:43:56 +00:00
brw_asm_internal.h	brw: Rework label tracking in assembler	2025-03-06 17:06:20 -08:00
brw_asm_tool.c	intel/compiler: fix lingering i965 references	2025-04-03 03:17:25 +00:00
brw_builder.cpp	brw: Add brw_builder::uniform()	2025-04-04 23:07:21 +00:00
brw_builder.h	brw: Add brw_builder::uniform()	2025-04-04 23:07:21 +00:00
brw_cfg.cpp	brw: Remove adjust_block_ips and brw_inst::remove() with defer	2025-03-29 00:25:51 +00:00
brw_cfg.h	brw: Remove adjust_block_ips and brw_inst::remove() with defer	2025-03-29 00:25:51 +00:00
brw_compile_bs.cpp	brw: fix Wa_22013689345 emission	2025-04-10 16:44:28 +00:00
brw_compile_cs.cpp	brw: fix Wa_22013689345 emission	2025-04-10 16:44:28 +00:00
brw_compile_fs.cpp	intel: introduce new VUE layout for separate compiled shader with mesh	2025-05-08 06:48:35 +00:00
brw_compile_gs.cpp	intel: prepare VUE layout for more than 2 layouts	2025-05-08 06:48:35 +00:00
brw_compile_mesh.cpp	intel: introduce new VUE layout for separate compiled shader with mesh	2025-05-08 06:48:35 +00:00
brw_compile_tcs.cpp	intel: prepare VUE layout for more than 2 layouts	2025-05-08 06:48:35 +00:00
brw_compile_tes.cpp	intel: prepare VUE layout for more than 2 layouts	2025-05-08 06:48:35 +00:00
brw_compile_vs.cpp	brw: fix Wa_22013689345 emission	2025-04-10 16:44:28 +00:00
brw_compiler.c	intel: introduce new VUE layout for separate compiled shader with mesh	2025-05-08 06:48:35 +00:00
brw_compiler.h	intel: introduce new VUE layout for separate compiled shader with mesh	2025-05-08 06:48:35 +00:00
brw_debug_recompile.c	intel/brw: Simplify @file annotations	2024-07-22 22:48:03 +00:00
brw_device_sha1_gen_c.py	intel/compiler: drop unused ray-tracing fields from cache hash	2024-03-22 00:01:28 +00:00
brw_disasm.c	intel/brw: support for dumping shader line numbers	2025-04-08 19:39:53 +00:00
brw_disasm.h	intel/brw: support for dumping shader line numbers	2025-04-08 19:39:53 +00:00
brw_disasm_info.cpp	intel/brw: support for dumping shader line numbers	2025-04-08 19:39:53 +00:00
brw_disasm_info.h	intel/brw: Rename fs_inst to brw_inst	2025-01-31 00:57:21 +00:00
brw_disasm_tool.c	intel/brw: Remove Gfx8- code from disassembler	2024-02-28 05:45:38 +00:00
brw_eu.c	intel/brw: support for dumping shader line numbers	2025-04-08 19:39:53 +00:00
brw_eu.h	brw: Add assembler support for DPAS	2025-03-25 01:40:02 +00:00
brw_eu_compact.c	brw: Add support for GOTO/JOIN in the assembler	2025-03-06 17:06:20 -08:00
brw_eu_defines.h	brw/nir: add intrinsics to read attribute payload register indirectly	2025-05-08 06:48:35 +00:00
brw_eu_emit.c	brw: Add BRW_TYPE_BF for bfloat16	2025-03-25 05:23:37 +00:00
brw_eu_inst.h	brw: Add BRW_TYPE_BF for bfloat16	2025-03-25 05:23:37 +00:00
brw_eu_validate.c	brw: Update EU validation to allow packed BF mixed with packed F	2025-04-14 18:23:43 +00:00
brw_from_nir.cpp	intel: introduce new VUE layout for separate compiled shader with mesh	2025-05-08 06:48:35 +00:00
brw_generator.cpp	brw: fix shuffle with scalar/uniform index	2025-04-08 20:14:11 +00:00
brw_generator.h	brw: factor out base prog_data setting	2025-02-22 08:30:22 +00:00
brw_gram.y	brw: Add EU assembler support for bfloat16	2025-03-25 05:23:37 +00:00
brw_inst.cpp	brw: Consider bfloat16 in lower regioning pass	2025-04-29 16:29:37 +00:00
brw_inst.h	brw: Consider bfloat16 in lower regioning pass	2025-04-29 16:29:37 +00:00
brw_isa_info.h	intel/compiler: Use #pragma once instead of header guards	2024-12-11 19:47:44 +00:00
brw_kernel.c	treewide: Switch to nir_progress	2025-02-26 15:19:53 +00:00
brw_kernel.h	intel: rework CL pre-compile	2025-01-25 03:28:07 +00:00
brw_lex.l	brw: Add EU assembler support for bfloat16	2025-03-25 05:23:37 +00:00
brw_load_reg.cpp	brw: Add passes to generate and lower load_reg	2025-04-04 06:45:02 +00:00
brw_lower.cpp	brw: Implement support for BFloat16 ALU opcodes	2025-04-29 16:29:37 +00:00
brw_lower_dpas.cpp	brw: Simplify brw_builder "insert before inst" constructor	2025-03-06 23:33:38 +00:00
brw_lower_integer_multiplication.cpp	brw: Remove bblock_t parameters from various passes	2025-03-06 23:33:38 +00:00
brw_lower_logical_sends.cpp	intel/compiler: Fix stackIDs on Xe2+	2025-04-29 17:03:35 +00:00
brw_lower_pack.cpp	brw: Simplify brw_builder "insert before inst" constructor	2025-03-06 23:33:38 +00:00
brw_lower_regioning.cpp	brw: Consider bfloat16 in lower regioning pass	2025-04-29 16:29:37 +00:00
brw_lower_scoreboard.cpp	brw: Use brw_range::last() to explicit get the last valid IP	2025-04-09 19:06:49 +00:00
brw_lower_simd_width.cpp	brw/nir: add intrinsics to read attribute payload register indirectly	2025-05-08 06:48:35 +00:00
brw_lower_subgroup_ops.cpp	brw: Add brw_builder::uniform()	2025-04-04 23:07:21 +00:00
brw_nir.c	intel: introduce new VUE layout for separate compiled shader with mesh	2025-05-08 06:48:35 +00:00
brw_nir.h	brw/nir: use a new intrinsic for fs_msaa_flag	2025-05-08 06:48:34 +00:00
brw_nir_analyze_ubo_ranges.c	intel/compiler: take reg_unit size into account with ubo ranges	2025-01-07 21:38:06 +00:00
brw_nir_lower_alpha_to_coverage.c	brw/nir: use a new intrinsic for fs_msaa_flag	2025-05-08 06:48:34 +00:00
brw_nir_lower_cooperative_matrix.c	intel: Add support for BFloat16 as cooperative matrix source	2025-04-29 16:29:37 +00:00
brw_nir_lower_cs_intrinsics.c	treewide: Switch to nir_progress	2025-02-26 15:19:53 +00:00
brw_nir_lower_fs_msaa.c	brw/nir: use a new intrinsic for fs_msaa_flag	2025-05-08 06:48:34 +00:00
brw_nir_lower_fsign.py	intel/brw: Use range analysis to optimize fsign	2024-05-14 01:28:21 +00:00
brw_nir_lower_intersection_shader.c	intel/compiler: Update MemRay data structure to 64-bit	2025-04-21 20:10:45 +00:00
brw_nir_lower_ray_queries.c	intel/rt: Update BVH instance leaf load for Xe3+	2025-04-21 20:10:45 +00:00
brw_nir_lower_rt_intrinsics.c	intel/rt: Update BVH instance leaf load for Xe3+	2025-04-21 20:10:45 +00:00
brw_nir_lower_rt_intrinsics_pre_trace.c	brw: add pre ray trace intrinsic moves	2025-05-06 13:34:53 +00:00
brw_nir_lower_sample_index_in_coord.c	intel/compiler: Lower sample index into coord for MSRT messages	2025-03-07 23:06:14 +00:00
brw_nir_lower_shader_calls.c	intel/compiler: Update MemRay data structure to 64-bit	2025-04-21 20:10:45 +00:00
brw_nir_lower_storage_image.c	brw: add support for 64bit storage images load/store	2025-02-23 15:16:50 +00:00
brw_nir_lower_texel_address.c	intel/compiler: Use correct enum type	2025-03-13 20:11:10 +00:00
brw_nir_lower_texture.c	brw: move texture offset packing to NIR	2025-03-29 02:15:18 +00:00
brw_nir_opt_fsat.c	treewide: Switch to nir_progress	2025-02-26 15:19:53 +00:00
brw_nir_rt.c	intel/compiler/rt: Calculate barycentrics on demand	2025-04-21 20:10:45 +00:00
brw_nir_rt.h	brw: add pre ray trace intrinsic moves	2025-05-06 13:34:53 +00:00
brw_nir_rt_builder.h	intel/rt: Update BVH instance leaf load for Xe3+	2025-04-21 20:10:45 +00:00
brw_nir_trig_workarounds.py	driconf: Add a limit_trig_input_range option	2022-05-13 06:47:53 +00:00
brw_opt.cpp	intel/compiler: Always run opt_algebraic after descriptor_lowering	2025-04-19 07:05:54 +00:00
brw_opt_address_reg_load.cpp	brw: Add brw_builder::uniform()	2025-04-04 23:07:21 +00:00
brw_opt_algebraic.cpp	brw/algebraic: Convert some NOT to MOV	2025-04-28 19:44:23 +00:00
brw_opt_bank_conflicts.cpp	intel/brw: Rename fs_visitor to brw_shader	2025-02-11 09:13:28 +00:00
brw_opt_cmod_propagation.cpp	brw/cmod: Allow integer CMP to ADD propagation only for Z and NZ	2025-04-28 19:44:23 +00:00
brw_opt_combine_constants.cpp	brw: Use brw_inst::block in Combine Constants	2025-03-06 23:33:38 +00:00
brw_opt_copy_propagation.cpp	brw: Consider bfloat16 in copy propagation	2025-04-29 16:29:37 +00:00
brw_opt_cse.cpp	brw: make HALT instruction act as barrier in new CSE pass	2025-04-29 20:28:24 +00:00
brw_opt_dead_code_eliminate.cpp	brw: Remove adjust_block_ips and brw_inst::remove() with defer	2025-03-29 00:25:51 +00:00
brw_opt_register_coalesce.cpp	brw: Use live->max_vgrf_size in register coalescing	2025-04-11 20:34:51 +00:00
brw_opt_saturate_propagation.cpp	brw: Clean up saturate propagation after non-defs version removal	2025-04-09 19:06:48 +00:00
brw_opt_txf_combiner.cpp	brw: Simplify brw_builder "insert before inst" constructor	2025-03-06 23:33:38 +00:00
brw_opt_virtual_grfs.cpp	brw: Don't assert about MAX_VGRF_SIZE in brw_opt_split_virtual_grfs()	2025-04-11 20:34:51 +00:00
brw_packed_float.c	intel/compiler: Cast to target type before shifting left	2019-10-24 16:19:23 +02:00
brw_prim.h	intel/compiler: Use #pragma once instead of header guards	2024-12-11 19:47:44 +00:00
brw_print.cpp	brw/nir: add intrinsics to read attribute payload register indirectly	2025-05-08 06:48:35 +00:00
brw_private.h	intel/brw: Rename a few remaining functions to remove fs prefix	2025-02-11 09:13:28 +00:00
brw_reg.cpp	intel/compiler: Use unreachable instead of assert(!"...")	2025-03-13 20:11:10 +00:00
brw_reg.h	brw: Add BRW_TYPE_BF for bfloat16	2025-03-25 05:23:37 +00:00
brw_reg_allocate.cpp	brw: Make brw_range use half-open ranges	2025-04-09 19:06:49 +00:00
brw_reg_type.c	brw: Add BRW_TYPE_BF for bfloat16	2025-03-25 05:23:37 +00:00
brw_reg_type.h	brw: Add BRW_TYPE_BF for bfloat16	2025-03-25 05:23:37 +00:00
brw_rt.h	intel/compiler: Use #pragma once instead of header guards	2024-12-11 19:47:44 +00:00
brw_schedule_instructions.cpp	brw: Use live->max_vgrf_size in pre-RA scheduling	2025-04-11 20:34:51 +00:00
brw_shader.cpp	intel: introduce new VUE layout for separate compiled shader with mesh	2025-05-08 06:48:35 +00:00
brw_shader.h	intel: introduce new VUE layout for separate compiled shader with mesh	2025-05-08 06:48:35 +00:00
brw_simd_selection.cpp	intel/brw/xe3+: Optimize CS/TASK/MESH compile time optimistically assuming SIMD32.	2025-01-29 23:39:32 +00:00
brw_spirv.c	nir/peephole_select: add options struct	2025-02-20 21:59:16 +00:00
brw_thread_payload.cpp	brw: Embed at_end() inside brw_builder(brw_shader *) constructor	2025-03-06 23:33:38 +00:00
brw_thread_payload.h	intel/brw: Rename fs_visitor to brw_shader	2025-02-11 09:13:28 +00:00
brw_validate.cpp	brw: Add basic infrastructure for load_reg pseudo op	2025-04-04 06:45:02 +00:00
brw_vue_map.c	intel: introduce new VUE layout for separate compiled shader with mesh	2025-05-08 06:48:35 +00:00
brw_workaround.cpp	brw: fix Wa_22013689345 emission	2025-04-10 16:44:28 +00:00
intel_clc.c	intel/brw: support for dumping shader line numbers	2025-04-08 19:39:53 +00:00
intel_gfx_ver_enum.h	intel/compiler: Use #pragma once instead of header guards	2024-12-11 19:47:44 +00:00
intel_nir.c	intel/compiler: Use nir_split_conversions()	2025-04-07 17:45:21 -05:00
intel_nir.h	anv: lower input vertices for TCS unconditionally	2025-05-08 06:48:34 +00:00
intel_nir_blockify_uniform_loads.c	intel: switch to nir_metadata_divergence	2025-02-13 10:08:43 +00:00
intel_nir_clamp_image_1d_2d_array_sizes.c	treewide: use nir_metadata_control_flow	2024-06-17 16:28:14 -04:00
intel_nir_clamp_per_vertex_loads.c	anv: lower input vertices for TCS unconditionally	2025-05-08 06:48:34 +00:00
intel_nir_lower_non_uniform_barycentric_at_sample.c	intel: switch to nir_metadata_divergence	2025-02-13 10:08:43 +00:00
intel_nir_lower_non_uniform_resource_intel.c	treewide: use nir_metadata_control_flow	2024-06-17 16:28:14 -04:00
intel_nir_lower_printf.c	nir: drop printf_base_identifier	2025-02-05 20:33:15 +00:00
intel_nir_lower_shading_rate_output.c	treewide: use nir_metadata_control_flow	2024-06-17 16:28:14 -04:00
intel_nir_lower_sparse.c	treewide: use nir_metadata_control_flow	2024-06-17 16:28:14 -04:00
intel_nir_opt_peephole_ffma.c	treewide: use nir_metadata_control_flow	2024-06-17 16:28:14 -04:00
intel_nir_opt_peephole_imul32x16.c	treewide: use nir_metadata_control_flow	2024-06-17 16:28:14 -04:00
intel_nir_tcs_workarounds.c	treewide: Switch to nir_progress	2025-02-26 15:19:53 +00:00
intel_shader_enums.h	intel: introduce new VUE layout for separate compiled shader with mesh	2025-05-08 06:48:35 +00:00
meson.build	brw/nir: use a new intrinsic for fs_msaa_flag	2025-05-08 06:48:34 +00:00
test_eu_compact.cpp	intel/brw: Rename brw_inst_* helpers to brw_eu_inst_*	2024-12-30 17:16:15 +00:00
test_eu_validate.cpp	brw: Allow DPAS with BF on Gfx125	2025-04-14 18:23:43 +00:00
test_helpers.cpp	brw: Simplify the test code for brw passes	2025-03-13 17:43:17 +00:00
test_helpers.h	brw: Simplify the test code for brw passes	2025-03-13 17:43:17 +00:00
test_insert_load_reg.cpp	brw: Add passes to generate and lower load_reg	2025-04-04 06:45:02 +00:00
test_lower_scoreboard.cpp	brw: Fix invalid memory access in scoreboard test	2025-04-05 22:58:23 -07:00
test_opt_algebraic.cpp	brw/algebraic: Don't optimize float SEL.CMOD to MOV	2025-04-15 23:59:31 +00:00
test_opt_cmod_propagation.cpp	brw/cmod: Don't propagate from CMP to possible Inf + (-Inf)	2025-04-28 19:44:23 +00:00
test_opt_combine_constants.cpp	brw: Add brw_builder::uniform()	2025-04-04 23:07:21 +00:00
test_opt_copy_propagation.cpp	brw: Simplify the test code for brw passes	2025-03-13 17:43:17 +00:00
test_opt_cse.cpp	brw: Simplify the test code for brw passes	2025-03-13 17:43:17 +00:00
test_opt_register_coalesce.cpp	brw: Add a few basic tests for register coalesce	2025-04-09 19:06:48 +00:00
test_opt_saturate_propagation.cpp	brw/sat: Eliminate non-defs saturate propagation	2025-04-04 06:45:02 +00:00
test_simd_selection.cpp	intel: Switch uint64_t intel_debug to a bitset	2025-04-22 23:09:26 +00:00
test_vf_float_conversions.cpp	i965: Move the back-end compiler to src/intel/compiler	2017-03-13 11:16:34 +00:00