Commit graph

98538 commits

Author SHA1 Message Date
Kenneth Graunke
fd3fc5f547 i965: Don't allocate an MCS for 16x MSAA and width > 8192.
The hardware doesn't support this, and isl_surf_get_mcs_surf will fail.

I feel a bit bad replicating this logic, but we want to decide up front.

This fixes the following test when run with --deqp-surface-width=16384:
- GTF-GL46.gtf30.GL3Tests.framebuffer_blit.framebuffer_blit_error_blitframebuffer_multisampled_framebuffers_different_sample_count

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2017-12-14 00:37:33 -08:00
Rob Herring
546633dce2 Android: fix missing generation of vtn_gather_types.c
Commit bb1e6ff161 ("spirv: Add a prepass to set types on vtn_values")
added generation of vtn_gather_types.c, but forgot to add it to the
Android build files.

Fixes: bb1e6ff161 ("spirv: Add a prepass to set types on vtn_values")
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2017-12-13 16:20:15 -06:00
Dylan Baker
e5d8ffdda6 mesa: Add glSpecializeShaderARB to common_desktop_functions
CC: Nicolai Hähnle <nicolai.haehnle@amd.com>
CC: Mark Janes <mark.a.janes@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104231
Fixes: 46b21b8f90 ("mesa: add GL_ARB_gl_spirv boilerplate")
Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-12-13 13:24:57 -08:00
Tomasz Figa
5364e73624 egl/android: Partially handle HAL_PIXEL_FORMAT_IMPLEMENTATION_DEFINED
There is no API available to properly query the IMPLEMENTATION_DEFINED
format. As a workaround we rely here on gralloc allocating either
an arbitrary YCbCr 4:2:0 or RGBX_8888, with the latter being recognized
by lock_ycbcr failing.

Reviewed-on: https://chromium-review.googlesource.com/566793

Signed-off-by: Tomasz Figa <tfiga@chromium.org>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Signed-off-by: Robert Foss <robert.foss@collabora.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2017-12-13 14:51:48 -06:00
Bruce Cherniak
ea2ee9cd19 swr: Correct texture allocation and limit max size to 2GB
This patch fixes piglit tex3d-maxsize by correcting 4 things:

The total_size calculation was using 32-bit math, therefore a >4GB
allocation request overflowed and was not returning false (unsupported).

Changed AlignedMalloc arguments from "unsigned int" to size_t, to handle
>4GB allocations.

Added error checking on texture allocations to fail gracefully.

Finally, temporarily decreased supported max texture size from 4GB to 2GB.
The gallivm texture-sampler needs some additional work to correctly handle
larger than 2GB textures (offsets to LLVMBuildGEP are signed).

I'm working on a follow-on patch to allow up to 4GB textures, as this is
useful in HPC visualization applications.

Fixes piglit tex3d-maxsize.

v2: Updated patch description to clarify ">4GB".

Reviewed-By: George Kyriazis <george.kyriazis@intel.com>
2017-12-13 14:44:04 -06:00
Bruce Cherniak
709f5bdc4a swr: Fix KNOB_MAX_WORKER_THREADS thread creation override.
Environment variable KNOB_MAX_WORKER_THREADS allows the user to override
default thread creation and thread binding.  Previous commit to adjust
linux cpu topology caused setting this KNOB to bind all threads to a single
core.

This patch restores correct functionality of override.

Cc: <mesa-stable@lists.freedesktop.org>

Reviewed-by: Tim Rowley <timothy.o.rowley@intel.com>
2017-12-13 14:44:01 -06:00
Dylan Baker
1774c10361 meson: fix glx-test race
This test should rely on dispatch.h being generated, but it doesn't.

Signed-off-by: Dylan Baker <dylanx.c.baker@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-12-13 09:37:12 -08:00
Brian Paul
c27a6c45c2 gallium/docs: document behavior of set_sample_mask()
The sample mask is used even if msaa is not explicity enabled when we
have a framebuffer with multisampled surfaces.  That's DX behavior and
what the Radeon drivers do.  Not sure about other drivers at this point.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-12-13 08:38:07 -07:00
Brian Paul
0f2bd31baf glsl: trivial whitespace fixes in link_varyings.cpp 2017-12-13 08:38:07 -07:00
Jordan Justen
dc07bb5fd1 program: Don't reset SamplersValidated when restoring from shader cache
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103988
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-12-13 00:31:06 -08:00
Kai Wasserbäch
729fec6eab mesa: remove second include of errors.h in src/mesa/main/glspirv.c
Fixes: 5bc03d2508 ("mesa: implement SPIR-V loading in glShaderBinary")
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-12-12 23:42:53 -08:00
Timothy Arceri
3308f4b81a radeonsi: create get_tcs_tes_buffer_address helper
This will be shared between the NIR and TGSI backends.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-13 13:41:53 +11:00
Timothy Arceri
a5f9ac2928 ac: fix nir_op_f2f64
Without this we get the error "FPExt only operates on FP" when
converting the following:

   vec1 32 ssa_5 = b2f ssa_4
   vec1 64 ssa_6 = f2f64 ssa_5

Which results in:

   %44 = and i32 %43, 1065353216
   %45 = fpext i32 %44 to double

With this patch we now get:

   %44 = and i32 %43, 1065353216
   %45 = bitcast i32 %44 to float
   %46 = fpext float %45 to double

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-12-13 13:20:28 +11:00
Timothy Arceri
cab5513b47 nir: fix shift for uint64_t
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-13 13:20:28 +11:00
Timothy Arceri
dd119a4263 st/glsl_to_nir: skip forced array splitting for tcs
nir_lower_io_to_temporaries() does not support tcs so we cannot
assume there are no indirects here. Also the radeonsi backend
(the only backend to support tess) has support for tcs indirects
so there is no need to lower them anyway.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-12-13 13:20:28 +11:00
Francisco Jerez
acab52f520 intel/fs/bank_conflicts: Don't touch Gen7 MRF hack registers.
Fixes: af2c320190 "intel/fs: Implement GRF bank conflict mitigation pass."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104199
Reported-by: Darius Spitznagel <d.spitznagel@goodbytez.de>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2017-12-12 12:05:45 -08:00
Kevin Rogovin
b1ce812c51 i965: compute scratch space size correctly for Gen9+
Fixes: 8ecdbb6136 "i965: Pretend there are 4 subslices for compute shader threads on Gen9+."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104005
Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Tested-by: Eero Tamminen <eero.t.tamminen@intel.com>
2017-12-12 10:02:43 -08:00
Kevin Rogovin
eea9027f87 i965: Program MEDIA_VFE_STATE in a more readable fashion.
This patch is purely for readability improvements when programming
the MEDIA_VFE_STATE.

Signed-off-by: Kevin Rogovin <kevin.rogovin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-12-12 10:02:31 -08:00
Brian Paul
7469966ed2 cso: add point rasterization sanity check assertion
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2017-12-12 09:46:18 -07:00
Brian Paul
38a4fd8ad6 gallium/u_blitter: replace tabs with spaces
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-12 09:46:18 -07:00
Brian Paul
7a46063803 xlib: call _mesa_warning() instead of fprintf()
We use _mesa_warning() everywhere else in this code.  Change requested
by Rick Irons of Mathworks.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-12-12 09:44:59 -07:00
Brian Paul
63b03dc924 gallium/util: don't pass a pipe_resource to util_resource_is_array_texture()
No need to pass a pipe_resource when we can just pass the target.
This makes the function potentially more usable.  Rename it too.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-12 09:44:59 -07:00
Brian Paul
dde8309cde gallium/aux: include nr_samples in util_resource_size() computation
This function is only used in two places:
1. VMware driver, but only for HUD reporting
2. st/nine state tracker, used for texture memory accounting

Fixes: a69efa9482 ("util: add new util_resource_size() function in
u_resource.[ch]")

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-12 09:44:59 -07:00
Brian Paul
09b69828a3 svga: trivial whitespace/formatting fixes in svga_pipe_rasterizer.c 2017-12-12 09:44:59 -07:00
Brian Paul
71ac73ce76 st/mesa: trivial whitespace/formatting fixes in st_atom_rasterizer.c 2017-12-12 09:44:59 -07:00
Jason Ekstrand
9718ce44c2 spirv: Handle image and sampler function parameters 2017-12-12 07:34:46 -08:00
Jason Ekstrand
7d3ebd1286 spirv/cfg: Refactor the function parameter loop a bit 2017-12-12 07:34:46 -08:00
Jason Ekstrand
e6ba457c99 spirv/cfg: Be a bit more precise about function parameters
Pointers with no storage type are converted to inout variables but SSA
values and pointers with a storage type (which turns into a uint or
uvec2) are just input variables.
2017-12-12 07:34:46 -08:00
Jason Ekstrand
aaeda8d7d4 spirv: Make sampled images a real type
Previously, we just gave them exactly the same type as the respective
image (which already had a sampler2D or similar type).  Now they have
their own base type and a pointer to the vtn_type for the image.
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2017-12-12 07:34:46 -08:00
Eric Engestrom
ec0a4fcec0 i915: add missing 0 defines
Thanks to Emil's -Wundef, t_dd_dmatmp.h now complains that intel_render.c
is missing a couple `#define`s.

Assigning them to 0 keeps the existing behaviour; I'll let someone else
turn them on if this is the behaviour that was intended.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-12-12 13:59:46 +00:00
Nicolai Hähnle
accb7d4390 mesa: refuse to compile SPIR-V shaders or link mixed shaders
Note that gl_shader::CompileStatus will also indicate whether a shader
has been successfully specialized.

v2: Use the 'spirv_data' member of gl_shader to know if it is a SPIR-V
   shader, instead of a dedicated flag. (Timothy Arceri)

v3: Use bool instead of GLboolean. (Ian Romanick)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-12-12 08:18:32 +01:00
Nicolai Hähnle
4ccd00d762 mesa/shaderapi: add a getter for GL_SPIR_V_BINARY_ARB
v2: Use the 'spirv_data' member of gl_shader instead of a
   dedicated flag. (Timothy Arceri)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-12-12 08:18:32 +01:00
Nicolai Hähnle
5bc03d2508 mesa: implement SPIR-V loading in glShaderBinary
v2: * Add a gl_shader_spirv_data member to gl_shader, which already
   encapsulates a gl_spirv_module where the binary will be saved.
   (Eduardo Lima)

    * Just use the 'spirv_data' member to know whether a gl_shader has
   the SPIR_V_BINARY_ARB state. (Timothy Arceri)

    * Remove redundant argument checks. Move extension presence check
   to API entry point where the rest of checks are. Retype 'n' and
   'length'arguments to use the correct and more standard types.
   (Ian Romanick)

    * Fix some nitpicks. (Ian Romanick)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-12-12 08:18:32 +01:00
Eduardo Lima Mitev
a8889f5cc7 mesa/glspirv: Add struct gl_shader_spirv_data
This is a per-shader structure holding the SPIR-V data associated with the
shader (binary module, specialization constants and entry-point).

This is needed because both gl_shader and gl_linked_shader need to share this
data. Instead of copying the data, we pass a reference to it upon program
linking. That's why it is reference-counted.

This struct is created and associated with the shader upon calling
glShaderBinary(), then subsequently filled up by the call to
glSpecializeShaderARB().

v2: Readability improvements (Ian Romanick)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-12-12 08:18:32 +01:00
Nicolai Hähnle
74f98ab76f mesa/glspirv: Add struct gl_spirv_module
v2: * Make the SPIR-V module struct part of a larger gl_shader_spirv_data
    struct that will be introduced later, and don't reference it directly
    in gl_shader. (Eduardo Lima)
    * Readability improvements (Ian Romanick)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-12-12 08:18:32 +01:00
Nicolai Hähnle
46b21b8f90 mesa: add GL_ARB_gl_spirv boilerplate
v2: * Add meson build bits (Eric Engestrom)
    * Return INVALID_OPERATION error on SpecializeShaderARB (Ian Romanick)

v3: Include boilerplate for the GL 4.6 alias of glSpecializeShaderARB
   (Neil Roberts)

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-12-12 08:18:32 +01:00
Jason Ekstrand
df657ebb68 spirv: Add support for all bit sizes in OpSwitch
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101560
2017-12-11 22:28:34 -08:00
Jason Ekstrand
58cabae8cc spirv: Restructure the case loop in OpSwitch handling
Instead of calling vtn_add_case for the default case and then looping,
add an is_default variable and do everything inside the loop.  This will
make the next commit easier.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-12-11 22:28:34 -08:00
Jason Ekstrand
5f572ccc95 spirv: Add better parameter validation for vector and matrix types
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-12-11 22:28:34 -08:00
Jason Ekstrand
a7c2be9944 spirv: Add type validation for OpSelect
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-12-11 22:28:34 -08:00
Jason Ekstrand
6737b1b859 spirv: Add basic type validation for OpLoad, OpStore, and OpCopyMemory
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2017-12-11 22:28:34 -08:00
Jason Ekstrand
bb1e6ff161 spirv: Add a prepass to set types on vtn_values
This autogenerated pass will automatically find and set the type field
on all vtn_values.  This way we always have the type and can use it for
validation and other checks.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-12-11 22:28:34 -08:00
Jason Ekstrand
2c84b49ddf spirv: Add a vtn_type field to all vtn_values
At the moment, this just lets us drop the const_type for constants and
unify things a bit.  Eventually, we will use this to store the types of
all SPIR-V SSA values.

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-12-11 22:28:34 -08:00
Samuel Iglesias Gonsálvez
ba4bb0838b anv: fix bug when using component qualifier in FS outputs
We can write to the same output but in different components, like
in this example:

layout(location = 0, component = 0) out ivec2 dEQP_FragColor_0;
layout(location = 0, component = 2) out ivec2 dEQP_FragColor_1;

Therefore, they are not two different outputs but only one.

Fixes:

dEQP-VK.glsl.440.linkage.varying.component.frag_out.*

v3:
- Remove FRAG_RESULT_MAX.
- Add const and use sizeof (Ian).
- Do three-pass to set properly the locations of fragment
  outputs when having arrays (Jason).

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-12-12 07:24:55 +01:00
Ilia Mirkin
0332c7484b st/mesa: swizzle argument when there's a vector size mismatch
GLSL IR operation arguments can sometimes have an implicit swizzle as a
result of a vector arg and a scalar arg, where the scalar argument is
implicitly expanded to the size of the vector argument.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=103955
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-12-11 23:08:43 -05:00
Roland Scheidegger
84c363fb09 gallivm: fix texture wrapping for texture gather for mirror modes
Care must be taken that all coords end up correct, the tests are very
sensitive that everything is correctly rounded. This doesn't matter
for bilinear filter (since picking a wrong texel with weight zero is
ok), and we could also switch the per-sample coords mistakenly.
While here, also optimize the coord_mirror helper a bit (we can do the
mirroring directly by exploiting float rounding, no need for fixing up
odd/even manually).
I did not touch the mirror_clamp and mirror_clamp_to_border modes.
In contrast to mirror_clamp_to_edge and mirror_repeat these are legacy
modes. They are specified against old gl rules, which actually does
the mirroring not per sample (so you get swapped order if the coord
is in the mirrored section). I think the idea though is that they should
follow the respecified mirror_clamp_to_edge rules so the order would be
correct.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2017-12-12 04:23:02 +01:00
Jason Ekstrand
24f019fd69 spirv: Allow ignoring decorations for workgroup variables
Since we switched over to lowering SLM access directly in SPIR-V -> NIR,
we no longer have vtn_variables for SLM.  It's all safe as with UBOs and
SSBOs but we need to let it through in the assert.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104213
Fixes: 8761a04d0d
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2017-12-11 19:02:47 -08:00
Jason Ekstrand
2bc9123c33 spirv: Set lengths on scalar and vector types
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2017-12-11 19:02:47 -08:00
Bas Nieuwenhuizen
3342a432fa ac/nir: Support vulkan_resource_reindex.
Fixes: 93b4cb61eb "spirv: Allow OpPtrAccessChain for block indices"
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-12-12 00:16:18 +01:00
Bas Nieuwenhuizen
368f49b284 ac/nir: Don't load the descriptor in vulkan_resource_index.
To support the reindex intrinsic, we need the result to be
something on which we can adjust the index/address.

Since it is all within a basic block, the compiler should be
able to merge any extra loads.

v2: Change visit_get_buffer_size too.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-12-12 00:16:18 +01:00