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radeonsi: create get_tcs_tes_buffer_address helper
This will be shared between the NIR and TGSI backends. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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parent
a5f9ac2928
commit
3308f4b81a
1 changed files with 32 additions and 12 deletions
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@ -977,6 +977,34 @@ static LLVMValueRef get_tcs_tes_buffer_address(struct si_shader_context *ctx,
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return base_addr;
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}
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/* This is a generic helper that can be shared by the NIR and TGSI backends */
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static LLVMValueRef get_tcs_tes_buffer_address_from_generic_indices(
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struct si_shader_context *ctx,
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LLVMValueRef vertex_index,
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LLVMValueRef param_index,
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unsigned param_base,
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ubyte *name,
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ubyte *index,
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bool is_patch)
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{
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unsigned param_index_base;
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param_index_base = is_patch ?
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si_shader_io_get_unique_index_patch(name[param_base], index[param_base]) :
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si_shader_io_get_unique_index(name[param_base], index[param_base]);
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if (param_index) {
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param_index = LLVMBuildAdd(ctx->ac.builder, param_index,
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LLVMConstInt(ctx->i32, param_index_base, 0),
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"");
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} else {
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param_index = LLVMConstInt(ctx->i32, param_index_base, 0);
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}
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return get_tcs_tes_buffer_address(ctx, get_rel_patch_id(ctx),
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vertex_index, param_index);
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}
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static LLVMValueRef get_tcs_tes_buffer_address_from_reg(
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struct si_shader_context *ctx,
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const struct tgsi_full_dst_register *dst,
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@ -987,7 +1015,7 @@ static LLVMValueRef get_tcs_tes_buffer_address_from_reg(
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struct tgsi_full_src_register reg;
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LLVMValueRef vertex_index = NULL;
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LLVMValueRef param_index = NULL;
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unsigned param_index_base, param_base;
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unsigned param_base;
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reg = src ? *src : tgsi_full_src_register_from_dst(dst);
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@ -1025,19 +1053,11 @@ static LLVMValueRef get_tcs_tes_buffer_address_from_reg(
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} else {
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param_base = reg.Register.Index;
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param_index = ctx->i32_0;
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}
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param_index_base = reg.Register.Dimension ?
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si_shader_io_get_unique_index(name[param_base], index[param_base]) :
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si_shader_io_get_unique_index_patch(name[param_base], index[param_base]);
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param_index = LLVMBuildAdd(ctx->ac.builder, param_index,
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LLVMConstInt(ctx->i32, param_index_base, 0),
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"");
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return get_tcs_tes_buffer_address(ctx, get_rel_patch_id(ctx),
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vertex_index, param_index);
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return get_tcs_tes_buffer_address_from_generic_indices(ctx, vertex_index,
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param_index, param_base,
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name, index, !reg.Register.Dimension);
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}
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static LLVMValueRef buffer_load(struct lp_build_tgsi_context *bld_base,
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