Commit graph

10249 commits

Author SHA1 Message Date
Eve
f4ad6e6d4a radv: add RADV_PERFTEST option to turn off gtt spilling
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Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8107
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35355>
2025-06-17 06:46:27 +00:00
Samuel Pitoiset
203aacf064 radv/meta: use radv_get_copy_flags_from_bo() more
Cleanups.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35550>
2025-06-17 06:16:07 +00:00
Samuel Pitoiset
061bc6151a radv: fix 1x user sample locations on GFX10+
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Only GFX10+ can support 1x user sample locations, but MSAA_ENABLE
needs to be enabled.

Fixes new VKCTS coverage dEQP-VK.pipeline.*samples_1*.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35492>
2025-06-16 06:18:07 +00:00
Samuel Pitoiset
251b23f6c2 ac/surface: fix aliasing DCC tilings with HiZ info on GFX12
DCC tilings info needs to be set for all surfaces, including
depth/stencil. But because this is a C union, settings those fields
for depth/stencil surfaces might accidentally overwrite HiZ info.

This fixes rendering issues with RADV_DEBUG=nohiz.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35515>
2025-06-16 05:56:45 +00:00
Derek Foreman
07881b085e vulkan: Enable PresentWait2 on many physical devices
PresentWait2 should be possible on any physical device, as it adds a
surface capability query that depends on common wsi code.

Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35414>
2025-06-13 15:52:02 +00:00
Samuel Pitoiset
3c3684f4d4 radv: fix a compilation warning with Clang in radv_get_depth_clamp_mode()
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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35508>
2025-06-13 14:31:22 +00:00
Rhys Perry
a905ff3d54 meson: add dep_llvm to radv_tests
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It seems this will try to link to LLVM because libvulkan_radeon links to
LLVM. Without the dep_llvm and with the GCC linker (instead of mold), this
will fail if you use a custom built LLVM and it can't find the shared object.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35495>
2025-06-13 11:29:31 +00:00
Samuel Pitoiset
161f27e206 radv: enable shaderImageFloat32AtomicAdd on GFX12 with ACO
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35493>
2025-06-13 08:47:59 +00:00
Samuel Pitoiset
c5bf1caf17 radv: enable shaderBufferFloat32AtomicMinMax on GFX12
This is supported.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35493>
2025-06-13 08:47:59 +00:00
Samuel Pitoiset
8dd496955d radv: advertise VK_KHR_unified_image_layouts on GFX11+
On GFX12, everything is compressed with DCC and it's completely
transparent to the userspace driver.

On GFX11-GFX11.5, DCC can compress everything with GENERAL and FMASK
has been merged with DCC.

On GFX10-GFX10.3, MSAA through FMASK can't be compressed with GENERAL
and this will hurt performance.

On GFX6-9, DCC can't be supported with GENERAL because no DCC stores,
so this will destroy performance.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35424>
2025-06-13 08:12:04 +00:00
Samuel Pitoiset
a3fa8eed4c radv: implement VK_KHR_unified_image_layouts
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35424>
2025-06-13 08:12:04 +00:00
Samuel Pitoiset
eeabce93b6 radv: use constants for different descriptor sizes
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Instead of magic values everywhere.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35428>
2025-06-13 07:53:04 +00:00
Samuel Pitoiset
939b66a798 radv: remove unused 96-bit memcpy for image descriptors
This can only be 32, 64 or 80 for combined image/sampler.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35428>
2025-06-13 07:53:04 +00:00
Samuel Pitoiset
6b604ff60f radv: cleanup redundant switch cases in radv_GetDescriptorEXT()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35428>
2025-06-13 07:53:04 +00:00
Samuel Pitoiset
63f8b8ce6d radv/nir: adjust a comment about inlining immutable samplers
That (broken) optimization has been removed few weeks ago.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35428>
2025-06-13 07:53:04 +00:00
Samuel Pitoiset
d5da47f831 radv: advertise VK_KHR_maintenance9
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35423>
2025-06-13 07:33:03 +00:00
Samuel Pitoiset
99fb1a9bd7 radv/nir: lower unassigned vertex attributes to (0,0,0,0)
The spec allows both 0,0,0,0 and 0,0,0,1. Returning all zeroes makes it
consistent with vertex prologs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35423>
2025-06-13 07:33:03 +00:00
Samuel Pitoiset
4e46cabb75 radv: add support for VK_QUERY_POOL_CREATE_RESET_BIT_KHR
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35423>
2025-06-13 07:33:03 +00:00
Samuel Pitoiset
36c0c1e857 Revert "radv,driconf: Add radv_force_64k_sparse_alignment config"
This reverts commit e32a90b57c.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35023>
2025-06-13 06:43:47 +00:00
Samuel Pitoiset
817f7f1bb2 radv: remove radv_disable_dedicated_sparse_queue completely
This drirc workaround is probably not useful since RADV allows SPARSE
on all queues.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35023>
2025-06-13 06:43:47 +00:00
Samuel Pitoiset
7f7ed18929 radv: fix 3-plane formats with descriptor buffers
Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35455>
2025-06-13 06:27:26 +00:00
Samuel Pitoiset
22e06d65d7 radv: make sure to zero-initialize image view descriptors
This prevents a regression from the next commit which would write
garbage for combined image+sampler descriptors and that might break
capture&replay.

It seems also more robust to write zeroes than garbage overall.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35455>
2025-06-13 06:27:25 +00:00
Marek Olšák
0cbcb72869 nir/opt_vectorize_io: work around a 16-bit IO bug for RADV
If nir_opt_vectorize_io isn't called, 16-bit IO is broken.
This is a workaround to keep RADV working and consume incorrect NIR
while other drivers consume correct NIR.

Hopefully this will be removed ASAP.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35315>
2025-06-12 19:35:37 +00:00
Samuel Pitoiset
3b326abf7b radv: add capture/replay for sparse buffers and descriptor buffer
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Shouldn't be super useful in practice because the normal capture/replay
BDA path should also work.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35366>
2025-06-11 07:31:29 +00:00
Samuel Pitoiset
643e1c4395 radv: cleanup creating sparse buffers with capture/replay
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35366>
2025-06-11 07:31:29 +00:00
Samuel Pitoiset
74acae0ed8 radv: stop setting the address for capture/replay and non-sparse buffers
This doesn't do anything because for non-sparse buffers, a device
memory object must be bound to the buffer.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35366>
2025-06-11 07:31:28 +00:00
Samuel Pitoiset
ee200cc0d1 radv: stop using vk_common entrypoints when not necessary
For less indirections.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35359>
2025-06-11 07:10:02 +00:00
Samuel Pitoiset
7d2f20b2fb radv: remove useless vk_common_entrypoints.h includes
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35359>
2025-06-11 07:10:02 +00:00
Samuel Pitoiset
f3578973d7 radv/meta: fix using the wrong pipeline layout for ASTC decoding
Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35359>
2025-06-11 07:10:01 +00:00
Samuel Pitoiset
6fac587aa2 radv: use 32 bytes descriptor for sampled/input attachment images on GFX11+
FMASK has been removed since GFX11+ and using 32 bytes can save a lot
of memory.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19621>
2025-06-10 08:49:09 +00:00
Samuel Pitoiset
2797efb12d radv: remove dead code in radv_CreateDescriptorSetLayout()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19621>
2025-06-10 08:49:09 +00:00
Samuel Pitoiset
d98533630b radv: stop using multiview with DGC
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DGC doesn't support multiview. The Vulkan spec says:

"VUID-vkCmdExecuteGeneratedCommandsEXT-None-11062
 If a rendering pass is currently active, the view mask must be 0."

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35342>
2025-06-10 06:15:00 +00:00
Marek Olšák
447d744833 ac/llvm: allocate LLVM PS output variables on demand
This stops relying on si_shader_info, allowing further cleanup of
si_shader_info.

radv_load_output was unused.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35392>
2025-06-10 03:31:20 +00:00
Dave Airlie
b8ac2d47e7 radv/video: add KHR_video_decode_vp9 support.
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This adds the VP9 decoding support.

This was initially developed by me,

Stéphane Cerveau from Igalia did a bunch of fixes and testing,
Benjamin Cheng from AMD also helped with a few fixes and how
to program the firmware better.

This passes the current VK-GL-CTS tests.

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35398>
2025-06-09 20:46:04 +00:00
Marek Olšák
5734a916d6 ac: move tcs_offchip_layout into ac_shader_args
It's the same variable between radv and radeonsi, but the implementation of
the load intrinsics is very different.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
2025-06-07 16:29:39 +00:00
Marek Olšák
9d9cfd89da ac/nir/tess: compute the number of remapped VRAM outputs in common code
This unifies it for both drivers.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
2025-06-07 16:29:39 +00:00
Marek Olšák
ea70060826 ac/nir/tess: stop using tes_inputs_read / tes_patch_inputs read for TCS & TES
use ac_nir_tess_io_info instead

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
2025-06-07 16:29:39 +00:00
Marek Olšák
42445e271e radv,radeonsi: use ac_nir_tess_io_info for LDS size computation
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
2025-06-07 16:29:39 +00:00
Marek Olšák
9c16228359 ac/nir/tess: write TCS per-vertex outputs to memory as vec4 stores at the end
This improves write throughput for TCS outputs. It follows the same idea
as attribute stores in hw GS. The improvement is easily measurable with
a microbenchmark.

It also has the advantage that multiple output stores to the same address
don't result in multiple memory stores. Each output components gets only
one memory store at the end of the shader.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
2025-06-07 16:29:39 +00:00
Marek Olšák
a59464b6e3 radv,radeonsi: precompute and pass TCS per-vertex output stride via a user SGPR
It's a stride of 1 output, which isn't 16. It's 16 * num_threads,
aligned to 256.

tcs_offchip_layout has 5 unused bits, so let's use them.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
2025-06-07 16:29:39 +00:00
Marek Olšák
742227c65c radv,radeonsi: make TCS_OFFCHIP_LAYOUT_NUM_PATCHES not off by one
We never use 128 anyway.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
2025-06-07 16:29:39 +00:00
Marek Olšák
8d3e3c72e0 radv,radeonsi: merge PATCH_CONTROL_POINT & OUT_PATCH_CP into 1 field
One is only used by TCS, the other is only used by TES.
Use the same field for both, call it PATCH_VERTICES_IN.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
2025-06-07 16:29:39 +00:00
Marek Olšák
534b282573 ac/nir/tess: adjust memory layout of TCS outputs to have aligned store offsets
There is a comment that explains it.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34780>
2025-06-07 16:29:38 +00:00
Samuel Pitoiset
babeb975c4 radv,radeonsi: fix emitting UPDATE_DB_SUMMARIZER_TIMEOUT on GFX12
Some checks are pending
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Not all PFP firmwares for GFX12 have this packet.

Fixes: 47f5d25f93 ("radv,radeonsi: emit UPDATE_DB_SUMMARIZER_TIMEOUT on GFX12")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13312
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35370>
2025-06-05 16:51:07 +00:00
Rhys Perry
00a2ed60f8 radv/meta: use unsigned min in copy/fill shaders
Otherwise, this would break >2 GiB copy/fill.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Backport: 25.1
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35343>
2025-06-05 09:55:32 +00:00
Georg Lehmann
297fdc6636 radv: don't accidentally expose samplerFilterMinmax through Vulkan 1.2
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35339>
2025-06-05 09:01:19 +00:00
Marek Olšák
c3034fa82c amd: replace most u_bit_consecutive* with BITFIELD_MASK/RANGE
Some checks are pending
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Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35346>
2025-06-04 17:46:38 +00:00
David Rosca
e579b982b0 radv/video: Set all pic params for H264 encode refs
Fixes encoding B-frames with I-frame as L1 reference.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35283>
2025-06-04 11:33:02 +00:00
David Rosca
92e99e6169 radv/video: Add radv_enc_h264/5_pic_type
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35283>
2025-06-04 11:33:02 +00:00
Samuel Pitoiset
098c15bfc9 radv: use paired shader registers for graphics on GFX12
Some checks are pending
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Loosely based on RadeonSI.

This is supposed to be faster because parsing the packet header seems
to be the main bottleneck on GFX12.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35282>
2025-06-04 09:17:51 +00:00