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Revert "radv,driconf: Add radv_force_64k_sparse_alignment config"

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This reverts commit e32a90b57c.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35023>
This commit is contained in:
Samuel Pitoiset 2025-05-16 16:05:57 +02:00 • committed by Marge Bot
parent aed7045bc9
commit 36c0c1e857
4 changed files with 1 additions and 13 deletions
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6
src/amd/vulkan/radv_buffer.c
View file

@ -176,7 +176,6 @@ radv_get_buffer_memory_requirements(struct radv_device *device, VkDeviceSize siz
VkBufferUsageFlags2 usage, VkMemoryRequirements2 *pMemoryRequirements)
{
const struct radv_physical_device *pdev = radv_device_physical(device);
const struct radv_instance *instance = radv_physical_device_instance(pdev);
pMemoryRequirements->memoryRequirements.memoryTypeBits =
((1u << pdev->memory_properties.memoryTypeCount) - 1u) & ~pdev->memory_types_32bit;
@ -189,10 +188,7 @@ radv_get_buffer_memory_requirements(struct radv_device *device, VkDeviceSize siz
pMemoryRequirements->memoryRequirements.memoryTypeBits = pdev->memory_types_32bit;
if (flags & VK_BUFFER_CREATE_SPARSE_BINDING_BIT) {
if (instance->drirc.force_64k_sparse_alignment)
pMemoryRequirements->memoryRequirements.alignment = 65536;
else
pMemoryRequirements->memoryRequirements.alignment = 4096;
pMemoryRequirements->memoryRequirements.alignment = 4096;
} else {
if (usage & VK_BUFFER_USAGE_2_PREPROCESS_BUFFER_BIT_EXT)
pMemoryRequirements->memoryRequirements.alignment = radv_dgc_get_buffer_alignment(device);

3
src/amd/vulkan/radv_instance.c
View file

@ -194,7 +194,6 @@ static const driOptionDescription radv_dri_options[] = {
DRI_CONF_RADV_APP_LAYER()
DRI_CONF_RADV_EMULATE_RT(false)
DRI_CONF_RADV_ENABLE_FLOAT16_GFX8(false)
DRI_CONF_RADV_FORCE_64K_SPARSE_ALIGNMENT(false)
DRI_CONF_RADV_DISABLE_HIZ_HIS_GFX12(false)
DRI_CONF_SECTION_END
};
@ -299,8 +298,6 @@ radv_init_dri_options(struct radv_instance *instance)
instance->drirc.expose_float16_gfx8 = driQueryOptionb(&instance->drirc.options, "radv_enable_float16_gfx8");
instance->drirc.force_64k_sparse_alignment = driQueryOptionb(&instance->drirc.options, "radv_force_64k_sparse_alignment");
instance->drirc.disable_hiz_his_gfx12 = driQueryOptionb(&instance->drirc.options, "radv_disable_hiz_his_gfx12");
}

1
src/amd/vulkan/radv_instance.h
View file

@ -73,7 +73,6 @@ struct radv_instance {
bool lower_terminate_to_discard;
bool emulate_rt;
bool expose_float16_gfx8;
bool force_64k_sparse_alignment;
bool disable_hiz_his_gfx12;
char *app_layer;
uint8_t override_graphics_shader_version;

4
src/util/driconf.h
View file

@ -784,10 +784,6 @@
DRI_CONF_OPT_B(radv_enable_float16_gfx8, def, \
"Expose float16 on GFX8, where it's supported but usually not beneficial.")
#define DRI_CONF_RADV_FORCE_64K_SPARSE_ALIGNMENT(def) \
DRI_CONF_OPT_B(radv_force_64k_sparse_alignment, def, \
"Force the alignment of sparse buffers to 64KiB")
#define DRI_CONF_RADV_DISABLE_HIZ_HIS_GFX12(def) \
DRI_CONF_OPT_B(radv_disable_hiz_his_gfx12, def, \
"Disable HiZ/HiS on GFX12 (RDNA4) to workaround a hw bug that causes random GPU hangs")