Commit graph

209413 commits

Author SHA1 Message Date
David Rosca
f4436d606e radeonsi: Add missing DEBUG_NAMED_VALUE_END to radeonsi_shader_debug_options
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AddressSanitizer: global-buffer-overflow ../src/util/u_debug.c:331 in debug_parse_flags_option

Fixes: 5c92fe45a1 ("radeonsi: support more than 64 options for AMD_DEBUG")
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36434>
2025-07-30 08:33:10 +00:00
Lionel Landwerlin
60932e8fae brw: always ensure coarse pixel is disabled on Gfx9
No HW support there.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36457>
2025-07-30 07:57:19 +00:00
Lionel Landwerlin
aa6810b706 brw: consider LOAD_PAYLOAD fully defined
It's mostly used for SEND messages and fully defines the register data
(that's its purpose after all).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36457>
2025-07-30 07:57:19 +00:00
Lionel Landwerlin
9371e8d370 brw: fixup coarse_z computation
The delivered values in the coarse pixel size are 0 when coarse pixel
dispatch is disabled and that is screwing up our half pixel offset
adjustment.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36457>
2025-07-30 07:57:19 +00:00
Lionel Landwerlin
9dac7dda87 brw: fixup source depth enabling with coarse pixel shading
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36457>
2025-07-30 07:57:18 +00:00
Lionel Landwerlin
68c50d129e brw: fix NIR metadata invalidation with closest-hit shaders
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36457>
2025-07-30 07:57:18 +00:00
Lionel Landwerlin
9430a1ed00 anv: remove unused helper arguments
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36457>
2025-07-30 07:57:18 +00:00
Lionel Landwerlin
fcd06aa8c3 anv: reuse runtime descriptor set layout base object
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36457>
2025-07-30 07:57:18 +00:00
Georg Lehmann
e43ef6533b nir/opt_algebraic: remove 8bit roundtrip when vectorizing i2i16(unpack_4x8(a).zw)
Explicit 16bit instructions are nicer to vectorize.

Helps FSR4 on GFX11 marginally.

Foz-DB Navi31:
Totals from 10 out of 14 FSR4 shaders:
Instrs: 59781 -> 58518 (-2.11%)
CodeSize: 413428 -> 404156 (-2.24%)
Latency: 193770 -> 190768 (-1.55%)
InvThroughput: 226274 -> 221628 (-2.05%)
VClause: 796 -> 793 (-0.38%); split: -1.01%, +0.63%
Copies: 3342 -> 3008 (-9.99%); split: -11.01%, +1.02%
PreSGPRs: 312 -> 305 (-2.24%)
VALU: 51448 -> 50213 (-2.40%)
SALU: 1074 -> 1048 (-2.42%)
VOPD: 1783 -> 1718 (-3.65%); split: +0.95%, -4.60%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36117>
2025-07-30 07:25:51 +00:00
Georg Lehmann
4683187f49 radv/nir/lower_cmat: load gfx11 8bit ACC using the B layout to get aligned loads
This allows us to use aligned loads that can be vectorized, without any
downside as 8bit scalar loads always write 16bits of a register.

Foz-DB Navi31:
Totals from 10 out of 14 FSR4 shader:
MaxWaves: 71 -> 68 (-4.23%)
Instrs: 60146 -> 59781 (-0.61%); split: -0.67%, +0.06%
CodeSize: 412448 -> 413428 (+0.24%); split: -0.11%, +0.35%
VGPRs: 2112 -> 2160 (+2.27%)
SpillVGPRs: 89 -> 68 (-23.60%)
Scratch: 11776 -> 8704 (-26.09%)
Latency: 196628 -> 193770 (-1.45%); split: -2.62%, +1.17%
InvThroughput: 224944 -> 226274 (+0.59%); split: -0.02%, +0.61%
VClause: 862 -> 796 (-7.66%)
Copies: 3166 -> 3342 (+5.56%); split: -6.22%, +11.78%
Branches: 37 -> 38 (+2.70%)
PreSGPRs: 311 -> 312 (+0.32%)
PreVGPRs: 2153 -> 2214 (+2.83%); split: -1.35%, +4.18%
VALU: 51073 -> 51448 (+0.73%); split: -0.03%, +0.77%
SALU: 1072 -> 1074 (+0.19%)
VMEM: 3275 -> 2765 (-15.57%)
VOPD: 1739 -> 1783 (+2.53%); split: +7.99%, -5.46%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36117>
2025-07-30 07:25:51 +00:00
Georg Lehmann
92cf02ee23 nir/search: support swizzles on expressions in replacement patterns
Before this wasn't a compile time error, but it also didn't do anything.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36117>
2025-07-30 07:25:51 +00:00
Mel Henning
4be68b119e loader: Don't load nouveau GL on nvidia kmd
Some checks are pending
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macOS-CI / macOS-CI (xlib) (push) Waiting to run
The vulkan driver already has a check for this. This prevents the GL
driver from loading too.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13484
Fixes: e99446fc ("egl: Add EGL_EXT_device_query_name and EGL_EXT_device_persistent_id")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36449>
2025-07-29 23:52:32 +00:00
Timothy Arceri
6a217a06d9 util: remove recursion from bitset helpers
Recursion can cause a stack overflow when the range is very large.

Fixes: cb558b2b88 ("glsl: add mark_array_elements_referenced() fast path")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13617

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36430>
2025-07-29 23:07:12 +00:00
Sagar Ghuge
3a9157a10b anv: Use thread group preemption granularity
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36337>
2025-07-29 22:47:56 +00:00
Sagar Ghuge
9ae09d521c intel/genxml: Update CS_CHICKEN1 register field
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36337>
2025-07-29 22:47:56 +00:00
Roland Scheidegger
47c9c1869c llvmpipe: Fix attribute interpolation setup when rendering lines with msaa
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
If multisampling is enabled, we effectively always use pixel offset 0 for the
purposes of setup, overriding half pixel center.
However, line setup (and by the looks of it rectangle as well), while honoring
this for the purposes of setting up the rasterization planes, it forgot to
do this adjustment when setting up attribute interpolation, hence attribute
interpolation for lines ended up wrong.
Rather than fixing this up in line setup, just override pixel_offset in setup
context when using msaa, since this is what we actually do, which simplifies
the logic (do the same for the key for the setup jit function as well).

Reviewed-by: Brian Paul <brian.paul@broadcom.com>
Reviewed-by: Lucas Fryzek <lfryzek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36435>
2025-07-29 21:52:01 +00:00
Marek Olšák
d61edf079b nir: add nir_move_only_convergent/divergent
This will be needed by nir_opt_move_reorder_loads, which will use
the move flags.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36357>
2025-07-29 16:20:53 -04:00
Marek Olšák
35bbc8405b nir: add more nir_move_options
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36357>
2025-07-29 16:20:51 -04:00
Marek Olšák
44d78c4451 nir: handle load_input_vertex in nir_can_move_instr
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36357>
2025-07-29 16:20:49 -04:00
Marek Olšák
8d3e76c250 nir: split nir_move_load_frag_coord from nir_move_load_input
It's a pure system value on AMD, not an input.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36357>
2025-07-29 16:20:48 -04:00
Marek Olšák
5083769fcb nir: renumber nir_move_options
for future commits

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36357>
2025-07-29 16:20:46 -04:00
Marek Olšák
8d584586f5 nir: handle can_reorder robustly in nir_can_move_instr
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36357>
2025-07-29 16:20:44 -04:00
Marek Olšák
c229c93540 nir: change how can_mov_out_of_loop is set for intrinsics in nir_can_move_instr
Set to false first, then set to true when needed.

More intrinsics will set false.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36357>
2025-07-29 16:20:42 -04:00
Marek Olšák
ad1cfcc841 nir: mark inverse_ballot & is_subgroup_invocation_lt_amd as CAN_REORDER
nir_can_move_instr already ignores that this flag isn't set.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36357>
2025-07-29 16:20:39 -04:00
Marek Olšák
2eea9b968d nir/group_loads: rename to nir_opt_group_loads
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
It's meant to be an optimization pass.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36100>
2025-07-29 19:28:59 +00:00
Marek Olšák
3bceb7b622 nir/group_loads: don't use pass_flags to store the indirection level
no change in behavior

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36100>
2025-07-29 19:28:59 +00:00
Marek Olšák
7b9acabe89 nir/group_loads: store our custom instr->index in an array
we'll put more stuff in the new structure

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36100>
2025-07-29 19:28:58 +00:00
Marek Olšák
821dc611c5 nir/group_loads: use nir_instr_next/prev
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36100>
2025-07-29 19:28:58 +00:00
Marek Olšák
318a57c57c nir/group_loads: make is_grouped_load use get_load_resource
and unify get_intrinsic_resource & get_uniform_inst_resource into the new
helper get_load_resource.

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36100>
2025-07-29 19:28:57 +00:00
Marek Olšák
b9f7dc5d26 nir/group_loads: remove mostly duplicated function is_memory_load
is_grouped_load does the same thing

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36100>
2025-07-29 19:28:57 +00:00
Marek Olšák
ef0a5e1a65 nir/group_loads: invert the return value of can_move to reflect its true meaning
The previous commit handles non-reorderable instructions better, so this is
no longer needed.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36100>
2025-07-29 19:28:56 +00:00
Marek Olšák
ad8b5325d4 nir/group_loads: group any reorderable intrinsics regardless of barriers
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36100>
2025-07-29 19:28:56 +00:00
Marek Olšák
e0d8979dea nir/group_loads: split is_barrier into is_barrier + is_terminate
and handle demote

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36100>
2025-07-29 19:28:56 +00:00
Marek Olšák
7d9aca2235 nir/group_loads: allow moving loads across instructions without defs
It wouldn't group these:
    load (reordeable)
    store
    load (reordeable)

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36100>
2025-07-29 19:28:55 +00:00
Marek Olšák
aa732f6f30 nir/group_loads: handle more loads
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36100>
2025-07-29 19:28:55 +00:00
Lucas Fryzek
ab52889d28 anv: Enable compression on astc emulation plane
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11108
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30592>
2025-07-29 19:10:34 +00:00
Mike Blumenkrantz
f68cae3e13 kopper: fix initial swapinterval setting
setting the mode here is harmless even on weirdo cts swapchain cases

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13568

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36452>
2025-07-29 14:47:56 -04:00
Eric Engestrom
a8e9af2ce9 wsi/display: pass the plane's modifiers to the image
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
This should cause us to choose a better-than-linear format modifier
automatically based on the intersection of the driver's support and the
display plane's support.

Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36341>
2025-07-29 16:44:04 +00:00
Emma Anholt
0c0d9c05e0 wsi/display: Do connector setup before swapchain init.
The connector setup decides on a CRTC/plane, and can be done early.  We're
going to need that to get the modifiers list before we have swapchain init
create the images.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36341>
2025-07-29 16:44:04 +00:00
Emma Anholt
fe7652eae9 wsi/display: Pull DRM format translation up a level.
Saves doing it multiple times, but more importantly we want to know it
before wsi_swapchain_init() soon.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36341>
2025-07-29 16:44:03 +00:00
Eric Engestrom
b16a6a56d8 wsi/display: pass the image's DRM modifiers to the kernel
Signed-off-by: Eric Engestrom <eric.engestrom@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36341>
2025-07-29 16:44:02 +00:00
Yiwei Zhang
00d0f2bec5 nvk: clean up direct u_gralloc dep
The u_gralloc fallback backend exists as a best effort attempt and it
does log in the Android logcat so can be easily identified if not WAI.
So far there's no Vulkan impl in mesa could reasonably work with the
fallback backend alone, so if that becomes a real pain, we can exclude
it from inside vk_android_get_ugralloc runtime helper.

Also drop redundant ANB header.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36386>
2025-07-29 16:29:58 +00:00
Yiwei Zhang
0d5a2f92ca nak: do not hide drm header on Android
libdrm exists on Android and drm header is needed as well. The proper
way for cross-compile now is to use "-Dallow-fallback-for=libdrm" so
that the subproject can be fetched accordingly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36386>
2025-07-29 16:29:58 +00:00
Yiwei Zhang
1e0c3529e7 nvk: clean up existing nvk_android frontend
1. No need custom nvk_AcquireImageANDROID to wait for the HWC release
   fence, since nvk is able to properly import the sync file.
2. Document the nvk_QueueSignalReleaseImageANDROID behavior.
3. Drop redundant header and includes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36386>
2025-07-29 16:29:58 +00:00
José Roberto de Souza
07f5b53dd7 intel/brw: Remove duplicated implementation of brw_imm_uq/brw_imm_u64()
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36448>
2025-07-29 16:05:54 +00:00
José Roberto de Souza
14386eb7e5 intel/brw: Add comment to reg_unit()
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36448>
2025-07-29 16:05:54 +00:00
José Roberto de Souza
7981a18df2 intel/brw: Nuke unused brw_message_desc_header_present()
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36448>
2025-07-29 16:05:53 +00:00
Pavel Ondračka
116bd1848e r300/ci: remove emulated swtcl testing
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36436>
2025-07-29 15:50:59 +00:00
Pavel Ondračka
1035098a78 r300/ci: add RS740 piglit and dEQP testing
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36436>
2025-07-29 15:50:59 +00:00
Thomas H.P. Andersen
f8741cc344 anti-lag: pass a proper dataSize
dataSize was passed as sizeof(uint64_t)

From spec:
dataSize is the size in bytes of the buffer pointed to by pData.
dataSize must be large enough to contain the result of each query

The NVK driver checks that the dataSize is large enough and hit an assert.

This patch changes dataSize to sizeof(struct query) * num_timestamps.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36402>
2025-07-29 15:24:14 +00:00