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nir: split nir_move_load_frag_coord from nir_move_load_input

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It's a pure system value on AMD, not an input.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36357>
This commit is contained in:
Marek Olšák 2025-07-24 14:10:09 -04:00
parent 5083769fcb
commit 8d3e76c250
10 changed files with 31 additions and 23 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

7
src/amd/vulkan/radv_pipeline.c
View file

@ -477,10 +477,10 @@ radv_postprocess_nir(struct radv_device *device, const struct radv_graphics_stat
NIR_PASS(_, stage->nir, nir_opt_move, sink_opts);
} else {
if (stage->stage != MESA_SHADER_FRAGMENT || !pdev->cache_key.disable_sinking_load_input_fs)
sink_opts |= nir_move_load_input;
sink_opts |= nir_move_load_input | nir_move_load_frag_coord;
NIR_PASS(_, stage->nir, nir_opt_sink, sink_opts);
NIR_PASS(_, stage->nir, nir_opt_move, sink_opts | nir_move_load_input);
NIR_PASS(_, stage->nir, nir_opt_move, sink_opts | nir_move_load_input | nir_move_load_frag_coord);
}
}
@ -691,7 +691,8 @@ radv_postprocess_nir(struct radv_device *device, const struct radv_graphics_stat
NIR_PASS(_, stage->nir, nir_opt_sink, sink_opts);
nir_move_options move_opts = nir_move_const_undef | nir_move_load_ubo | nir_move_load_input |
nir_move_comparisons | nir_move_copies | nir_dont_move_byte_word_vecs | nir_move_alu;
nir_move_load_frag_coord | nir_move_comparisons | nir_move_copies |
nir_dont_move_byte_word_vecs | nir_move_alu;
NIR_PASS(_, stage->nir, nir_opt_move, move_opts);
/* Run nir_opt_move again to make sure that comparision are as close as possible to the first use to prevent SCC

12
src/asahi/compiler/agx_compile.c
View file

@ -3273,9 +3273,9 @@ agx_optimize_nir(nir_shader *nir, bool soft_fault, uint16_t *preamble_size,
/* Cleanup optimizations */
nir_move_options move_all = nir_move_const_undef | nir_move_load_ubo |
nir_move_load_input | nir_move_comparisons |
nir_move_copies | nir_move_load_ssbo |
nir_move_alu;
nir_move_load_input | nir_move_load_frag_coord |
nir_move_comparisons | nir_move_copies |
nir_move_load_ssbo | nir_move_alu;
NIR_PASS(_, nir, nir_opt_sink, move_all);
NIR_PASS(_, nir, nir_opt_move, move_all);
@ -3890,9 +3890,9 @@ agx_preprocess_nir(nir_shader *nir)
/* Move before lowering */
nir_move_options move_all = nir_move_const_undef | nir_move_load_ubo |
nir_move_load_input | nir_move_comparisons |
nir_move_copies | nir_move_load_ssbo |
nir_move_alu;
nir_move_load_input | nir_move_load_frag_coord |
nir_move_comparisons | nir_move_copies |
nir_move_load_ssbo | nir_move_alu;
NIR_PASS(_, nir, nir_opt_sink, move_all);
NIR_PASS(_, nir, nir_opt_move, move_all);

1
src/compiler/nir/nir.h
View file

@ -6203,6 +6203,7 @@ typedef enum {
nir_move_load_ubo = BITFIELD_BIT(6),
nir_move_load_ssbo = BITFIELD_BIT(7),
nir_move_load_uniform = BITFIELD_BIT(8),
nir_move_load_frag_coord = BITFIELD_BIT(9),
} nir_move_options;
bool nir_can_move_instr(nir_instr *instr, nir_move_options options);

15
src/compiler/nir/nir_opt_sink.c
View file

@ -117,6 +117,14 @@ can_sink_instr(nir_instr *instr, nir_move_options options, bool *can_mov_out_of_
*can_mov_out_of_loop = false;
switch (intrin->intrinsic) {
case nir_intrinsic_load_input:
case nir_intrinsic_load_interpolated_input:
case nir_intrinsic_load_per_vertex_input:
case nir_intrinsic_load_per_primitive_input:
case nir_intrinsic_load_attribute_pan:
*can_mov_out_of_loop = true;
return options & nir_move_load_input;
case nir_intrinsic_load_ubo:
case nir_intrinsic_load_ubo_vec4:
case nir_intrinsic_load_global_constant_offset:
@ -133,18 +141,13 @@ can_sink_instr(nir_instr *instr, nir_move_options options, bool *can_mov_out_of_
intrin->intrinsic == nir_intrinsic_load_global_bounded;
return options & nir_move_load_ssbo;
case nir_intrinsic_load_input:
case nir_intrinsic_load_per_primitive_input:
case nir_intrinsic_load_interpolated_input:
case nir_intrinsic_load_per_vertex_input:
case nir_intrinsic_load_frag_coord:
case nir_intrinsic_load_frag_coord_z:
case nir_intrinsic_load_frag_coord_w:
case nir_intrinsic_load_frag_coord_zw_pan:
case nir_intrinsic_load_pixel_coord:
case nir_intrinsic_load_attribute_pan:
*can_mov_out_of_loop = true;
return options & nir_move_load_input;
return options & nir_move_load_frag_coord;
case nir_intrinsic_load_uniform:
case nir_intrinsic_load_kernel_input:

2
src/gallium/auxiliary/nir/nir_to_tgsi.c
View file

@ -3982,7 +3982,7 @@ const void *nir_to_tgsi_options(struct nir_shader *s,
}
nir_move_options move_all =
nir_move_const_undef | nir_move_load_ubo | nir_move_load_input |
nir_move_const_undef | nir_move_load_ubo | nir_move_load_input | nir_move_load_frag_coord |
nir_move_comparisons | nir_move_copies | nir_move_load_ssbo;
NIR_PASS(_, s, nir_opt_move, move_all);

2
src/gallium/drivers/nouveau/codegen/nv50_ir_from_nir.cpp
View file

@ -3495,7 +3495,7 @@ Converter::run()
(nir_move_options)(nir_move_const_undef |
nir_move_load_ubo |
nir_move_load_uniform |
nir_move_load_input);
nir_move_load_input | nir_move_load_frag_coord);
NIR_PASS(_, nir, nir_opt_sink, move_options);
NIR_PASS(_, nir, nir_opt_move, move_options);

2
src/gallium/drivers/r300/compiler/nir_to_rc.c
View file

@ -2088,7 +2088,7 @@ nir_to_rc(struct nir_shader *s, struct pipe_screen *screen,
NIR_PASS(_, s, nir_opt_shrink_vectors, false);
NIR_PASS(_, s, nir_opt_dce);
nir_move_options move_all = nir_move_const_undef | nir_move_load_ubo | nir_move_load_input |
nir_move_options move_all = nir_move_const_undef | nir_move_load_ubo | nir_move_load_input | nir_move_load_frag_coord |
nir_move_comparisons | nir_move_copies | nir_move_load_ssbo;
NIR_PASS(_, s, nir_opt_move, move_all);

3
src/imagination/rogue/rogue_nir.c
View file

@ -150,7 +150,8 @@ static void rogue_nir_passes(struct rogue_build_ctx *ctx,
/* Disabled for now since we want to try and keep them vectorised and group
* them. */
/* TODO: Investigate this further. */
/* NIR_PASS(_, nir, nir_opt_move, nir_move_load_ubo | nir_move_load_input);
/* NIR_PASS(_, nir, nir_opt_move, nir_move_load_ubo | nir_move_load_input |
* nir_move_load_frag_coord);
*/
/* TODO: Re-enable scheduling after register pressure tweaks. */

5
src/panfrost/compiler/bifrost_compile.c
View file

@ -5541,8 +5541,9 @@ bi_optimize_nir(nir_shader *nir, unsigned gpu_id, nir_variable_mode robust2_mode
/* Backend scheduler is purely local, so do some global optimizations
* to reduce register pressure. */
nir_move_options move_all = nir_move_const_undef | nir_move_load_ubo |
nir_move_load_input | nir_move_comparisons |
nir_move_copies | nir_move_load_ssbo;
nir_move_load_input | nir_move_load_frag_coord |
nir_move_comparisons | nir_move_copies |
nir_move_load_ssbo;
NIR_PASS(_, nir, nir_opt_sink, move_all);
NIR_PASS(_, nir, nir_opt_move, move_all);

5
src/panfrost/midgard/midgard_compile.c
View file

@ -545,8 +545,9 @@ optimise_nir(nir_shader *nir, unsigned quirks, bool is_blend)
/* Backend scheduler is purely local, so do some global optimizations
* to reduce register pressure. */
nir_move_options move_all = nir_move_const_undef | nir_move_load_ubo |
nir_move_load_input | nir_move_comparisons |
nir_move_copies | nir_move_load_ssbo;
nir_move_load_input | nir_move_load_frag_coord |
nir_move_comparisons | nir_move_copies |
nir_move_load_ssbo;
NIR_PASS(_, nir, nir_opt_sink, move_all);
NIR_PASS(_, nir, nir_opt_move, move_all);