Commit graph

127182 commits

Author SHA1 Message Date
Pierre-Eric Pelloux-Prayer
eebdf4d28c omx/tizonia: fix build
Fixes: 24f2b0a856 ("gallium/video: remove pipe_video_buffer.chroma_format")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3595
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7026>
(cherry picked from commit 8b205402c3)
2020-10-12 10:02:41 -07:00
Marek Olšák
72c3e51c39 gallium/u_threaded_context: fix use-after-free in transfer_unmap
discovered by valgrind

Fixes: fd6a5e112a

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6952>
(cherry picked from commit 3dc00c33f0)
2020-10-12 10:02:39 -07:00
Nanley Chery
332c00a536 iris: Fix a fast-clear skipping optimization
When support for multi-slice fast-clears was introduced for color
surfaces, an existing optimization for skipping fast-clears was not
updated (this optimization assumed single-slice fast-clears). As a
result, the driver began to skip multi-layer fast-clears if just the
first slice was in the CLEAR state (ignoring the state of the others).

A Civilization VI trace was the only workload I found to make use of
this optimization and it did so for 2D, non-array textures. Therefore,
this fix simply checks that the depth of the clear box is 1. It also
moves the single-slice aux-state query closer to the optimization to
clarify the need for the depth check.

Enables iris to pass a case of the fcc-write-after-clear piglit test,
[fast-clear tracking across layers 0 -> 1 -> (0,1)].

Fixes: 393f659ed8 ("iris: Enable fast clears on other miplevels and layers than 0.")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6973>
(cherry picked from commit 3f3a5f3489)
2020-10-12 10:02:38 -07:00
Lionel Landwerlin
e29629de7d intel/perf: fix crash when no perf queries are supported
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: ec1fa1d51f ("intel/perf: fix raw query kernel metric selection")
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7024>
(cherry picked from commit 79f3544412)
2020-10-12 10:02:36 -07:00
Dylan Baker
a19b215ad6 .pick_status.json: Mark 4790811d78 as denominated 2020-10-12 10:02:31 -07:00
Dylan Baker
959a5d195e .pick_status.json: Mark b23013db0a as denominated 2020-10-12 10:02:30 -07:00
Dylan Baker
adedbb1a9c .pick_status.json: Update to b32a8f83dc 2020-10-12 10:02:26 -07:00
Jose Maria Casanova Crespo
2e62030423 vc4: Avoid negative scissor caused by no intersection
This fixes 6 tests that were crashing on VC4 since
EGL_KHR_swap_buffers_with_damage was enabled.

dEQP-EGL.functional.swap_buffers_with_damage.*.buffer_age_render

Cc: 20.2 <mesa-stable>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6976>
(cherry picked from commit 961a8d71cd)
2020-10-05 11:27:33 -07:00
Vinson Lee
f3f44dbf63 freedreno: Move rsc NULL check to before rsc dereferences.
Fix defect reported by Coverity Scan.

Dereference before null check (REVERSE_INULL)
check_after_deref: Null-checking rsc suggests that it may be
null, but it has already been dereferenced on all paths leading
to the check.

Fixes: 6173cc19c4 ("freedreno: gallium driver for adreno")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6903>
(cherry picked from commit 0a7bd14dbb)
2020-10-05 11:27:33 -07:00
Jason Ekstrand
6ea01cd07a intel/fs: Don't use NoDDClk/NoDDClr for split SHUFFLEs
When I copied and pasted the code from MOV_INDIRECT for handling the
dependency controls, I missed a subtle difference between MOV_INDIRECT
and SHUFFLE.  Specifically, MOV_INDIRECT gets lowered to a narrow
instruction on Gen7 by the SIMD width lowering whereas SHUFFLE has to
split it in the generator.  Therefore, the check safety check for
whether or not we can use dependency control has to be based on the
lowered width rather than the width of the original instruction.

Fixes: a8ac61b0ee "intel/fs: NoMask initialize the address..."
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3593
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6989>
(cherry picked from commit 8427e56067)
2020-10-05 11:27:32 -07:00
Bas Nieuwenhuizen
b7c3713706 radv: Use atomics to read query results.
The volatile pattern gives me flaky results for 32-bit builds on
ChromeOS Android. This is because on 32-bit the volatile 64-bit
loads gets split into 2 32-bit loads each.

So if we read the lower dword first and then the upper dword, it
can happen that the upper dword is already changed but the lower
dword isn't yet. In particular for occlusion queries this gives
false readings, as the upper dword commonly only constains the
ready bit.

With the GCC atomic intrinsics we get a call to __atomic_load_8
in libatomic.so which does the right thing.

An alternative fix would be to  explicitly split the 32-bit loads
in the right order and do a bunch of retries if things change, though
that gets messy quickly and for 32-bit builds only doesn't feel worth
it that much.

CC: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6933>
(cherry picked from commit 7568c97df1)
2020-10-05 11:27:31 -07:00
Jason Ekstrand
285d4d0787 nir/opt_load_store_vectorize: Use bit sizes when checking mask compatibility
Without this, it was checking bit size compatibility with bit sizes such
as 96 which is clearly invalid.

No shader-db changes on Ice Lake

Fixes: ce9205c03b "nir: add a load/store vectorization pass"
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6871>
(cherry picked from commit 57e7c5f05e)
2020-10-05 11:27:30 -07:00
Philipp Zabel
1784d889f2 meson: fix power8 option
Do not throw a deprecation warning if the power8 option is set to the
new 'disabled' value. Instead, warn if it is still set to the legacy
value 'false'.

Fixes: 138c003d22 ("meson: deprecated 'true' and 'false' in combo options for 'enabled' and 'disabled'")
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6370>
(cherry picked from commit 03bea54e02)
2020-10-05 11:27:29 -07:00
Timothy Arceri
aedd29141a glsl: don't duplicate state vars as uniforms in the NIR linker
The linker was adding all state vars as uniforms, doubling the storage size
for shaders using only builtin uniforms, which increased CPU overhead for
constant buffer uploads.

When this code was originally ported from the GLSL IR linker we forgot
to exclude builtins because the check was not done in the
add_uniform_to_shader class but rather a check was done when passing
variables to this class for processing.

Fixes: 664e4a610d ("glsl/nir: Fill in the Parameters in NIR linker")

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Tested-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6958>
(cherry picked from commit 038fcbcaed)
2020-10-05 11:27:28 -07:00
Jason Ekstrand
011d569557 intel/fs: NoMask initialize the address register for shuffles
Cc: mesa-stable@lists.freedesktop.org
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2979
Tested-by: Iván Briano <ivan.briano@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6825>
(cherry picked from commit a8ac61b0ee)
2020-10-05 11:27:27 -07:00
Anuj Phogat
b38d1d1b25 intel/gen9: Enable MSC RAW Hazard Avoidance
Workaround # 22011374674
Applied to i965, iris and anv drivers
No performance impact is observed with WA.

Cc: mesa-stable
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
(cherry picked from commit 545d852a7a)
2020-10-05 11:27:26 -07:00
Olsak, Marek
556d6b099e radeonsi: Fix dead lock with aux_context_lock in si_screen_clear_buffer.
After disable SDMA on Arcturus(gfx9), dead lock with aux_context_lock is
detected since si_screen_clear_buffer is called recursively before
release lock.

The call trace is:
si_clear_render_target->si_compute_clear_render_target->
si_launch_grid_internal->si_launch_grid->si_emit_cache_flush->
si_prim_discard_signal_next_compute_ib_start->u_suballocator_alloc->
si_resource_create->si_buffer_create->si_alloc_resource->
si_screen_clear_buffer->simple_mtx_lock->
si_sdma_clear_buffer->si_pipe_clear_buffer->
si_clear_buffer->si_compute_do_clear_or_copy->
si_launch_grid_internal->si_launch_grid->si_emit_cache_flush->
si_prim_discard_signal_next_compute_ib_start->u_suballocator_alloc->
si_resource_create->si_buffer_create->si_alloc_resource->
si_screen_clear_buffer->simple_mtx_lock

Fixes: 07a49bf597 "radeonsi: disable SDMA on gfx9"
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6941>
(cherry picked from commit 5e8791a0bf)
2020-10-05 11:27:25 -07:00
Dylan Baker
ed7f0f2d90 .pick_status.json: Update to e3b814d5e9 2020-10-05 11:26:51 -07:00
Bas Nieuwenhuizen
b971b42b14 radv,radeonsi: Disable compression on interop depth images
If we want to use HTILE correctly we need to communicate extra stuff
like clear colors. (Unlike DCC there is no HTILE FCE)

CC: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
(cherry picked from commit d78df70c2a)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6877>
2020-09-30 10:11:57 -07:00
Jason Ekstrand
a484759717 nir/cf: Better handle intra-block splits
In the case where end was a instruction-based cursor, we would mix up
our blocks and end up with block_begin pointing after the second split.
This causes a segfault as the cf_node list walk at the end of the
function never terminates properly.  There's also a possibility of
mix-up if begin is an instruction-based cursor which was found by
inspection.

Fixes: fc7f2d2364 "nir/cf: add new control modification API's"
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Acked-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6866>
(cherry picked from commit 7dbb1f7462)
2020-09-30 09:29:40 -07:00
Pierre-Eric Pelloux-Prayer
e2f99a7ab7 gallium/vl: add chroma_format arg to vl_video_buffer functions
vl_mpeg12_decoder needs to override the chroma_format value to get the
correct size calculated (chroma_format is used by vl_video_buffer_adjust_size).

I'm not sure why it's needed, but this is needed to get correct mpeg decode.

Fixes: 24f2b0a856 ("gallium/video: remove pipe_video_buffer.chroma_format")
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6817>
(cherry picked from commit 2584d48b2c)
2020-09-30 09:29:38 -07:00
Pierre-Eric Pelloux-Prayer
e84d418bd1 gallium/vl: do not call transfer_unmap if transfer is NULL
CC: mesa-stable
Acked-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6817>
(cherry picked from commit b121b1b8b8)
2020-09-30 09:29:37 -07:00
Vinson Lee
28cff4722d gallium/dri2: Move image->texture assignment after image NULL check.
Fix defect reported by Coverity Scan.

Dereference before null check (REVERSE_INULL)
check_after_deref: Null-checking image suggests that it may be
null, but it has already been dereferenced on all paths leading to
the check.

Fixes: ad609bf55a ("frontend/dri: Implement mapping individual planes.")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6807>
(cherry picked from commit 03e7b75c22)
2020-09-30 09:28:49 -07:00
Dylan Baker
a0238684de .pick_status.json: Update to 7dbb1f7462 2020-09-30 09:26:48 -07:00
Connor Abbott
79263cda92 nir/lower_io_arrays: Fix xfb_offset bug
I noticed this once I started gathering xfb_info after
nir_lower_io_arrays_to_elements_no_indirect.

Fixes: b2bbd978d0 ("nir: fix lowering arrays to elements for XFB outputs")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6514>
(cherry picked from commit 5a88db682e)
2020-09-29 08:55:08 -07:00
Erik Faye-Lund
09c31b46d3 st/mesa: use roundf instead of floorf for lod-bias rounding
There's no good reason not to use a symmetric rounding mode here. This
fixes the following GL CTS case for me:

GTF-GL33.gtf21.GL3Tests.texture_lod_bias.texture_lod_bias_all

Fixes: 132b69c4ed ("st/mesa: round lod_bias to a multiple of 1/256")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6892>
(cherry picked from commit 7685c37bf4)
2020-09-29 08:55:02 -07:00
Dylan Baker
0c9b64f9f4 meson/anv: Use variable that checks for --build-id
fixes: d1992255bb
       ("meson: Add build Intel "anv" vulkan driver")

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6819>
(cherry picked from commit 465460943a)
2020-09-29 08:55:00 -07:00
Nanley Chery
e2ee71614f blorp: Ensure aligned HIZ_CCS_WT partial clears
Fixes: 5425fcf2cb ("intel/blorp: Satisfy HIZ_CCS fast-clear alignments")
Reported-by: Sagar Ghuge <sagar.ghuge@intel.com>
Tested-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6854>
(cherry picked from commit 7f3e881c6c)
2020-09-29 08:55:00 -07:00
Jason Ekstrand
da7f4b5ada nir/liveness: Consider if uses in nir_ssa_defs_interfere
Fixes: f86902e75d "nir: Add an SSA-based liveness analysis pass"
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3428
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Yevhenii Kharchenko <yevhenii.kharchenko@globallogic.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6824>
(cherry picked from commit 0206fb3941)
2020-09-29 08:54:59 -07:00
Marek Olšák
401e03925d radeonsi: fix indirect dispatches with variable block sizes
The block size input was uninitialized.

Fixes: 77c81164bc "radeonsi: support ARB_compute_variable_group_size"

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6782>
(cherry picked from commit 8be46d6558)
2020-09-29 08:54:56 -07:00
Christian Gmeiner
fbbd66dcad etnaviv: simplify linear stride implementation
As documented in the galcore kernel driver "only LOD0 is valid
for this register". This makes sense, as NTE's LINEAR_STRIDE is
only capable to store one linear stride value per sampler.
This fixes linear textures in sampler slot != 0.

Fixes: 34458c1cf6 ("etnaviv: add linear sampling support")
CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Michael Tretter <m.tretter@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3285>
(cherry picked from commit a7e3cc7a0e)
2020-09-29 08:54:55 -07:00
Dylan Baker
d82aa3bf60 .pick_status.json: Update to 291cfb1e41 2020-09-29 08:54:46 -07:00
Dylan Baker
4f8488b857 docs: Add sh256 sums for 20.2.0 2020-09-28 16:29:08 -07:00
Dylan Baker
0ab255b82d docs: add release notes for 20.2.0 2020-09-28 16:27:57 -07:00
Dylan Baker
663d464366 VERSION: bump for 20.2.0 release 2020-09-28 15:50:54 -07:00
Jason Ekstrand
f1b6e50108 radeonsi: Only call nir_lower_var_copies at the end of the opt loop
In 283ad85944, radeonsi started using nir_find_var_copies.  However,
it was also calling nir_lower_var_copies in the optimization loop and
the two can end up fighting.  The simple solution is to wait to lower
copies until the end of the optimization loop.

Fixes: 283ad85944
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3550

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6841>
(cherry picked from commit 472a20c5fc)
2020-09-24 15:17:58 -07:00
Mike Blumenkrantz
a2f1b6d268 zink: reorder create_stream_output_target to fix failure case leak
the previous version of this leaked a reference to the streamout buffer here

thanks to deltragon on my blog for pointing this out!

Fixes: 37778fcd9a ("zink: implement transform feedback support to finish off opengl 3.0")

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6457>
(cherry picked from commit 7971918924)
2020-09-24 15:17:57 -07:00
Dylan Baker
01285ded24 .pick_status.json: Update to 472a20c5fc 2020-09-24 15:17:54 -07:00
Erik Faye-Lund
81a826636f mesa: handle GL_FRONT after translating to it
Without this, we end up throwing errors on code along these lines when
rendering using single-buffering:

GLint att;
glGetIntegerv(GL_READ_BUFFER, &att);
glGetFramebufferAttachmentParameteriv(GL_READ_FRAMEBUFFER, att, ...);

This is because we internally translate GL_BACK (which is what
glGetIntegerv returned) to GL_FRONT, which we don't handle in the
Desktop GL case. So let's start handling it.

This fixes the GLTF-GL33.gtf21.GL2FixedTests.buffer_color.blend_color
test for me.

Fixes: e6ca6e587e ("mesa: Handle pbuffers in desktop GL framebuffer attachment queries")

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6815>
(cherry picked from commit 9e13a16c97)
2020-09-24 09:32:14 -07:00
Dylan Baker
0996ea1175 .pick_status.json: Update to 90b98c0649 2020-09-24 09:32:14 -07:00
Michel Dänzer
76b2f293c6 ci: Use ignore_scheduled_pipelines anchor in .radeonsi-rules
Without this, scheduled pipelines erroneously tried to create jobs using
this template, which can't work, because their dependency jobs don't
exist in scheduled pipelines. Unfortunately, this resulted in scheduled
pipelines not running silently, without any direct feedback about what's
wrong (see https://gitlab.com/gitlab-org/gitlab/-/issues/25490).

Fixes: 6c8b921572 "ci: Build kernels and rootfs for x86 devices"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6802>
(cherry picked from commit a1f46d7b69)
2020-09-24 09:32:14 -07:00
Danylo Piliaiev
98fa336d34 nir/lower_samplers: Clamp out-of-bounds access to array of samplers
Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:

"In the subsections described above for array, vector, matrix and
 structure accesses, any out-of-bounds access produced undefined
 behavior.... Out-of-bounds reads return undefined values, which
 include values from other variables of the active program or zero."

Robustness extensions suggest to return zero on out-of-bounds
accesses, however it's not applicable to the arrays of samplers,
so just clamp the index.

Otherwise instr->sampler_index or instr->texture_index would be out
of bounds, and they are used as an index to arrays of driver state.

E.g. this fixes such dereference:
 if (options->lower_tex_packing[tex->sampler_index] !=
in nir_lower_tex.c

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6428>
(cherry picked from commit f2b17dec12)
2020-09-24 09:32:14 -07:00
Danylo Piliaiev
c3eaad7e76 nir/large_constants: Eliminate out-of-bounds writes to large constants
Out-of-bounds writes could be eliminated per spec:

Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:

"In the subsections described above for array, vector, matrix and
 structure accesses, any out-of-bounds access produced undefined
 behavior.... Out-of-bounds writes may be discarded or overwrite
 other variables of the active program."

Fixes: 1235850522
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6428>
(cherry picked from commit 0ba82f78a5)
2020-09-24 09:32:14 -07:00
Danylo Piliaiev
74e7c86189 nir/lower_io: Eliminate oob writes and return zero for oob reads
Out-of-bounds writes could be eliminated per spec:

Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:

 "In the subsections described above for array, vector, matrix and
  structure accesses, any out-of-bounds access produced undefined
  behavior....
  Out-of-bounds writes may be discarded or overwrite
  other variables of the active program.
  Out-of-bounds reads return undefined values, which
  include values from other variables of the active program or zero."

GL_KHR_robustness and GL_ARB_robustness encourage us to return zero
for reads.

Otherwise get_io_offset would return out-of-bound offset which may
result in out-of-bound loading/storing of inputs/outputs,
that could cause issues in drivers down the line.

E.g. this fixes such dereference:
 int vue_slot = vue_map->varying_to_slot[intrin->const_index[0]];
in brw_nir.c

CC: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6428>
(cherry picked from commit 66669eb529)
2020-09-24 09:32:14 -07:00
Bas Nieuwenhuizen
6d31ec1543 st/mesa: Deal with empty textures/buffers in semaphore wait/signal.
The actual texture might not have been created yet.

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3257
CC: mesa-stable
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6788>
(cherry picked from commit ade72e677b)
2020-09-24 09:32:14 -07:00
Lionel Landwerlin
cbe737040d intel/compiler: fixup Gen12 workaround for array sizes
We didn't handle the case of NULL images/textures for which we should
return 0.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 397ff2976b ("intel: Implement Gen12 workaround for array textures of size 1")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3522
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6729>
(cherry picked from commit cc3bf00cc2)
2020-09-24 09:32:14 -07:00
Samuel Pitoiset
3ec090f1ac radv: fix transform feedback crashes if pCounterBufferOffsets is NULL
From the Vulkan 1.2.154 spec:
    "If pCounterBufferOffsets is NULL, then it is assumed the
     offsets are zero."

Fix new CTS
dEQP-VK.transform_feedback.simple.backward_dependency_no_offset_array.

CC: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6798>
(cherry picked from commit 2b99e15d0a)
2020-09-24 09:32:14 -07:00
Rhys Perry
30fe359cbb radv,aco: fix reading primitive ID in FS after TES
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3530
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6760>
(cherry picked from commit 2228835fb5)
2020-09-24 09:32:14 -07:00
Bas Nieuwenhuizen
b1779e92e1 ac/surface: Fix depth import on GFX6-GFX8.
Lets just do depth interop imports by convention between radv and
radeonsi for now. The only thing using this should be Vulkan interop
anyway.

CC: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6617>
(cherry picked from commit ecc19e9819)
2020-09-24 09:32:14 -07:00
Dylan Baker
38b65b603d amd/ac_surface: convert tabs to 3 spaces
To make patches from master better apply
2020-09-24 09:32:14 -07:00