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radv: fix transform feedback crashes if pCounterBufferOffsets is NULL

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From the Vulkan 1.2.154 spec:
    "If pCounterBufferOffsets is NULL, then it is assumed the
     offsets are zero."

Fix new CTS
dEQP-VK.transform_feedback.simple.backward_dependency_no_offset_array.

CC: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6798>
This commit is contained in:
Samuel Pitoiset 2020-09-21 13:43:49 +02:00 • committed by Marge Bot
parent d2c18b7bf3
commit 2b99e15d0a
1 changed files with 20 additions and 4 deletions
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24
src/amd/vulkan/radv_cmd_buffer.c
View file

@ -6642,8 +6642,12 @@ radv_emit_streamout_begin(struct radv_cmd_buffer *cmd_buffer,
/* The array of counter buffers is optional. */
RADV_FROM_HANDLE(radv_buffer, buffer, pCounterBuffers[counter_buffer_idx]);
uint64_t va = radv_buffer_get_va(buffer->bo);
uint64_t counter_buffer_offset = 0;
va += buffer->offset + pCounterBufferOffsets[counter_buffer_idx];
if (pCounterBufferOffsets)
counter_buffer_offset = pCounterBufferOffsets[counter_buffer_idx];
va += buffer->offset + counter_buffer_offset;
/* Append */
radeon_emit(cs, PKT3(PKT3_STRMOUT_BUFFER_UPDATE, 4, 0));
@ -6706,9 +6710,13 @@ gfx10_emit_streamout_begin(struct radv_cmd_buffer *cmd_buffer,
if (append) {
RADV_FROM_HANDLE(radv_buffer, buffer, pCounterBuffers[counter_buffer_idx]);
uint64_t counter_buffer_offset = 0;
if (pCounterBufferOffsets)
counter_buffer_offset = pCounterBufferOffsets[counter_buffer_idx];
va += radv_buffer_get_va(buffer->bo);
va += buffer->offset + pCounterBufferOffsets[counter_buffer_idx];
va += buffer->offset + counter_buffer_offset;
radv_cs_add_buffer(cmd_buffer->device->ws, cs, buffer->bo);
}
@ -6771,8 +6779,12 @@ radv_emit_streamout_end(struct radv_cmd_buffer *cmd_buffer,
/* The array of counters buffer is optional. */
RADV_FROM_HANDLE(radv_buffer, buffer, pCounterBuffers[counter_buffer_idx]);
uint64_t va = radv_buffer_get_va(buffer->bo);
uint64_t counter_buffer_offset = 0;
va += buffer->offset + pCounterBufferOffsets[counter_buffer_idx];
if (pCounterBufferOffsets)
counter_buffer_offset = pCounterBufferOffsets[counter_buffer_idx];
va += buffer->offset + counter_buffer_offset;
radeon_emit(cs, PKT3(PKT3_STRMOUT_BUFFER_UPDATE, 4, 0));
radeon_emit(cs, STRMOUT_SELECT_BUFFER(i) |
@ -6823,8 +6835,12 @@ gfx10_emit_streamout_end(struct radv_cmd_buffer *cmd_buffer,
/* The array of counters buffer is optional. */
RADV_FROM_HANDLE(radv_buffer, buffer, pCounterBuffers[counter_buffer_idx]);
uint64_t va = radv_buffer_get_va(buffer->bo);
uint64_t counter_buffer_offset = 0;
va += buffer->offset + pCounterBufferOffsets[counter_buffer_idx];
if (pCounterBufferOffsets)
counter_buffer_offset = pCounterBufferOffsets[counter_buffer_idx];
va += buffer->offset + counter_buffer_offset;
si_cs_emit_write_event_eop(cs,
cmd_buffer->device->physical_device->rad_info.chip_class,