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Author SHA1 Message Date
Marcin Ślusarz
ea92bd8d44 intel/compiler: mask GS URB handles at thread payload construction 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Marcin Ślusarz
815eee10e0 intel/compiler/mesh: implement IO for xe2 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Marcin Ślusarz
ee4214de6e intel/compiler/mesh: fix position of output URB handle for xe2 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Francisco Jerez
7f3dc4505d intel/fs: Delete manual 'inst->mlen' calculations from all uses of logical URB reads. 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Francisco Jerez
53d1d793cb intel/fs: Delete manual 'inst->mlen' calculations from all uses of logical URB writes. 
Rework:
 * Marcin: update emit_urb_indirect_vec4_write

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Francisco Jerez
34a2c9ce35 intel/fs: Specify number of data components of logical URB writes via control immediate. 
This is what most logical SEND messages do when they take a variable
number of components.  'inst->mlen' is expected to be zero for logical
SEND opcodes, which are expected to behave like plain arithmetic
operations, so certain automated transformations (like SIMD lowering)
can manipulate them without opcode-specific special-casing.

Guessing the number of components from 'inst->mlen' has other
disadvantages, because it requires duplicating the logic that infers
the message payload size in every use of the instruction -- Instead we
can just do the computation once during logical send lowering.  In
addition on LNL platform this causes the 'inst->mlen' field of URB
writes to have units inconsistent with every other SEND instruction,
which is likely to lead to confusion and bugs down the road.

Rework:
 * Marcin: update emit_urb_indirect_vec4_write

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Francisco Jerez
74c9973c0b intel/fs/xe2+: Fix URB writes with 0 data components. 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Caio Oliveira
c89597085a intel/compiler/xe2: Update TCS ICP handle code to support SIMD16 
Rework:
 * Use ffs(grf_size_bytes) (s-b Ken)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Caio Oliveira
f0fcb778b4 intel/compiler/xe2: Fix URB writes in TCS 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Caio Oliveira
0c03018abf intel/compiler/xe2: URB fence uses LSC now 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Ian Romanick
623465e26d intel/compiler/xe2: Update fs_visitor::emit_urb_writes to not assume SIMD8 
v2: Account for 512b physical registers which causes the URB handle to be in FIXED_GFR 2 instead of 1.

XXX - Use fs_builder::vgrf() instead of open-coded dispatch_width calculations.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Kenneth Graunke
4fffdbbfa2 intel/fs: Fix Xe2 URB read/lowering with per-slot offsets 
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Jordan Justen
c28539a2fe intel/compiler: Use enum xe2_lsc_cache_load on xe2 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Jordan Justen
8d27b327f2 intel/compiler: Add enum xe2_lsc_cache_load 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Jordan Justen
09fc9ff114 intel/compiler: Use enum xe2_lsc_cache_store on xe2 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Jordan Justen
c54eff2e03 intel/compiler: Add enum xe2_lsc_cache_store 
Rework:
 * Rohan: Fix enum value for L1WB_L3WB
 * Fix write-through comments (Ken)

Ref: bspec 71167
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Marcin Ślusarz
1245020282 intel/compiler: add initial support for URB_LOGICAL_SRC_CHANNEL_MASK to lower_urb_write_logical_send_xe2 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Marcin Ślusarz
9c90377962 intel/compiler: add lsc_msg_desc_wcmask 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Ian Romanick
feec9166cd intel/compiler/xe2: Handle new URB write messages 
Rework:
 * idr v1: Fix compilation error.
 * idr v2: Add support for per-channel offsets.
 * idr v3: get_lowered_simd_width is 16 on Xe2+.
 * idr v4: Add disassembly support.  Add validation support.
 * Sqaushed in changes Marcin Ślusarz's patches:
   * "intel/compiler: skip adding 0 to payload address"
   * "intel/compiler/xe2: drop masking off top 8 bits of URB handle"

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Ian Romanick
fa53a7d241 intel/compiler/xe2: Handle new URB read messages 
Rework:
 * Sqaushed in changes Marcin Ślusarz's patches:
   * "intel/compiler: skip adding 0 to payload address"
   * "intel/compiler/xe2: drop masking off top 8 bits of URB handle"

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25195>
 2023-09-27 23:57:25 +00:00
Konstantin Seurer
4552e594f1 vulkan: Remove vk_get_physical_device_core_1_*_feature_ext 
It's unused.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24773>
 2023-09-27 23:02:29 +00:00
Konstantin Seurer
05796b29f5 hasvk: Use the common GetPhysicalDeviceFeatures2 implementation 
Reviewed-by: Julia Tatz <tatz.j@northeastern.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24773>
 2023-09-27 23:02:29 +00:00
Rhys Perry
65afc8bebf nir/algebraic: optimize u2u32(a >> 32) 
fossil-db (navi21):
Totals from 352 (0.44% of 79330) affected shaders:
Instrs: 271816 -> 271240 (-0.21%); split: -0.28%, +0.07%
CodeSize: 1546520 -> 1544448 (-0.13%); split: -0.23%, +0.09%
SpillVGPRs: 832 -> 827 (-0.60%); split: -1.08%, +0.48%
Latency: 4037120 -> 4021748 (-0.38%); split: -0.41%, +0.03%
InvThroughput: 1369540 -> 1362066 (-0.55%); split: -0.59%, +0.04%
VClause: 6476 -> 6471 (-0.08%); split: -0.12%, +0.05%
SClause: 6798 -> 6794 (-0.06%)
Copies: 44828 -> 44630 (-0.44%); split: -0.89%, +0.45%
Branches: 8845 -> 8844 (-0.01%); split: -0.05%, +0.03%
PreSGPRs: 14684 -> 14659 (-0.17%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25409>
 2023-09-27 22:13:01 +00:00
Rhys Perry
bcdac65ca3 nir/lower_int64: fix find_lsb(0) 
If the high 32 bits were zero, this would be umin(find_lsb(lo), 31). This
evaluates to 31 if lo is also zero, instead of -1.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Fixes: 9293d8e64b ("nir: Add find_lsb lowering to nir_lower_int64.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25409>
 2023-09-27 22:13:01 +00:00
wangra
e90f9d8e21 tu/kgsl: Fix bitfield of DITHER_MODE_MRT6 
The enum `adreno_rb_dither_mode` needs 2 bits, change the `high` to 13 to make sure 2 bits are used for `DITHER_MODE_MRT6`

Fixes: e03259974e ("freedreno: Generate headers from xml files")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25439>
 2023-09-27 21:45:40 +00:00
Jordan Justen
b5eb96384c anv: Print warning that Xe2 is not supported rather than failing 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25411>
 2023-09-27 21:11:18 +00:00
Jordan Justen
30ba269070 anv: Build for Xe2 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25411>
 2023-09-27 21:11:18 +00:00
Jordan Justen
65684b0c7f anv: Disable Ray Tracing on xe2 until our compiler supports Xe2 RT 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25411>
 2023-09-27 21:11:18 +00:00
Jordan Justen
3f1b4dd434 anv/blorp: Use anv_genX to set device->blorp.exec 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25411>
 2023-09-27 21:11:18 +00:00
Jordan Justen
3bb96643f7 iris: Build for Xe2 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25411>
 2023-09-27 21:11:18 +00:00
Lionel Landwerlin
ee4062666c iris: add missing workaround for 3DSTATE_LINE_STIPPLE 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25425>
 2023-09-27 20:32:50 +00:00
Lionel Landwerlin
a28ff995bb anv: add missing workaround for 3DSTATE_LINE_STIPPLE 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25425>
 2023-09-27 20:32:50 +00:00
Lionel Landwerlin
c59179e6bb anv/iris: widen Wa_14015946265 to Gfx11+ 
We missed out that ICL+ added a programming requiring a CS_STALL.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25426>
 2023-09-27 19:56:24 +00:00
Connor Abbott
302907e347 tu: Expose VK_KHR_maintenance5 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
 2023-09-27 19:07:22 +00:00
Connor Abbott
b0f1cb8f31 freedreno/ci: Skip dEQP-VK.info.device_extensions 
Copied from anv and radv.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
 2023-09-27 19:07:22 +00:00
Connor Abbott
e7d4bc6095 tu: Add maintenance5 properties 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
 2023-09-27 19:07:22 +00:00
Connor Abbott
a86f2132b3 tu: Check for DEVICE_LOST in vkGetEventStatus() 
Required by maintenance5.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
 2023-09-27 19:07:22 +00:00
Connor Abbott
b14a8dc2a7 tu: Support VkPipelineCreateFlags2CreateInfoKHR 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
 2023-09-27 19:07:22 +00:00
Connor Abbott
53dbfab87b tu: Use new buffer usage flags 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
 2023-09-27 19:07:22 +00:00
Connor Abbott
4fd12a18db tu: Implement vkGetRenderingAreaGranularityKHR 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
 2023-09-27 19:07:22 +00:00
Connor Abbott
2fb42fbd42 tu: Implement vkGetImageSubresourceLayout2KHR and vkGetDeviceImageSubresourceLayoutKHR 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
 2023-09-27 19:07:22 +00:00
Connor Abbott
53e518bcda tu: Implement vkCmdBindIndexBuffer2KHR 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
 2023-09-27 19:07:22 +00:00
Connor Abbott
26a88fc062 tu: Allow VK_WHOLE_SIZE in tu_CmdBindVertexBuffers2EXT pSizes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
 2023-09-27 19:07:22 +00:00
Connor Abbott
9669b48b4a tu/clear_blit: Allow VK_REMAINING_ARRAY_LAYERS as layerCount 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
 2023-09-27 19:07:22 +00:00
Connor Abbott
b9f673e9d4 tu/clear_blit: Fix staging image view layer count 
This seems to be a mistake that didn't affect anything.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
 2023-09-27 19:07:22 +00:00
Connor Abbott
c2c39a47a6 freedreno/fdl: Support PIPE_FORMAT_R5G5B5A1_UNORM on a6xx 
This is just a different swap of the same format.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
 2023-09-27 19:07:22 +00:00
Connor Abbott
dd99b58aa8 tu: Support clearing A8_UNORM 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
 2023-09-27 19:07:22 +00:00
Connor Abbott
60b1b18eb9 freedreno/fdl: Use A8_UNORM HW format for sampling 
We've already been using this for 3d blits on turnip and it works fine.
There's no need to emulate it, and it won't work on turnip where we
can't swizzle the border colors.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
 2023-09-27 19:07:22 +00:00
Connor Abbott
08581e2e92 zink: Rework color clamping and conversion 
Before this commit, zink_format_clamp_channel_color() ignored the format
swizzle, so it was assuming that for emulated formats like alpha,
alpha-luminance etc. that the color had already been swizzled to match
the internal format rather than the emulated one. It's somewhat confusing
that passing in e.g. A8_UNORM actually means R8_UNORM, and led to a bug
when using VK_FORMAT_A8_UNORM for texture border colors because we
didn't swizzle it back. It also wouldn't have worked for media formats
like R10X6G10X6 due to the void channel in the middle.

In order to fix this, we need to untangle the mess in its users.

For convert_color() used when clearing, this means we now need to clamp
and then swizzle instead of swizzle and then clamp, and we can drop the
hack for A8_UNORM.

For texture border colors, the state tracker duplicates colors for the
emulated formats to help drivers, which zink was previously relying on,
but fixing zink_format_clamp_channel_color() breaks this because it
assumes that those duplicated colors are useless and clamps them.
However, because we know the format we can just swizzle the border color
ourself, which convert_color() was already doing. So, we pull that out
into a common zink_convert_color() function that handles both clamping
and format emulation, and have both clearing and border color handling
use it.

This fixes A8_UNORM in turnip+zink once we enable it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25001>
 2023-09-27 19:07:22 +00:00
Erico Nunes
e3e64e3dbe v3dv: allow headless device without display device 
When trying to create a headless Vulkan instance without a display
device available, device enumeration would fail.
Part of the physical device creation code already accounts for a missing
display device, allow device enumeration to continue in that case too so
headless instances can be created.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25313>
 2023-09-27 18:46:31 +00:00