This will be needed in order to check off passing the VK CTS properly.
Please note, this does *not* mean that we are formally conformant, only
that we have passed the VK CTS at least once. Those are not the same
thing.
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Backport-to: 25.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33254>
(cherry picked from commit 2653a3988f)
bi_opt_mod_prop_backward tries to propagate values backwards, but
stops checking for uses when it reaches the SSA definition. For
ordinary blocks that's fine, but for loops the definition can come
after a PHI that uses the value. This causes incorrect code to be
generated in shaderdb test `shaders/skia/2134.shader_test`. Fix this
by special casing PHI instructions, in a manner similar to done in
asahi/compiler/agx_optimizer.c.
This bug has been present a long time, so we want it back-ported to
stable.
Cc: mesa-stable
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33483>
(cherry picked from commit 18a14c4522)
It turns out that the change from CENTER_Y to CENTER_X for
422 YUV didn't actually happen until generation 14 of the
hardware, not generation 10 as some documents claimed. This
fixes the failing piglit tests ext_image_dma_buf_import-sample_yuv
associated with 422 formats (which apparently we aren't running on CI).
Fixes: 23aa784c
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33516>
(cherry picked from commit c7fed8b053)
Make sure we're not lacking a lock/heap destroy when we fail to
create the VM.
Fixes: 53fb1d99ca ("panvk: Transition to explicit VA assignment on v10+")
Reported-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33471>
(cherry picked from commit 4ae12cc6ff)
init_queue() calls cleanup_queue() if anything fails in the middle, which
means finish_render_desc_ringbuf() will be automatically called if
init_render_desc_ringbuf() failed. Get rid of the the error path and
return directly instead. The one exception we have is the dev_addr
allocation, which needs to be explicitly freed if an error occurs between
util_vma_heap_alloc() and pan_kmod_vm_bind().
Reported-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Fixes: 5544d39f44 ("panvk: Add a CSF backend for panvk_queue/cmd_buffer")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33471>
(cherry picked from commit 5f3c6a0f27)
We were not correctly following VUID-VkImageCreateInfo-format-01577:
If format is not a multi-planar format, and flags does not
include VK_IMAGE_CREATE_ALIAS_BIT, flags must not contain
VK_IMAGE_CREATE_DISJOINT_BIT.
Fixes: 412c2863 ("panvk: Enable multiplane images and image views")
Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32563>
(cherry picked from commit 2ddd021bae)
Since the binding value can be any 32-bit number, we cannot assume that
it is <= 27 bits. We need 64-bit keys to accommodate a 32-bit binding.
This will also provide more bits to store the subdesc id, which will be
needed for multiplane texture and sampler descriptors.
Fixes: 7bea6f86 ("panvk: Overhaul the Bifrost descriptor set implementation")
Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32563>
(cherry picked from commit 9c4b530c49)
We rely on the panfrost_model details around the codebase, if it's not
known this is a problem.
As a result, we will now disallow anything that isn't known like what
we do on Gallium.
Fixes: c95ef9e323 ("panvk: Fix NULL deref on model name when device isn't supported")
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Suggested-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33371>
(cherry picked from commit e3b8d1da6d)
THe enum variant for u64 was actually 32-bit making all 64-bit operation
wrong.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: 7d0dc3d30c ("pan/decode: Add a helper to print CS binaries without interpreting them")
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33371>
(cherry picked from commit 7bb6ebe938)
TEX_FETCH doesn't have the CUBE dimension, this was working on v9 and
v10 but this fails on Avalon.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: ce52b6d359 ("pan/bi: Rework indices for tex on Valhall")
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33371>
(cherry picked from commit 135aeddc9b)
This src1 expect lanes, isn't widen and have a size of 8-bit (5-bit on
Valhall, 4-bit on Avalon)
We also now disallow swizzle lowering on it. (even on Bifrost)
Fixes: 316486dd9f ("pan/va: Add initial ISA.xml for Valhall")
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33371>
(cherry picked from commit b00c09b920)
We were wrongly defining values that select more than one byte.
The swizzle used for H01 was working fine for v9 and v10, but this
generate an invalid encoding on Avalon.
This fixes this by using B00 variant as we are only using 8-bit sources.
Fixes: f45654af59 ("pan/va: Add packing routines")
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33371>
(cherry picked from commit 637cb0a993)
We were hardcoding table 61 and index 0 for IDVS based usage and this
could have been misused.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: f45654af59 ("pan/va: Add packing routines")
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33371>
(cherry picked from commit fbd5d58e36)
The offset of dest should be 40, not 48.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: 486c341769 ("panfrost: Add architecture description XML for v10")
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33371>
(cherry picked from commit 38a3cd8c76)
Those were supposed to use BITFIELD_BIT.
Fixes: 2237cff1af ("panfrost: Report default value for GROUP_PRIORITIES_INFO in drm-shim")
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33371>
(cherry picked from commit 05c2abcfea)
These have been switching between failing and passing recently. Not
really sure what's going on here, but we don't want the CI to flip
randomly between failing and passing, so let's mark them as flakes.
Backport-to: 25.0
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33381>
(cherry picked from commit 4d86a1c928)
Vulkan defines the line rasterization to *always* use perpendicular
rather than aligned line ends (unless otherwise specified by
VK_EXT_line_rasterization). So let's remove the code that conditionally
sets the bit, we always want the default value (0) here.
It might seem confusing because we kinda named this field wrong. It's
really about perpendicular vs aligned line ends. That's a cleanup we
might want to deal with later, but deleting the assignment is sufficient
to fix this issue. This is also what we do for v10.
This was probably just copied from the Gallium-driver, where this logic
is more or less correct.
Fixes: d970fe2e9d ("panfrost: Add a Vulkan driver for Midgard/Bifrost GPUs")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33373>
(cherry picked from commit 1d64095410)
In a 3-plane uncompressed YUV surface, only the chroma planes should use
MALI_PLANE_TYPE_CHROMA_2P plane_type or set secondary_pointer.
Fixes: 144f9324a3 ("panfrost: prepare v9+ to support YUV sampling")
Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33104>
(cherry picked from commit 58bd1356cc)
On v10, only YUV 420 formats support center_y or center siting.
On previous HW versions, YUV 422 formats support center_y siting but not
center_x or center siting.
Fixes: 83c76cceaf ("panfrost: advertise YUV formats for valhall")
Signed-off-by: Rebecca Mckeever <rebecca.mckeever@collabora.com>
Reviewed-by: Eric R. Smith <eric.smith@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33104>
(cherry picked from commit 23aa784c05)
The blend count field is 4 bits not 3 bits.
Fixes: f2740ac69c ("pan/decode: Add support for decoding CSF")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33321>
(cherry picked from commit 438652654b)
Commit 2d3c50d484 ("panvk: Fix barriers in secondary cmdbufs w/o rp's")
started resetting the render flags we were relying on to decide to
clobber registers or not. Introduce a new field to restore that check.
Fixes: 2d3c50d484 ("panvk: Fix barriers in secondary cmdbufs w/o rp's")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33321>
(cherry picked from commit 127af6f38a)
The shader_modifies_coverage-flag is currently not set for PanVK. This
might lead to issues down the line, so ensure it's set correctly.
Fixes: 5544d39f44 ("panvk: Add a CSF backend for panvk_queue/cmd_buffer")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33300>
(cherry picked from commit 375116a3a0)
Enabling evaluate_per_sample in non-MSAA cases might cause issues and
hangs for subsequent ZS cases.
Therefore, only enable the flag when MSAA is active.
Fixes: 26d339ef8a ("panfrost: Generate Valhall Malloc IDVS jobs")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Benjamin Lee <benjamin.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33300>
(cherry picked from commit 46256f3e39)
The panfrost-g52-piglit-gles2:arm64 job was taking 19 minutes on
average, and the pending durations of the meson-g12b-a311d-khadas-vim3
DUTs in LAVA were reaching 5-6 minutes, so we have to make this job
manual instead of pre-merge.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33082>
This is a preliminary implementation of detiling for
NV12_16L32 tiled format external images. When we
encounter such an image, decode it into a secondary
buffer which will then be used to actually texture from.
In some cases applications may wish to represent the individual
planes of an NV12 image separately, we support that by allowing
detiling of just an R8 (luma) or R8G8 (chroma) plane.
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31899>
The DRIVER_NAME variable is used to locate the DRIVER_NAME-skips.txt
file. It was not used for panfrost, so remove the three places where
it was set, assign it to panvk, and add a panvk-skips.txt file.
Additionally, properly track changes to this file.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32817>
This is simply following the redirects the same way the browser does.
The new pages were manually verified to still contain the corresponding
information.
For URLs where this was not the case, see the next commits.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33159>
When encountering pipeline barriers in secondary command buffers that do
not start their renderpasses, our barrier logic would not detect the
need to flush existing draws, leading to race conditions in case of
subpassLoad.
This change ensures we flush existing draws when required in secondary
command buffers.
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33182>
Setting zs_update_operation = FORCE_EARLY for color preloads triggers
hangs in the dEQP-VK.rasterization.rasterization_order_attachment_access
depth/stencil tests. I didn't determine why this is the case, but the
DDK uses WEAK_EARLY for color preload, and doing the same here fixes the
hang.
WEAK_EARLY requires ATEST, so I removed .is_blit=true from the compiler
inputs.
There aren't any known hangs outside of the one set of vulkan CTS tests,
and in particular no known hangs in the gallium driver. Because the
reason for the hangs is not understood, I also changed the gallium
driver to use WEAK_EARLY, under the assumption that the same conditions
that trigger the hang in vulkan might occur in GL.
Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Fixes: edd98aac3f ("panfrost: Add support for native wallpapering on Bifrost")
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32954>
On bifrost, zs_update_operation=STRONG_EARLY, is equivalent to
WEAK_EARLY except that it may test/update without waiting for pixel
dependencies if it can prove that the test will pass.
STRONG_EARLY no longer exists on valhall, and the value 2 is reserved.
Even on bifrost, all of our current uses of STRONG_EARLY are
incorrect. For color preload, the shader skips ATEST, so FORCE_EARLY is
required. In the no-FS case, ATEST is skipped by definition (because
there is no shader), so FORCE_EARLY is required.
Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Fixes: 519643bbe0 ("panfrost: Adjust the renderer state definition")
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32954>
These failures were all caused by CTS bugs affecting Vulkan 1.0. But
since we now expose Vulkan 1.1 on V10, these issues no longer affect us.
Let's update the results to reflect this.
Fixes: 1a81bff6aa ("panvk: expose vk1.1 on v10 hardware")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33180>
This exptension requires Vulkan 1.1, which we don't expose there yet.
While we're at it, put panvk into the normal sorted order of the list of
drivers.
Fixes: d46b80249b ("panvk: enable subgroupSizeControl")
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33180>
On mt8192, the 6.13 kernel fails to reliably initialize the GPU, causing
a fallback to llvmpipe. Return to the 6.6 kernel until this is resolved.
Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Reviewed-by: Vignesh Raman <vignesh.raman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33181>
This pass used to unconditionally use divergence information
which forced the caller to either call divergence_analysis or
ensure that the divergence is properly reset.
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33009>
Without this, we fail to register-allocate the shader used in the
dEQP-VK.ssbo.phys.layout.random.8bit.scalar.78 VK-CTS test case.
Yeah, this sucks, but failing to compile sucks even more. We need a new
register allocator plan here.
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33124>
We can't use VK_SHADER_STAGE_ALL here, because we don't support geometry
and tesselation shaders. Additionally, the DDK doesn't support the
vertex stage, so let's not even try that for now; it probably won't
work.
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32710>
