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pan/bi: Properly encode LEA_BUF_IMM
We were hardcoding table 61 and index 0 for IDVS based usage and this
could have been misused.
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Fixes: f45654af59 ("pan/va: Add packing routines")
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33371>
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38a3cd8c76
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3 changed files with 10 additions and 4 deletions
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@ -1216,7 +1216,13 @@ bi_emit_store_vary(bi_builder *b, nir_intrinsic_instr *instr)
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if (index_offset != 0)
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index = bi_iadd_imm_i32(b, index, index_offset);
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bi_index address = bi_lea_buf_imm(b, index);
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/* On Valhall, with IDVS varying are stored in a hardware-controlled
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* buffer through table 61 at index 0 */
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bi_index address = bi_temp(b->shader);
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bi_instr *I = bi_lea_buf_imm_to(b, address, index);
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I->table = va_res_fold_table_idx(61);
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I->index = 0;
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bi_emit_split_i32(b, a, address, 2);
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bi_store(b, nr * src_bit_sz, data, a[0], a[1],
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@ -306,7 +306,7 @@ TEST_F(ValhallPacking, LdVarBufImmF16)
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TEST_F(ValhallPacking, LeaBufImm)
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{
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CASE(bi_lea_buf_imm_to(b, bi_register(4), bi_discard(bi_register(59))),
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0x005e840400000d7b);
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0x005e84040000007b);
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}
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TEST_F(ValhallPacking, StoreSegment)
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@ -472,8 +472,8 @@ va_pack_alu(const bi_instr *I)
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break;
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case BI_OPCODE_LEA_BUF_IMM:
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/* Buffer table index */
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hex |= 0xD << 8;
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hex |= ((uint64_t)I->table) << 8;
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hex |= ((uint64_t)I->index) << 12;
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break;
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case BI_OPCODE_LEA_ATTR_IMM:
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