pan/decode: Fix the blend_count mask

The blend count field is 4 bits not 3 bits.

Fixes: f2740ac69c ("pan/decode: Add support for decoding CSF")
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33321>
(cherry picked from commit 438652654b)
This commit is contained in:
Boris Brezillon 2025-01-31 14:40:22 +01:00 committed by Eric Engestrom
parent 6911634820
commit f2f488ced5
2 changed files with 4 additions and 3 deletions

View file

@ -814,7 +814,7 @@
"description": "pan/decode: Fix the blend_count mask",
"nominated": true,
"nomination_type": 2,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "f2740ac69c93872910161e64e6d06a53a119634e",
"notes": null

View file

@ -595,7 +595,7 @@ pandecode_run_tiling(struct pandecode_context *ctx, FILE *fp,
cs_get_u64(qctx, 48));
uint64_t blend = cs_get_u64(qctx, 50);
GENX(pandecode_blend_descs)(ctx, blend & ~7, blend & 7, 0, qctx->gpu_id);
GENX(pandecode_blend_descs)(ctx, blend & ~15, blend & 15, 0, qctx->gpu_id);
DUMP_ADDR(ctx, DEPTH_STENCIL, cs_get_u64(qctx, 52), "Depth/stencil");
@ -610,6 +610,7 @@ pandecode_run_tiling(struct pandecode_context *ctx, FILE *fp,
ctx->indent--;
}
static void
pandecode_run_idvs(struct pandecode_context *ctx, FILE *fp,
struct queue_ctx *qctx, struct MALI_CS_RUN_IDVS *I)
@ -726,7 +727,7 @@ pandecode_run_idvs(struct pandecode_context *ctx, FILE *fp,
pandecode_log(ctx, "Varying allocation: %u\n", cs_get_u32(qctx, 48));
uint64_t blend = cs_get_u64(qctx, 50);
GENX(pandecode_blend_descs)(ctx, blend & ~7, blend & 7, 0, qctx->gpu_id);
GENX(pandecode_blend_descs)(ctx, blend & ~15, blend & 15, 0, qctx->gpu_id);
DUMP_ADDR(ctx, DEPTH_STENCIL, cs_get_u64(qctx, 52), "Depth/stencil");