Commit graph

133781 commits

Author SHA1 Message Date
Alyssa Rosenzweig
885b091587 pan/bi: Use explicit move even for RT#0 of MRT
Otherwise we get a bad RA if RT 0 = RT 3 (for example), fixes
dEQP-GLES31.functional.shaders.opaque_type_indexing.sampler.const_literal.fragment.sampler2d

Fixes: a6f1500bed ("pan/bi: Workaround BLEND precolour with explicit moves")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9105>
(cherry picked from commit ed29a2beb8)
2021-03-11 14:12:23 -08:00
Jesse Natalie
45f800a14c microsoft/clc: Use driver_location for metadata instead of re-computing offsets
Fixes: ff05da7f ("microsoft: Add CLC frontend and kernel/compute support to DXIL converter")
Reviewed-By: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9138>
(cherry picked from commit 5b0a10823b)
2021-03-11 14:12:23 -08:00
Jesse Natalie
0cd2eab1b8 microsoft/clc: Move inline samplers to the end of the variable list
Since inline samplers are uniforms, just like kernel args, and
nir_lower_vars_to_explicit_types will assign driver_location based
on order in the variable list, move the inline samplers to the end
of the list to prevent them from creating gaps in the kernel arg
offsets.

Fixes: ff05da7f ("microsoft: Add CLC frontend and kernel/compute support to DXIL converter")
Reviewed-By: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9138>
(cherry picked from commit 3ee8f2ccba)
2021-03-11 14:12:23 -08:00
Jesse Natalie
ba87319c94 microsoft/clc: Fix wrap modes for inline samplers for integer textures
Fixes: ff05da7f ("microsoft: Add CLC frontend and kernel/compute support to DXIL converter")
Reviewed-By: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9138>
(cherry picked from commit d773257012)
2021-03-11 14:12:23 -08:00
Jesse Natalie
a98a386d13 microsoft/clc: Let lower_vars_to_explicit_types fill kernel input driver_location
Importantly, also run that before mucking with the variable list via image lowering,
which removes and inserts variables, making the driver_location no longer line up
with metadata.

Fixes: ff05da7f ("microsoft: Add CLC frontend and kernel/compute support to DXIL converter")
Reviewed-By: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9138>
(cherry picked from commit 9da8179a1e)
2021-03-11 14:12:23 -08:00
Dylan Baker
0ee919e708 .pick_status.json: Update to 4ded99f99d 2021-03-11 14:12:23 -08:00
Bas Nieuwenhuizen
ed162ed1cd vulkan/device_select: Stop using device properties 2.
We have to choose between:
1) Stop handling two identical GPUs
2) Stop having crashes with other layers active.
3) Fix the Vulkan Loader.

Since nobody seems to want to spend enough effort to do 3 the
effective choice is between 1 and 2. This is choosing 2, as
two identical GPUs is pretty uncommon since crossfire doesn't
work on Linux anyway.

(And it would only work sporadically as the game needs to enable the
 extension)

CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3801
Reviewed-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 38ce8d4d00)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9217>
2021-03-11 14:12:23 -08:00
Dylan Baker
99ea47ad55 VERSION: bump for 21.0.0-rc5 2021-02-19 10:00:44 -08:00
Timur Kristóf
202ff54b4d aco: Fix LDS statistics of tess control shaders.
The calculate_tess_lds_size function already returns the size in blocks
of the encoding granule, but we forgot to adjust config->lds_size.
This variable is not used to actually set the LDS size used for TCS,
but by ACO to make scheduling decisions.

Fossil DB stats on Sienna Cichlid:
Please note that the +3729.43% is NOT a regression.
The real LDS size used didn't change, it was just reported incorrectly.

Totals from 1342 (0.96% of 139391) affected shaders:
VGPRs: 60880 -> 80240 (+31.80%); split: -0.05%, +31.85%
CodeSize: 3378456 -> 3381224 (+0.08%); split: -0.23%, +0.31%
LDS: 687104 -> 26312192 (+3729.43%)
MaxWaves: 29794 -> 23962 (-19.57%)
Instrs: 644194 -> 644610 (+0.06%); split: -0.32%, +0.39%
Cycles: 2675068 -> 2676804 (+0.06%); split: -0.31%, +0.38%
VMEM: 428840 -> 517418 (+20.66%); split: +22.53%, -1.88%
SMEM: 91831 -> 88587 (-3.53%); split: +5.70%, -9.23%
VClause: 22740 -> 19384 (-14.76%); split: -16.18%, +1.42%
SClause: 19116 -> 18373 (-3.89%); split: -4.34%, +0.46%
Copies: 66662 -> 63448 (-4.82%); split: -5.55%, +0.73%

Fixes: cf89bdb9ba "radv: align the LDS size in calculate_tess_lds_size()"
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9098>
(cherry picked from commit 48f349971f)
2021-02-18 14:42:17 -08:00
Timur Kristóf
c6f1d33ae0 aco: Disallow LSHS temp-only I/O when VS output is written indirectly.
Cc: mesa-stable
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9100>
(cherry picked from commit a6e1178f91)
2021-02-18 14:42:17 -08:00
Timur Kristóf
dde6de9cbf radv/llvm: Fix reporting LDS stats of tess control shaders.
The LLVM backend forgot to set config->lds_size, which is used
for reporting LDS stats.

Fixes: cf89bdb9ba "radv: align the LDS size in calculate_tess_lds_size()"
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9098>
(cherry picked from commit 72c348f85c)
2021-02-18 14:42:17 -08:00
Jason Ekstrand
7047adf43b anv/formats: Advertise linear sampling on depth formats
They've all supported it since either forever or Iron Lake which is
equivalent to forever for Vulkan.

From Kenneth Graunke's GitLab review:

    "Linear blending of depth buffer data is usually fairly nonsense
    (something's 2 meters away?  another thing's 6 meters away?  let's
    just report 4 meters?)...but it's definitely a thing we can do, so
    we may as well let apps do it, and trust them not when it doesn't
    make sense."

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9110>
(cherry picked from commit 56d005c21c)
2021-02-18 14:42:17 -08:00
Anuj Phogat
811f4b21da intel/anv: Fix condition for planar yuv surface
Test the sampler->conversion for NULL pointer before dereferencing it.

Fixes: Regressions in VulkanCTS.
Fixes: 226316116c "intel/anv: Fix condition to set MipModeFilter for YUV surface"
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 69e94e8939)
2021-02-18 14:42:17 -08:00
Ian Romanick
47cffe6da3 intel/compiler: Use CMPN for min / max on Gen4 and Gen5
On Intel platforms before Gen6, there is no min or max instruction.
Instead, a comparison instruction (*more on this below) and a SEL
instruction are used.  Per other IEEE rules, the regular comparison
instruction, CMP, will always return false if either source is NaN.  A
sequence like

    cmp.l.f0.0(16)  null<1>F        g30<8,8,1>F     g22<8,8,1>F
    (+f0.0) sel(16) g8<1>F          g30<8,8,1>F     g22<8,8,1>F

will generate the wrong result for min if g22 is NaN.  The CMP will
return false, and the SEL will pick g22.

To account for this, the hardware has a special comparison instruction
CMPN.  This instruction behaves just like CMP, except if the second
source is NaN, it will return true.  The intention is to use it for min
and max.  This sequence will always generate the correct result:

    cmpn.l.f0.0(16) null<1>F        g30<8,8,1>F     g22<8,8,1>F
    (+f0.0) sel(16) g8<1>F          g30<8,8,1>F     g22<8,8,1>F

The problem is... for whatever reason, we don't emit CMPN.  There was
even a comment in lower_minmax that calls out this very issue!  The bug
is actually older than the "Fixes" below even implies.  That's just when
the comment was added.  That we know of, we never observed a failure
until #4254.

If src1 is known to be a number, either because it's not float or it's
an immediate number, use CMP.  This allows cmod propagation to still do
its thing.  Without this slight optimization, about 8,300 shaders from
shader-db are hurt on Iron Lake.

Fixes the following piglit tests (from piglit!475):

    tests/spec/glsl-1.20/execution/fs-nan-builtin-max.shader_test
    tests/spec/glsl-1.20/execution/fs-nan-builtin-min.shader_test
    tests/spec/glsl-1.20/execution/vs-nan-builtin-max.shader_test
    tests/spec/glsl-1.20/execution/vs-nan-builtin-min.shader_test

Closes: #4254
Fixes: 2f2c00c727 ("i965: Lower min/max after optimization on Gen4/5.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

Iron Lake and GM45 had similar results. (Iron Lake shown)
total instructions in shared programs: 8115134 -> 8115135 (<.01%)
instructions in affected programs: 229 -> 230 (0.44%)
helped: 0

HURT: 1
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027>
(cherry picked from commit 3c31364f5e)
2021-02-18 14:42:17 -08:00
Ian Romanick
56a31d5210 intel/compiler: Make the CMPN builder work like the CMP builder
Since the CMPN builder was never used, there was no reason to make its
interface usable. :)

Fixes: 2f2c00c727 ("i965: Lower min/max after optimization on Gen4/5.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027>
(cherry picked from commit 684ec33c79)
2021-02-18 14:42:17 -08:00
Ian Romanick
674a536825 intel/compiler: Enable the ability to emit CMPN instructions
v2: Move checks to the EU validator.  Suggested by Jason.

Fixes: 2f2c00c727 ("i965: Lower min/max after optimization on Gen4/5.")
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027>
(cherry picked from commit 6c8e2e9317)
2021-02-18 14:42:17 -08:00
Anuj Phogat
291b34ef0c intel/anv: Fix condition to set MipModeFilter for YUV surface
Mip Mode Filter must be set to MIPFILTER_NONE for Planar YUV surfaces.
Add the missing condition to check for planar format.

Fixes: b24b93d584 "anv: enable VK_KHR_sampler_ycbcr_conversion"
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
(cherry picked from commit 226316116c)
2021-02-18 14:42:17 -08:00
Mike Blumenkrantz
07029efa5d gallium/trace: add a pipe_screen::get_compiler_options method
this fixes crashes on startup

Fixes: a3512ddfdf ("st/mesa: don't enable NV_copy_depth_to_color if NIR doesn't support FP64")

fixes mesa/mesa#4312

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9082>
(cherry picked from commit 4feca7ecde)
2021-02-18 14:42:17 -08:00
Vinson Lee
c6140fb09d etnaviv: Fix memory leak in etna_vertex_elements_state_create.
Fix defect reported by Coverity Scan.

Resource leak (RESOURCE_LEAK)
leaked_storage: Variable cs going out of scope leaks the storage it points to.

Fixes: c9e8b49b88 ("etnaviv: gallium driver for Vivante GPUs")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9034>
(cherry picked from commit a7a7d25e5b)
2021-02-18 14:09:07 -08:00
Jason Ekstrand
eeb7cb93d2 intel/fs: Shuffle can't handle source modifiers
On Gen7, we have to split shuffles into two MOVs for 64-bit types so we
can't handle source modifiers.  On Gen12.5, we have to use integer types
all the time so we can't use them there either.  Fixing that will be a
different commit but it interacts with this one.

Fixes: 90c9f29518 "i965/fs: Add support for nir_intrinsic_shuffle"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9068>
(cherry picked from commit 3ce6ca7214)
2021-02-18 14:09:06 -08:00
Jason Ekstrand
2b5651e002 nir: Fix parameter order in the bcsel-of-shuffle optimization
Fixes: 4ff4d4e569 "nir/opt_intrinsic: Optimize bcsel(b, shuffle..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9068>
(cherry picked from commit 8b133a1b25)
2021-02-18 14:09:05 -08:00
Jason Ekstrand
1d23aa2618 nir: Don't optimize bcsel-of-shuffle across blocks
We can't move the shuffle to a new block so this only works if the
shuffle and the bcsel are in the same block.  Fortunately, in the
motivating case, this is true.

Also, we have to be careful around discard.  We could try really hard to
just avoid moving them past discard but we choose to simply bail if we
see a discard instead.

Fixes: 4ff4d4e569 "nir/opt_intrinsic: Optimize bcsel(b, shuffle..."
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9068>
(cherry picked from commit ceb6986d34)
2021-02-18 14:09:05 -08:00
Icecream95
eca7fc490c pan/bi: Use the correct size for UBO loads
Multiply by the destination bit size to get the number of bits to
load instead of assuming 32 bits.

Fixes: 2e57684d2d ("pan/bi: Implement load_ubo with the builder")
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9071>
(cherry picked from commit 9bb376bbdb)
2021-02-18 14:09:04 -08:00
Bas Nieuwenhuizen
379d31bc6c radv: Do pipe misalignment check per plane.
Fixes: 4c99d6ff54 ("radv: flush L2 for images affected by the pipe misaligned issue on GFX10+")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9078>
(cherry picked from commit 596fb88c01)
2021-02-18 14:09:03 -08:00
Samuel Pitoiset
d03634d438 radv: only apply the MRT output NaN fixup to non-meta shaders
We only want this workaround to be applied for game shaders.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4163
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9048>
(cherry picked from commit f502bdf1ab)
2021-02-18 14:09:02 -08:00
Mike Blumenkrantz
fe83bea355 zink: handle 1bit undef values in ntv
spirv requires that 1bit values be bool types, not uints

Fixes: 93af00502e ("zink: use uvec for undefs")

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9059>
(cherry picked from commit 8300bc1f16)
2021-02-18 14:09:02 -08:00
Mike Blumenkrantz
0ba7fae491 zink: fix slot mapping for legacy gl io with tess stages
e.g., gl_BackColor is a thing

Fixes: aec03553e1 ("zink: fix tess shader i/o variables")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9019>
(cherry picked from commit e3428419fb)
2021-02-18 14:09:01 -08:00
Eric Anholt
9b7500dff0 freedreno: Add missing dep on freedreno tracepoints.
We were only get guaranteed that libfreedreno (and thus the tracepoints
generation) was ready when we linked, not when we compiled the gmemtool.c
that also used it.

Fixes: a02dcb970f ("freedreno: Add GPU tracepoints")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9056>
(cherry picked from commit eabee821e9)
2021-02-18 14:07:22 -08:00
Alyssa Rosenzweig
25a9312d23 panfrost: Set tiler descriptor sampler pattern
Bifrost requires this to match the framebuffer descriptor's sample
pattern, but we were leaving the default (single-sampled)
unconditionally, leading to undefined behaviour.

It is unknown if this fixes any user-visible bugs, but without the
commit the descriptor is likely out-of-spec.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: 21.0 <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
(cherry picked from commit bea7839c1e)
2021-02-18 14:07:21 -08:00
Alyssa Rosenzweig
714e9a02d1 panfrost: Add panfrost_sample_pattern helper
We always use rotated grids to preserve current behaviour.

Cc stable as it is required for the next commit. If deemed too invasive,
a simpler fix could be backported.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Cc: 21.0 <mesa-stable@lists.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8774>
(cherry picked from commit b08100fb96)
2021-02-18 14:07:20 -08:00
Daniel Schürmann
8e8ba3402a aco: fix shared VGPR allocation on RDNA2
VGPRs are now allocated in blocks of 8 normal
or 16 shared VGPRs, respectively.

Fixes: 14a5021aff ('aco/gfx10: Refactor of GFX10 wave64 bpermute.')

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8921>
(cherry picked from commit bacc3b36f5)
2021-02-18 14:07:19 -08:00
Mike Blumenkrantz
f9a57d53c9 zink: fix streamout for tess stage
the tess shader needs to actually emit xfb stuff in order for it to work

Fixes: 2891e0b74e ("zink: pull xfb info from tess shader when applicable")

Reviewed-by: Hoe Hao Cheng <haochengho12907@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9013>
(cherry picked from commit 8721a6cbf2)
2021-02-18 14:05:53 -08:00
Jesse Natalie
93be7a0aee wgl: Disable automatic use of layered drivers with LIBGL_ALWAYS_SOFTWARE
Fixes: 8955980f ("gallium/targets/libgl-gdi: prefer d3d12 driver")
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8865>
(cherry picked from commit 41e8dec75c)
2021-02-18 14:05:52 -08:00
Jesse Natalie
fb2f644bae d3d12: Fail screen creation if a shader validator is needed and can't be created
Also fail screen creation if experimental shader models are requested, but can't be enabled

Fixes: 2ea15cd6 ("d3d12: introduce d3d12 gallium driver")
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4022
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8865>
(cherry picked from commit 2ddafc2676)
2021-02-18 14:05:51 -08:00
Jesse Natalie
aa7a38dd44 wgl: Add a loop for screen creation with an ordered list of fallbacks
Fixes: 8955980f ("gallium/targets/libgl-gdi: prefer d3d12 driver")
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4022
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8865>
(cherry picked from commit f66b0c7303)
2021-02-18 14:05:50 -08:00
Jesse Natalie
83f99bbb4f wgl: Refactor screen creation to a function
Fixes: 8955980f ("gallium/targets/libgl-gdi: prefer d3d12 driver")
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Tested-by: Prodea Alexandru-Liviu <liviuprodea@yahoo.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4022
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8865>
(cherry picked from commit e6cf34d611)
2021-02-18 14:05:49 -08:00
Alyssa Rosenzweig
63d0fbb07b pan/bi: Fix empty shader handling
Fixes INSTR_INVALID_ENC fault on dEQP-GLES31.functional.compute.basic.empty

Fixes: bfcdc8f174 ("pan/bi: Add some zero bytes after shaders on Bifrost")
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9011>
(cherry picked from commit 9bf8bfe3c8)

 Conflicts:
	src/panfrost/bifrost/bifrost_compile.c
2021-02-18 14:05:47 -08:00
Bas Nieuwenhuizen
67db4ad07f radv: Ignore WC flags for VRAM.
Otherwise there might be buffers for which we don't have a type.

Fixes: 7262c743dc ("radv: Determine memory type for import based on fd.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4280
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8996>
(cherry picked from commit 045a85085a)
2021-02-18 12:59:40 -08:00
Giovanni Mascellani
2e980353d2 anv: Allow null handle in DestroyDescriptorUpdateTemplate.
By the Vulkan specification, and similarly to many other Vulkan calls,
it is allowed to destroy a null descriptor update template.

Signed-off-by: Giovanni Mascellani <gmascellani@codeweavers.com>
Fixes: af5f13e58c ("anv: add VK_KHR_descriptor_update_template support")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9005>
(cherry picked from commit 72b8e643b0)
2021-02-18 12:59:40 -08:00
Giovanni Mascellani
7ac677a051 disk_cache: Fail creation when cannot inizialize queue.
Signed-off-by: Giovanni Mascellani <gmascellani@codeweavers.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Fixes: e2c4435b07 ("util/disk_cache: add thread queue to disk cache")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8983>
(cherry picked from commit c6731daa5e)
2021-02-18 12:59:39 -08:00
Lionel Landwerlin
9948a0f154 anv: discard all timeline wait/signal value=0
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 34f32a6d66 ("anv: implement VK_KHR_timeline_semaphore")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4277
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8987>
(cherry picked from commit 6673c40011)
2021-02-18 12:59:38 -08:00
Timur Kristóf
37c4ed461f tgsi_to_nir: Fix uniform ranges.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
Fixes: f3b33a5a35
Closes: #4127
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8920>
(cherry picked from commit e163f1c949)
2021-02-18 12:59:37 -08:00
Dave Airlie
b96190e9d7 glsl: fix leak in gl_nir_link_uniform_blocks
asan on llvmpipe with piglit tests/spec/arb_gl_spirv/execution/ssbo/array-indirect.shader_test
reported.

=================================================================
==3288325==ERROR: LeakSanitizer: detected memory leaks

Direct leak of 48 byte(s) in 1 object(s) allocated from:
    #0 0x7f5b2d6513cf in __interceptor_malloc (/lib64/libasan.so.6+0xab3cf)
    #1 0x7f5b2a1ae810 in ralloc_size ../src/util/ralloc.c:133
    #2 0x7f5b2a1ae7e1 in ralloc_context ../src/util/ralloc.c:120
    #3 0x7f5b2b210177 in gl_nir_link_uniform_blocks ../src/compiler/glsl/gl_nir_link_uniform_blocks.c:585
    #4 0x7f5b2af7f52d in gl_nir_link_spirv ../src/compiler/glsl/gl_nir_linker.c:614
    #5 0x7f5b2a3b76fa in st_link_nir ../src/mesa/state_tracker/st_glsl_to_nir.cpp:765
    #6 0x7f5b2a3ace7b in st_link_shader ../src/mesa/state_tracker/st_glsl_to_ir.cpp:65
    #7 0x7f5b2a471165 in _mesa_glsl_link_shader ../src/mesa/program/ir_to_mesa.cpp:3122
    #8 0x7f5b2a97a6d8 in link_program ../src/mesa/main/shaderapi.c:1311
    #9 0x7f5b2a97a6d8 in link_program_error ../src/mesa/main/shaderapi.c:1419
    #10 0x7f5b2a97df45 in _mesa_LinkProgram ../src/mesa/main/shaderapi.c:1911
    #11 0x7f5b299b59e5 in stub_glLinkProgram /mnt/devel/gl/piglit/tests/util/piglit-dispatch-gen.c:33956
    #12 0x40a71a in link_and_use_shaders /mnt/devel/gl/piglit/tests/shaders/shader_runner.c:1604
    #13 0x415722 in init_test /mnt/devel/gl/piglit/tests/shaders/shader_runner.c:5225
    #14 0x4164ce in piglit_init /mnt/devel/gl/piglit/tests/shaders/shader_runner.c:5597
    #15 0x7f5b29a214e9 in run_test /mnt/devel/gl/piglit/tests/util/piglit-framework-gl/piglit_winsys_framework.c:73
    #16 0x7f5b29a103fe in piglit_gl_test_run /mnt/devel/gl/piglit/tests/util/piglit-framework-gl.c:229
    #17 0x407847 in main /mnt/devel/gl/piglit/tests/shaders/shader_runner.c:72
    #18 0x7f5b2928f1e1 in __libc_start_main (/lib64/libc.so.6+0x281e1)

SUMMARY: AddressSanitizer: 48 byte(s) leaked in 1 allocation(s).

Fixes: 57239192 ("nir/linker: add gl_nir_link_uniform_blocks.c")
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8974>
(cherry picked from commit 14b2dc0013)
2021-02-18 12:59:36 -08:00
Ian Romanick
51808a2076 intel/compiler: Properly handle shift count for 8-bit sources
This fixes the Crucible func.shader.shift.int8_t test on Gen8 and Gen9.
See https://gitlab.freedesktop.org/mesa/crucible/-/merge_requests/76.

No changes in fossil-db because there are no shaders in fossil-db that
use shaderInt8. :(

A couple alternatives were considered.

1. Lower 8-bit integers to 16-bit on all platforms.  I looked at the
   output of a few shaders from the Vulkan CTS, and it was a mess.
   There were so many extra type converting MOVs.  I think all of that
   could be cleaned up, but it would be more work.  It would also not be
   great for cherry-picking to a stable branch.

   This *is* the approach that will be taken Mesa 21.1.  See also
   https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8730.

2. Disable the optimization that prunes the `& 7`.  This would be more
   optimal in shaders that don't have the explicit mask, but it's not
   very future proof.  It would potentially require auditing future
   optimizations to make sure they don't run afoul of this problem.

In the end, the easiest solution seems to be adding the extra mask to
implement the specified semantics of the NIR shift instructions...
especially since the only shaders we have that use shaderInt8 are from
the CTS.

v2: Use braces in the else part because they were used in the then part.
Suggested by Jason.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: 26fc5e1f4a ("nir/algebraic: expand existing 32-bit patterns to all bit sizes using loops")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9001>
2021-02-18 20:39:16 +00:00
Rhys Perry
339c9e52e3 aco: add fallback algorithm in get_reg()
The generated code is often terrible, but the situations where this is
needed are rare.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8881>
2021-02-18 20:12:41 +00:00
Dylan Baker
0ce1f09101 Revert "vulkan: Make vk_debug_report_callback derive from vk_object_base"
This reverts commit ca39949a27.
2021-02-18 11:29:07 -08:00
Dylan Baker
86a28983dd .pick_status.json: Update to 03d3294e35 2021-02-18 11:26:55 -08:00
Adam Jackson
d851b07fef osmesa: Pacify MSVC in the test code
Not smart enough to think this is const, eh.

Fixes: mesa/mesa#4119
Fixes: c5c1aa7c75 ("gallium/osmesa: Fix flushing and Y-flipping of the depth buffer.")
Reviewed-by: Eric Anholt <eric@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8936>
(cherry picked from commit 88ca480c8b)
2021-02-10 15:11:17 -08:00
Eric Anholt
fd7be16bd3 v3d: Clean up vestiges of alpha test lowering.
We had an unnecessary case in our uniforms upload switch statement, since
we no longer advertise the cap.

Fixes: 8ad931808e ("v3d: do not report alpha-test as supported")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8601>
(cherry picked from commit 5ddc2f916f)
2021-02-10 15:11:15 -08:00
Eric Anholt
6723819cc2 vc4: Remove vestiges of alpha test lowering.
We stopped reporting the alpha test screen cap, and stopped using the
value in the key, so now shrink the key.  This gets another switch case
out of the hot uniforms upload path.

Fixes: 1404b8b1e5 ("vc4: do not report alpha-test as supported")
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8601>
(cherry picked from commit cc0841c82a)
2021-02-10 15:11:15 -08:00