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intel/compiler: Enable the ability to emit CMPN instructions
v2: Move checks to the EU validator. Suggested by Jason. Fixes:2f2c00c727("i965: Lower min/max after optimization on Gen4/5.") Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9027> (cherry picked from commit6c8e2e9317)
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291b34ef0c
commit
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5 changed files with 52 additions and 1 deletions
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@ -364,7 +364,7 @@
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"description": "intel/compiler: Enable the ability to emit CMPN instructions",
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"nominated": true,
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"nomination_type": 1,
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"resolution": 0,
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"resolution": 1,
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"master_sha": null,
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"because_sha": "2f2c00c7279e7c43e520e21de1781f8cec263e92"
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},
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@ -1281,6 +1281,12 @@ void brw_CMP(struct brw_codegen *p,
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struct brw_reg src0,
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struct brw_reg src1);
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void brw_CMPN(struct brw_codegen *p,
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struct brw_reg dest,
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unsigned conditional,
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struct brw_reg src0,
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struct brw_reg src1);
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void
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brw_untyped_atomic(struct brw_codegen *p,
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struct brw_reg dst,
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@ -1986,6 +1986,36 @@ void brw_CMP(struct brw_codegen *p,
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}
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}
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void brw_CMPN(struct brw_codegen *p,
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struct brw_reg dest,
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unsigned conditional,
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struct brw_reg src0,
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struct brw_reg src1)
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{
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const struct gen_device_info *devinfo = p->devinfo;
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brw_inst *insn = next_insn(p, BRW_OPCODE_CMPN);
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brw_inst_set_cond_modifier(devinfo, insn, conditional);
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brw_set_dest(p, insn, dest);
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brw_set_src0(p, insn, src0);
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brw_set_src1(p, insn, src1);
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/* Page 166 of the Ivy Bridge PRM Volume 4 part 3 (Execution Unit ISA)
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* says:
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*
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* If the destination is the null register, the {Switch} instruction
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* option must be used.
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*
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* Page 77 of the Haswell PRM Volume 2b contains the same text.
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*/
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if (devinfo->gen == 7) {
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if (dest.file == BRW_ARCHITECTURE_REGISTER_FILE &&
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dest.nr == BRW_ARF_NULL) {
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brw_inst_set_thread_control(devinfo, insn, BRW_THREAD_SWITCH);
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}
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}
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}
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/***********************************************************************
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* Helpers for the various SEND message types:
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*/
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@ -2117,6 +2117,18 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
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}
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brw_CMP(p, dst, inst->conditional_mod, src[0], src[1]);
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break;
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case BRW_OPCODE_CMPN:
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if (inst->exec_size >= 16 && devinfo->gen == 7 && !devinfo->is_haswell &&
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dst.file == BRW_ARCHITECTURE_REGISTER_FILE) {
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/* For unknown reasons the WaCMPInstFlagDepClearedEarly workaround
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* implemented in the compiler is not sufficient. Overriding the
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* type when the destination is the null register is necessary but
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* not sufficient by itself.
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*/
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dst.type = BRW_REGISTER_TYPE_D;
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}
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brw_CMPN(p, dst, inst->conditional_mod, src[0], src[1]);
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break;
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case BRW_OPCODE_SEL:
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brw_SEL(p, dst, src[0], src[1]);
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break;
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@ -1594,6 +1594,9 @@ generate_code(struct brw_codegen *p,
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case BRW_OPCODE_CMP:
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brw_CMP(p, dst, inst->conditional_mod, src[0], src[1]);
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break;
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case BRW_OPCODE_CMPN:
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brw_CMPN(p, dst, inst->conditional_mod, src[0], src[1]);
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break;
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case BRW_OPCODE_SEL:
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brw_SEL(p, dst, src[0], src[1]);
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break;
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