Commit graph

648 commits

Author SHA1 Message Date
Tapani Pälli
bafa1120ce genxml/mi: add additional bit to FF_MODE and autostrip helper
This provides bit and common code to control autostrip state.

Requirement for this is coming from Wa_14026781792. We are writing
register for Wa_14024997852 and since this register is nonmaskable
the bit needs to be written always. Helper takes care to touch only
required bits.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40344>
2026-03-30 11:02:27 +00:00
Marek Olšák
102d41799b Rename more sha and sha1 names to blake3
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383>
2026-03-23 07:03:28 +00:00
Marek Olšák
d4831aaf5f Rename sha1_* and sha_* names to blake3_*
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383>
2026-03-23 07:03:28 +00:00
Marek Olšák
c0ac992a2a Remove mesa-sha1.h
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383>
2026-03-23 07:03:27 +00:00
Marek Olšák
699f9d7066 Inline _mesa_sha1_init/update/final functions
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383>
2026-03-23 07:03:27 +00:00
Marek Olšák
a965ada6ee Inline mesa_sha1, SHA1_CTX
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383>
2026-03-23 07:03:27 +00:00
Marek Olšák
110632f702 Inline SHA1_DIGEST_LENGTH
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383>
2026-03-23 07:03:27 +00:00
Michael Cheng
b901ff322a intel/blorp: add explicit clear op enums for stencil and linear paths
Add dedicated BLORP op enums so clear paths can be represented
precisely.

This is enum-only groundwork; behavior and trace output are wired in
follow-up commits.

Signed-off-by: Michael Cheng <michael.cheng@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40414>
2026-03-17 21:10:40 +00:00
Jordan Justen
1a12bca465 intel/l3: Add Xe3P (GFX_VERx10==350)
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40208>
2026-03-04 11:10:34 -08:00
Kenneth Graunke
56e638be81 intel: Rename wm_prog_data to fs_prog_data
This is the program data for the fragment shader.  Nobody even knows
what the windowizer/masker unit is or does anymore.  Even on Gen4-6,
"fs" is still clearer.  This makes the codebase easier to read.

This is only about 15 years overdue.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39748>
2026-02-06 20:51:59 -08:00
Kenneth Graunke
beb4b78fe7 intel: Rename intel_msaa_flags to intel_fs_config
This started out as dynamic configuration for MSAA related state, but
has since expanded to cover many dynamic fragment shader options.

We rename it to intel_fs_config, similar to intel_tess_config, to
better indicate its purpose.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39748>
2026-02-06 20:51:43 -08:00
Dmitry Osipenko
b06d759a93 intel: Add virtio-gpu native context
Add virtio-intel native DRM context base preparatory code. Virtio-intel
works by passing ioctl's from guest to host for execution, utilizing
available VirtIO-GPU infrastructure.

This patch adds initial experimental native context support using i915
KMD UAPI.

Compile Mesa with -Dintel-virtio-experimental=true to enable virtio-intel
native context support.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29870>
2026-02-06 00:15:37 +00:00
Francisco Jerez
79ab5db71b intel/measure: Define snapshot type for HiZ partial resolves.
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31139>
2026-01-27 08:52:16 +00:00
Nanley Chery
f208ac9f4b intel: Enable CCS support for Yf and Ys
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Enable CCS with Ys on all systems, and with Yf on gfx9-11.

Unfortunately, Yf + CCS isn't supported on gfx12. Tests fail and systems
hang in the CI with this enabled. The simulator also complains about
this combination on tests such as:

   dEQP-VK.api.image_clearing.core.clear_color_attachment.multiple_layers.r4g4b4a4_unorm_pack16
   dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.r4g4b4a4_unorm_pack16_200x180_sample_count_2

The simulator doesn't complain about this combination on depth/stencil
surfaces, but actual hardware still has issues with this.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11057
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38063>
2026-01-26 21:09:05 +00:00
Michel Dänzer
a74ffd6900 Pass the destination buffer size minus one to strncpy
Copying the last byte was pointless, since the next line overwrites it,
and resulted in a compiler warning:

../src/intel/common/intel_measure.c: In function 'intel_measure_init':
../src/intel/common/intel_measure.c:68:7: warning: 'strncpy' specified bound 1024 equals destination size [-Wstringop-truncation]
   68 |       strncpy(env_copy, env, 1024);
      |       ^~~~~~~~~~~~~~~~~~~~~~~~~~~~

This allows dropping -Wno-error=stringop-truncation from the
debian-x86_64-asan & debian-{arm64,x86_64}-ubsan CI jobs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39429>
2026-01-22 15:44:09 +01:00
Carlos Santa
c8a08c5375 intel/tools: Handle new replay properties in the Xe KMD error dump file
The changes as part of the Contexts state now include:

**** Contexts ****
[HWCTX].replay_offset: 0x0
[HWCTX].replay_length: 0xd000

and the changes as part of the VM state now include:

**** VM state ****
VM.uapi_flags: 0x1
[40000].length: 0x2000
[40000].properties: read_write|bo|mem_region=0x1|pat_index=2|cpu_caching=1
[40000].data: &-)\3!!E9mzzzzzzzzzz

In order to be able to replay a GPU hang from a devcore dump file
new properties have been added describing the offset and the length
of the affected hw context as well as a global VM flag and
several VMA property types: memory region, bo caching, pat index,
memory permission and memory type.

Signed-off-by: Carlos Santa <carlos.santa@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34829>
2026-01-07 19:16:25 +00:00
Marek Olšák
1912a00a91 ALL: use SHA1_DIGEST_LENGTH etc. instead of hardcoding the numbers
only build_id is switched to use literal 20 instead of SHA1_DIGEST_LENGTH
because we will increase SHA1_DIGEST_LENGTH to BLAKE3_KEY_LEN

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39110>
2026-01-07 08:32:33 +00:00
Yonggang Luo
ecb0ccf603 treewide: Replace calling to function ALIGN with align
This is done by grep ALIGN( to align(

docs,*.xml,blake3 is excluded

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38365>
2025-11-12 21:58:40 +00:00
Sagar Ghuge
16f66ffe55 intel/common: Consider 0 threads while setting TG
In ray tracing dispatch, we have dispatch.threads set to 0 since we
calculate the local_size_x/y/z based on the launch sizes.

This change takes 0 threads into an account and returh the TG size 8 in
such scenarios. Before this change, we were setting TG size to 2.

Fixes: 0c4e1c9efc ("intel/common: Add helper for compute thread group dispatch size")
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38229>
2025-11-10 12:09:30 -08:00
Faith Ekstrand
1fbc73836e intel: Drop intel_mem.c/h
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37803>
2025-10-16 01:19:45 +00:00
Paulo Zanoni
b75e0462ec intel: unify parameters for the exec ioctl retries
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Add the common magic numbers in a header file and make the functions
use them.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
6d6b22b734 intel/xe: unify behavior with i915.ko regarding ENOMEM on DRM_IOCTL_XE_EXEC
When the system is under memory pressure (which can happen, for
example, during CI runs), don't immediately give up the exec ioctl
(which, for Vulkan, will result in the device being declared lost).
Instead, retry a little bit just like we do for i915.ko.

This is a trade-off.

One of the reasons to *not* have unified behavior regarding ENOMEM
between i915.ko and xe.ko is the fact that xe.ko uses vm_bind, so if
the user tried to bind more memory than it is able to, we'll just keep
getting ENOMEM as long as we retry the ioctl. We now have a retry
limit, so we'll eventually return the error.

On the other hand, if the problem is other applications consuming all
the memory, having the retry loop may really help avoid unnecessarily
marking the device as lost, since one of our retries may eventually
succeed.

I believe the tradeoff of "we'll now eventually succeed in some cases
where it's possible to succeed, at the expense of retrying for a few
seconds until giving up in cases where we would never be able to
succeed" is an improvement.

If xe.ko ever gives us a way to differentiate between the two
different reasons for ENOMEM, we'll be able to make things much
better. We can also tune our timeouts if needed.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
680daeea63 intel/i915: warn the user about repeated execbuf ENOMEM after ~2s
By this point, the user may have noticed their game is not drawing any
new frames, so perhaps an error message might help.

This would also, of course, help identifying ENOMEM problems in our CI
runs.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
dc1877a0a1 intel/i915: give up the execbuf ioctl after ~16s of ENOMEMs
If nothing has freed memory until that point, return the error, which
may make the upper layers report the device as lost. It could be that
the system is under very very heavy swapping and that waiting a little
more would make it work, but let's try 16s for now.

v2: Bring down the timeout from ~60s to ~16s (José).

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
7b1e9af900 intel/i915: sleep a little bit between retries of the execbuf ioctl
If the ioctl is returning ENOMEM, incessantly retrying does not seem
to be the best way to proceed. After the second retry, sleep 0.1ms,
then more each time, giving the CPU some time to run the other threads
and processes, in the hope that whatever is eating all the memory
might eventually return it.

If the problem is the current thread, then busy looping won't help
either, so here we at least save some power before the user kills the
app.

v2: Adjust the control flow and the sleep time.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Paulo Zanoni
d19a051714 intel/i915: add i915_gem_execbuf_ioctl()
Unify the common code for i915.ko execbuf submission between Iris and
Anv. I plan to add more code to this function in the next patches.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37559>
2025-10-07 19:48:36 +00:00
Tim Van Patten
f90e0f0797 intel: Convert getenv() to os_get_option()
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
os_get_option() is a wrapper for getenv() that checks properties in
Android. It should be a no-op for other OS but will allow full use of
env vars in Android.

The environment variable names are automatically renamed by
os_get_option() and the order of precedence thus becomes:

1. getenv (non-Android)
2. debug.mesa.* (Android)
3. vendor.mesa.* (Android)
4. mesa.* (Android, as a fallback for older versions)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37587>
2025-09-25 17:01:18 -06:00
Faith Ekstrand
d7416ebc19 intel/gem: Add an intel_gem_supports_dma_buf_sync_file() helper
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36783>
2025-08-16 00:04:46 -04:00
Qiang Yu
196569b1a4 all: rename gl_shader_stage to mesa_shader_stage
It's not only for GL, change to a generic name.

Use command:
  find . -type f -not -path '*/.git/*' -exec sed -i 's/\bgl_shader_stage\b/mesa_shader_stage/g' {} +

Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36569>
2025-08-06 10:28:40 +08:00
Lionel Landwerlin
e52c1c3ba4 intel: reuse intel_urb_config for mesh
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36512>
2025-08-01 11:35:06 +00:00
Lionel Landwerlin
be16985c82 intel: move deref_block_size to intel_urb_config
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36512>
2025-08-01 11:35:05 +00:00
Antonio Ospite
ddf2aa3a4d build: avoid redefining unreachable() which is standard in C23
In the C23 standard unreachable() is now a predefined function-like
macro in <stddef.h>

See https://android.googlesource.com/platform/bionic/+/HEAD/docs/c23.md#is-now-a-predefined-function_like-macro-in

And this causes build errors when building for C23:

-----------------------------------------------------------------------
In file included from ../src/util/log.h:30,
                 from ../src/util/log.c:30:
../src/util/macros.h:123:9: warning: "unreachable" redefined
  123 | #define unreachable(str)    \
      |         ^~~~~~~~~~~
In file included from ../src/util/macros.h:31:
/usr/lib/gcc/x86_64-linux-gnu/14/include/stddef.h:456:9: note: this is the location of the previous definition
  456 | #define unreachable() (__builtin_unreachable ())
      |         ^~~~~~~~~~~
-----------------------------------------------------------------------

So don't redefine it with the same name, but use the name UNREACHABLE()
to also signify it's a macro.

Using a different name also makes sense because the behavior of the
macro was extending the one of __builtin_unreachable() anyway, and it
also had a different signature, accepting one argument, compared to the
standard unreachable() with no arguments.

This change improves the chances of building mesa with the C23 standard,
which for instance is the default in recent AOSP versions.

All the instances of the macro, including the definition, were updated
with the following command line:

  git grep -l '[^_]unreachable(' -- "src/**" | sort | uniq | \
  while read file; \
  do \
    sed -e 's/\([^_]\)unreachable(/\1UNREACHABLE(/g' -i "$file"; \
  done && \
  sed -e 's/#undef unreachable/#undef UNREACHABLE/g' -i src/intel/isl/isl_aux_info.c

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/36437>
2025-07-31 17:49:42 +00:00
Caio Oliveira
887642b0f2 intel: Add INTEL_DEBUG=no-vrt
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Add support for disabling the VRT (Variable Register Thread) feature.
The strategy here is to force the old BRW_MAX_GRF limit for the
register allocator (locks the upper limit) and make sure
ptl_register_blocks() always return that amount of blocks (locks
the lower limit).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35781>
2025-07-13 21:11:02 +00:00
Sagar Ghuge
0c4e1c9efc intel/common: Add helper for compute thread group dispatch size
The recommended settings is just a guidance and not a programming
requirement as per the Bspec.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35904>
2025-07-10 22:08:36 +00:00
José Roberto de Souza
59d361043e intel/common: Use as much as possible spec recommended values for compute engine async thread limits
Spec recommended values should give us a good balance between progress
in render and compute engines, also with less possibility of values
it will reduce the number of times that we need to emit
STATE_COMPUTE_MODE reducing the number of stalls in the compute engine.

Cc: stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35563>
2025-06-23 18:57:25 +00:00
José Roberto de Souza
080b9a165c intel/common: Add function to compute optimal compute engine async thread limits
Spec has several restrictions to the values we program to compute
engine async thread limits.
Without those we risk hit deadlocks, so here adding a function to
return the optimal value based on those restrictions.

Cc: stable
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35563>
2025-06-23 18:57:24 +00:00
Calder Young
6f28364541 intel_aux_map: Avoid creating new table pages when removing
Fixes #13241, where iris_bufmgr occasionally deadlocks while allocating buffers.

The deadlock happens when iris_bufmgr.c calls intel_aux_map_unmap_range while
holding the bufmgr lock, with a range that includes pages that were never created,
which can happen because the iris_resource that adds aux mappings will sometimes
use a slightly larger buffer with an offset to ensure the resource is aligned
correctly.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35266>
2025-06-02 20:10:49 +00:00
Kenneth Graunke
1dfed59c49 intel: Use devinfo->urb.min_entries[GS and TCS] for setting URB configs
We were not using the minimum values from devinfo for anything.  For
tessellation control, the minimum value is 0, so we continue taking
MAX2 of that with 1 when tessellation is enabled so we have at least
something guaranteed to be present.  For geometry, the minimum value
is already non-zero (and updated by the previous patch).

This will have the side-effect of raising the minimum number of URB
entries for geometry stages.  This is currently not known to fix
anything, but should be more closely following the documentation.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33764>
2025-03-10 17:23:07 -07:00
José Roberto de Souza
a13a6656dd intel: Add function to check if PXP is supported in Xe KMD
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30723>
2025-03-06 16:25:04 +00:00
José Roberto de Souza
e146e573f7 anv: Add support to create protected bo and protected exec_queue in Xe KMD
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30723>
2025-03-06 16:25:03 +00:00
José Roberto de Souza
008ac818ba intel/common: Retry GEM_CONTEXT_CREATE when PXP have not finished initialization
If PXP initialization is not completed and application requested a
protected context the GEM_CONTEXT_CREATE will wait up to 250ms for
PXP to finish initialization but if that do not happens it will
return a error and set errno to EIO.
This patch add the missing retry handling.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30723>
2025-03-06 16:25:03 +00:00
Tapani Pälli
4a41564619 intel/common: fix mi_builder_test issue
Fixes intel_gfx20_mi_builder_test failures on LNL.

Fixes: bb31287d24 ("intel: Initialize upper 32bits of drm_xe_sync.handle")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33366>
2025-02-04 12:57:19 +00:00
José Roberto de Souza
bb31287d24 intel: Initialize upper 32bits of drm_xe_sync.handle
Some compiles don't initialize the upper 32bits of the union that has
u64 addr and u32 handle.
Similar to previous patches but doing that for code in intel/misc.

Cc: stable
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Juston Li <justonli@google.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33172>
2025-02-02 21:34:45 -08:00
Francisco Jerez
67cb23a4b1 intel/common/xe2+: Allow SIMD32 PS for all multisample cases.
These don't seem to be disallowed by recent hardware anymore.  Stop
disabling SIMD32 due to hardware restrictions of multisample
rasterization, since it should have better performance, and on Xe3+
there may be no shader variant available other than SIMD32.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32664>
2025-01-29 23:39:32 +00:00
Alyssa Rosenzweig
164a161279 meson: project-wide fs = import('fs')
reduces a bit of boilerplate.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33242>
2025-01-28 23:01:32 +00:00
Dylan Baker
d9429229cf intel/tests: Fix missing assignment of error condition
Coverity notices that `err` might be used uninitialized, which is true
as we don't assign the value we want to check! Fix that assignment so
the EXPECT_EQ macro does what we expect.

CID: 1635272
Fixes: 6b931a68c7 ("intel/common: Implement Xe KMD in mi_builder tests")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32849>
2025-01-03 00:53:49 +00:00
Dylan Baker
5420fc16d6 intel/tests: Fix coverity warning about possibly leaked memory
If the assert were to fail the memory would leak, which is pretty
harmless in a unit test, but the fix is trivial.

CID: 1635429
Fixes: 6b931a68c7 ("intel/common: Implement Xe KMD in mi_builder tests")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32849>
2025-01-03 00:53:49 +00:00
Caio Oliveira
d918edaf9a intel/common: Enable mi_builder test for PTL
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32194>
2024-11-20 01:47:04 +00:00
Caio Oliveira
6b931a68c7 intel/common: Implement Xe KMD in mi_builder tests
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32194>
2024-11-20 01:47:04 +00:00
Caio Oliveira
3998602d0e intel/common: Prepare mi_builder tests to support Xe KMD
No functional change, just move i915 specific data to a struct
and check for kmd_type where appropriate.  This will make the
next patch (which adds Xe KMD support here) cleaner.

This patch had to make intel_kmd.h header C++ friendly so it
can use its symbols.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32194>
2024-11-20 01:47:04 +00:00