José Roberto de Souza 080b9a165c intel/common: Add function to compute optimal compute engine async thread limits ... Spec has several restrictions to the values we program to compute engine async thread limits. Without those we risk hit deadlocks, so here adding a function to return the optimal value based on those restrictions. Cc: stable Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35563>		2025-06-23 18:57:24 +00:00
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i915	intel/common: Retry GEM_CONTEXT_CREATE when PXP have not finished initialization	2025-03-06 16:25:03 +00:00
tests	intel/common: fix mi_builder_test issue	2025-02-04 12:57:19 +00:00
xe	intel: Add function to check if PXP is supported in Xe KMD	2025-03-06 16:25:04 +00:00
intel_aux_map.c	intel_aux_map: Avoid creating new table pages when removing	2025-06-02 20:10:49 +00:00
intel_aux_map.h	intel/isl: Add and use ISL_MAIN_TO_CCS_SIZE_RATIO_XE	2024-06-06 23:57:52 +00:00
intel_bind_timeline.c
intel_bind_timeline.h
intel_buffer_alloc.h
intel_clflushopt.c
intel_common.c	intel/common: Add function to compute optimal compute engine async thread limits	2025-06-23 18:57:24 +00:00
intel_common.h	intel/common: Add function to compute optimal compute engine async thread limits	2025-06-23 18:57:24 +00:00
intel_compute_slm.c	intel: Compute the optimal preferred SLM size per subslice	2024-05-30 16:46:16 +00:00
intel_compute_slm.h	intel: Compute the optimal preferred SLM size per subslice	2024-05-30 16:46:16 +00:00
intel_debug_identifier.c	intel: Avoid unaligned pointer access	2024-11-14 01:05:02 +00:00
intel_debug_identifier.h
intel_engine.c	intel: Remove INTEL_ENGINE_CLASS_COMPUTE and INTEL_ENGINE_CLASS_COPY parameters	2024-08-13 21:15:31 +00:00
intel_engine.h	intel/common: Implement Xe KMD in mi_builder tests	2024-11-20 01:47:04 +00:00
intel_gem.c	intel: Add function to check if PXP is supported in Xe KMD	2025-03-06 16:25:04 +00:00
intel_gem.h	anv/drirc: add option to provide low latency hint	2024-06-28 21:45:59 +00:00
intel_genX_state_brw.h	intel/common/xe2+: Allow SIMD32 PS for all multisample cases.	2025-01-29 23:39:32 +00:00
intel_genX_state_elk.h
intel_guardband.h
intel_hang_dump.h
intel_l3_config.c	intel/dev: Add Xe3 support to get_l3_list()	2024-10-26 07:39:30 +00:00
intel_l3_config.h
intel_measure.c	intel/measure: increase size of filename malloc to account for \0	2024-11-06 22:12:29 +00:00
intel_measure.h	intel/measure: defer file open until first write	2024-11-04 20:25:14 +00:00
intel_mem.c	intel/clflush: Utilize clflushopt in intel_invalidate_range	2024-07-20 16:10:16 +00:00
intel_mem.h
intel_pixel_hash.h
intel_sample_positions.c
intel_sample_positions.h
intel_tiled_render.h
intel_urb_config.c	intel: Use devinfo->urb.min_entries[GS and TCS] for setting URB configs	2025-03-10 17:23:07 -07:00
intel_uuid.c
intel_uuid.h
meson.build	meson: project-wide fs = import('fs')	2025-01-28 23:01:32 +00:00
mi_builder.h	intel/mi_builder: enable control flow API on Gfx9+	2024-08-06 17:55:19 +00:00