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Author SHA1 Message Date
Marek Olšák
d100c07c48 radeonsi: remove tautologies when setting CU_EN 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Ruijing Dong
74bd5bbf28 radeonsi/vcn: update av1 decoding to support vcn4 
Apply changes of vcn4 on av1 decoding.

Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Ruijing Dong
62bb11a5a5 radeonsi/vcn: Add support of array_mode for gfx11 
Update array_mode for gfx11 in vcn decoder.

Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
James Zhu
88075b7ea1 radeonsi/vcn: add jpeg decode support for gfx11 
Add jpeg decode support for gfx11.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
caa09f66ae amd: add chip identification for gfx1100-1103 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Boyuan Zhang
b00ab763a9 radeonsi/vcn: enable vcn 4.0 encode for gfx11 asic 
Enable VCN 4.0 encode for supported Asics.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Boyuan Zhang
efde05c631 radeonsi/vcn: add session init ib for vcn 4.0 
Implement session init ib based on new interface for VCN 4.0.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Boyuan Zhang
dbd75e0d48 radeonsi/vcn: add encode context ib for vcn 4.0 
Implement encode context ib based on new reconstructed picture and
interface for VCN 4.0, and modify dpb setup accordingly.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Boyuan Zhang
38a95f2109 radeonsi/vcn: add vcn 4.0 encode fw interface version 
Add major and minor encode FW interface version for VCN 4.0.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Boyuan Zhang
ff2b2584fc radeonsi/vcn: add vcn 4.0 encode support 
Add new file "radeon_vcn_enc_4_0.c" for VCN 4.0 encode.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
James Zhu
f9de35a731 radeonsi/vcn: add decode software ring support for gfx11 
Add decode software ring support for gfx11.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
James Zhu
b8a3bafe94 radeonsi/gfx11: update codec support for gfx11 
Update codec support for gfx11.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
James Zhu
69f02164b3 amd: update headers to support decode software ring 
Update headers to support decode software ring.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
2e4e39837a radeonsi/gfx11: add a workaround for CB perf counters 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
e3b4e1fe85 radeonsi: inline si_cp_dma_prefetch in si_draw_vbo for lower overhead 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
1bc6d6c933 radeonsi/gfx11: limit CP DMA to max 32KB sizes 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
3bc754a9a6 radeonsi/gfx11: mark streamout as unimplemented for now 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
66d4bafd5b radeonsi/gfx11: resolve MSAA using u_blitter 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
8bfb4657c8 radeonsi/gfx11: don't count the non-existent scratch_byte_offset SGPR 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
c65a303f53 radeonsi/gfx11: change LDS allocation granularity for PS 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
c749b6f6ae radeonsi/gfx11: update the initialization of SGPR0/1 registers for HS and GS 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
54d85700a1 radeonsi/gfx11: limit MSAA color buffers to the RGBA channel order 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Yogesh mohan marimuthu
6531ec8922 ac,radeonsi/gfx11: swizzle MRT0/1 for dual source blending 
If dual source blending is enabled, use export targets 21 and 22.
Also we have to swap odd/even lanes between export target 21 and 22.

Signed-off-by: Yogesh Mohan Marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Yogesh Mohan Marimuthu
12a606c1bd radeonsi/gfx11: export alpha through mrtz for alpha-to-coverage if mrtz is there 
If both mrtz and alpha-to-coverage are enabled, the alpha channel must
be exported through mrtz.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Indrajit Kumar Das
167b378377 radeonsi/gfx11: VRS changes 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
6d0e50f226 radeonsi/gfx11: TF_RING_SIZE changed to a per-SE size 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
ce950f1d96 radeonsi/gfx11: don't use FLUSH_AND_INV_DB_META 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
c33a930cea radeonsi/gfx11: emit SQ_NON_EVENT for tessellation at the end of IBs 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
b27b9b0c31 radeonsi/gfx11: don't set non-existent CP_COHER_START_DELAY 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Yogesh mohan marimuthu
19a59f05a4 radeonsi/gfx11: program db render control register 
Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
9fecac091f radeonsi/gfx11: scattered register deltas 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
afc110a1f6 radeonsi/gfx11: implement attributes through memory 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
91a7f43f0b radeonsi/gfx11: don't set COMPR for exports, use 0x3 channel mask instead 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Yogesh Mohanmarimuthu
6e537680c4 radeonsi/gfx11: use PIXEL_PIPE_STATE_DUMP event instead of ZPASS_DONE 
Use PIXEL_PIPE_STATE_CONTROL/DUMP event instead of ZPASS_DONE for gfx11.

Signed-off-by: Yogesh Mohanmarimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:55 +00:00
Marek Olšák
2a1c22e0cd radeonsi/gfx11: don't set non-existent SPI_SHADER_USER_DATA_VS_x 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák
61291aff1f ac,radeonsi/gfx11: set SWIZZLE_ENABLE correctly 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák
a90ff631a5 ac,radeonsi/gfx11: remove FMASK loads 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák
529eb739fc radeonsi/gfx11: add CB deltas 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák
c99b71039a radeonsi/gfx11: buffer descriptor changes 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Pierre-Eric Pelloux-Prayer
c87da5c80d radeonsi/gfx11: image descriptor changes 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Pierre-Eric Pelloux-Prayer
25a66477d0 radeonsi/gfx11: register changes 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Pierre-Eric Pelloux-Prayer
3bdb3db5fa radeonsi/gfx11: add assert in legacy vs path 
Only ngg should be used.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Yogesh mohan marimuthu
1005a2a25f radeonsi/gfx11: program inst_pref_size for compute 
For gfx11, program INST_PREF_SIZE value in SPI registers.

v2: move INST_PREF_SIZE reg programming (Marek Olšák)

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák
980620ae07 radeonsi/gfx11: program inst_pref_size for graphics 
For gfx11, program INST_PREF_SIZE value in SPI registers.

v4: fix mask value, code indendation (Marek Olšák)
v3: improve code for readability (Indrajit Das, Marek Olšák)
v2: ngg is always enabled in gfx11 (Marek Olšák)

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Yogesh mohan marimuthu
58a483341d radeonsi/gfx11: instruction cache line size is 128 bytes 
In gfx11, instruction cache line size is 128 bytes. This patch makes
the neccessary code changes.

v2: instruction store line size is 64 bytes (Marek Olšák)

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Yogesh mohan marimuthu
b07204d780 radeonsi/gfx11: interp changes for 16bit 
make interp 16bit changes for gfx11

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Yogesh mohan marimuthu
0a54fbb5b4 radeonsi/gfx11: interp changes for 32bit 
make interp 32bit changes for gfx11

v2: fix coding indentation issue (Pierre-Eric)

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Yogesh mohan marimuthu
3b0bfd254f radeonsi/gfx11: make flat_scratch changes for compute 
make flat_scratch gen11 changes for compute

v5: optimize the code for size (Pierre-Eric)
v4: remove type cast from 64bit to 32bit (Marek Olšák)
    use radeon_set_sh_reg_seq (Marek Olšák)
    combine RSRC and scratch reg write packets (Marek Olšák)
v3: fix coding guidelines (Marek Olšák)
v2: do not skip si_resource_reference() call (Marek Olšák)

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Yogesh mohan marimuthu
02367b29c7 radeonsi/gfx11: make flat_scratch changes for graphics 
gfx11 passes scratch base address using
SPI_GFX_SCRATCH_BASE_LO and _HI registers. Make the
code changes to support the same.

v5: remove type cast from 64bit to 32bit (Marek Olšák)
v4: combine scratch_memory and scratch_state atom (Marek Olšák)
v3: skip shader relocs for gfx11
v2: make atom for scratch_memory (Indrajit)

Signed-off-by: Yogesh mohan marimuthu <yogesh.mohanmarimuthu@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00
Marek Olšák
27104ff647 radeonsi/gfx11: use the new TCS WaveID SGPR to compute vs_rel_patch_id 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16328>
 2022-05-10 04:29:54 +00:00