Commit graph

9469 commits

Author SHA1 Message Date
Samuel Pitoiset
9f8684359f radv: implement VK_EXT_device_generated_commands
The major differences compared to the NV extensions are:
- support for the sequence index as push constants
- support for draw with count tokens (note that DrawID is zero for
  normal draws)
- support for raytracing
- support for IES (only compute is supported for now)
- improved preprocessing support with the state command buffer param

The NV DGC extensions were only enabled for vkd3d-proton and it will
maintain both paths for a while, so they can be replaced by the EXT.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31383>
2024-10-28 16:27:35 +00:00
Semenov Herman (Семенов Герман)
637a4b849a radv: fix memleaks in radv_sqtt_reloc_graphics_shaders()
Co-authored-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31607>
2024-10-28 15:48:05 +01:00
Samuel Pitoiset
0ae880c08c Revert "radv: implement 2D views of 3D images using 2D_ARRAY descriptors on GFX9+"
Using view3dAs2dArray changes the tiling and it's slower (-7.5% in
Silent Hill 2 Remake) than using 3D tiling. The previous implementation
was the best one regarding performance (it's also what RadeonSI does).

Sadly it seems that sampler2DViewOf3D can't really be supported without
that but nobody really needs it apparently.

Also view3dAs2array is incompatible for 2D views of sparse 3D images
because sparse 3D images requires 3D tiling.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11997

This reverts commit f5805bcb8e.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31869>
2024-10-28 12:47:38 +00:00
Samuel Pitoiset
742a1097a9 Revert "radv: advertise sampler2DViewOf3D"
This feature has never been exposed in stable releases, so I think it's
fine to disable it.

This reverts commit 493d5910a3.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31869>
2024-10-28 12:47:38 +00:00
Samuel Pitoiset
b3a06daa72 radv: simplify determining if dual-source blending is enabled
If blending is disabled or the color write mask is 0, dual-source
blending would be ignored, and this can be simplified a bit.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31681>
2024-10-28 12:04:59 +00:00
Samuel Pitoiset
dc5efa892f radv: remove useless check about gl_Position as PS inputs for NGGC
gl_Position isn't part of the PS inputs read mask.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31830>
2024-10-28 11:03:47 +00:00
Samuel Pitoiset
8e4d1965bd radv: fix considering NGG culling for depth-only rendering
When the FS is unknown, this can happen with fast-link GPL or unlinked
ESO, rely on the number of VS/TES outputs which should be a good
approximation of the number of PS inputs.

This fixes a (huge?) performance regression from May 2023 because
for depth-only rendering, the FS is NULL and NGG culling wasn't
considered at all.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31830>
2024-10-28 11:03:47 +00:00
Samuel Pitoiset
72871d8330 radv: set missing FMASK surface counters for MSAA MRTs
This has been removed few years ago by mistake but it's important for
performance. This is mostly for addrlib to determine tile_swizzle which
is used to make memory access faster with multiple render targets.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31797>
2024-10-28 08:21:12 +01:00
Joshua Ashton
c66fd95d92 radv: Fix sample locations at 0 for X/Y
We cannot set the {X,Y}MAX_RIGHT_EXCLUSION bits
if we have a sample location at a pixel boundary.

CTS does not seem to be catching this.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Co-authored-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31839>
2024-10-25 11:24:12 +00:00
Joshua Ashton
130a423118 radv: Enable variableSampleLocations
This should come for free now we are dynamic
rendering based.

This passes CTS on RX 7900XTX.

Signed-off-by: Joshua Ashton <joshua@froggi.es>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31839>
2024-10-25 11:24:12 +00:00
Samuel Pitoiset
927a17f30a amd: do not emit PA_SU_PRIM_FILTER_CNTL in the common GFX preamble
RADV needs to adjust this register for user sample locations because
it seems possible to have a sample on the -8 coordinate.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31815>
2024-10-25 07:41:22 +00:00
Samuel Pitoiset
3d172d08b0 radv: do no emit PA_SC_CONSERVATIVE_RASTERIZATION_CNTL in the preamble on GFX12
It's already emitted as part of the cmdbuf.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31815>
2024-10-25 07:41:22 +00:00
Samuel Pitoiset
56cffd4b9b radv: simplify determining if a graphics pipeline uses NGG culling
has_ngg_culling can only be TRUE if the last VGT shader also uses NGG.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31829>
2024-10-25 07:10:28 +00:00
Samuel Pitoiset
62efebfd70 radv: fix emitting NGG culling state for ESO
It's possible to enable NGG culling with ESO if shaders are linked, or
if the VS doesn't need a prolog or if TES is used. This wasn't
supposed to be enabled but I think it worked just by luck because the
user SGPR value was probably zero and NGGC was disabled at draw time.

Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31829>
2024-10-25 07:10:27 +00:00
Samuel Pitoiset
982af1a2bc radv: capture shader statistics when RGP is enabled
This is useful in order to correlate shader hashes between RGP and
Fossilize. This is because Fossilize needs to pass the capture
statistics flag for getting shader hashes and the pipeline key won't
match otherwise.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31820>
2024-10-25 06:29:02 +00:00
Georg Lehmann
54fa55a3f7 radv: don't use v_mqsad_u32_u8 on gfx7
According to tests on hawaii, v_mqsad_u32_u8 always uses saturating accumulation
while v_msad_u8 truncates. GFX8+ can control this with the VOP3 clamp bit,
on older hardware that's not supported.

We want truncation for the NIR opcode.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12062
Fixes: c3c138b10f ("radv: optimize msad_4x8 to mqsad_4x8")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31809>
2024-10-24 17:20:56 +00:00
Rhys Perry
d312220c2d aco,radv,radeonsi: add aco_shader_info::ps::has_prolog
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30478>
2024-10-24 16:08:07 +00:00
Samuel Pitoiset
605d4dd42a radv: do not use MRT counters for images created for db capture&replay
Setting the surface index is optimal for performance in case of
multiple MRTs because addrlib rotates tiles differently.

But this should be disabled when the image is used for descriptor
buffers capture&replay because the descriptor isn't immutable
(ie. tile_swizzle can be different).

This fixes dEQP-VK.binding_model.descriptor_buffer.capture_replay.*
on some GPUs where tile_swizzle is non-zero.

Fixes: 3b57a35ece ("radv: Enable descriptorBufferCaptureReplay.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31818>
2024-10-24 13:53:20 +00:00
Daniel Schürmann
87cb42f953 treewide: don't lower to LCSSA before calling nir_divergence_analysis()
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
2024-10-24 10:06:17 +00:00
Daniel Schürmann
421b42637d nir: remove nir_update_instr_divergence()
This function has obscure limitations.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30787>
2024-10-24 10:06:17 +00:00
Samuel Pitoiset
be81c8b8db radv: fix initializing the HTILE buffer on transfer queue
When only of the depth/stencil aspects is used, RADV dispatches a
compute shader to initialize the HTILE buffer. But dispatching on SDMA
just hangs and the only way to initialize the HTILE buffer is to clear
both aspects using a memory fill operation.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31803>
2024-10-24 06:25:18 +00:00
Samuel Pitoiset
3a5d40b152 radv: fix enabling/disabling user sample locations
When user sample locations are disabled dynamically, the driver should
re-emit the standard sample locations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31786>
2024-10-23 06:28:20 +00:00
Samuel Pitoiset
b33f47b498 radv: regroup and emit all DS related states in the same function
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31662>
2024-10-22 11:52:10 +00:00
Samuel Pitoiset
8791e56b62 radv: track more redundant DB related registers
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31662>
2024-10-22 11:52:10 +00:00
Rhys Perry
8221367fba radv: use explicitly sized types for some radv_shader_info members
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31593>
2024-10-21 15:52:53 +00:00
Rhys Perry
4383a917e6 radv: optimize VS input load components to constants earlier
This helps some linking optimizations.

fossil-db (navi21):
Totals from 2262 (2.85% of 79395) affected shaders:
MaxWaves: 57680 -> 57738 (+0.10%); split: +0.11%, -0.01%
Instrs: 1061526 -> 1053937 (-0.71%); split: -0.79%, +0.07%
CodeSize: 5766352 -> 5736784 (-0.51%); split: -0.60%, +0.08%
VGPRs: 89376 -> 89000 (-0.42%); split: -0.43%, +0.01%
Latency: 4102938 -> 4059773 (-1.05%); split: -1.14%, +0.08%
InvThroughput: 1105885 -> 1092291 (-1.23%); split: -1.24%, +0.01%
VClause: 18917 -> 18972 (+0.29%); split: -0.12%, +0.41%
SClause: 28839 -> 28115 (-2.51%); split: -3.32%, +0.81%
Copies: 73396 -> 72671 (-0.99%); split: -1.63%, +0.65%
PreSGPRs: 65866 -> 65838 (-0.04%); split: -0.22%, +0.17%
PreVGPRs: 69752 -> 69278 (-0.68%)
VALU: 680351 -> 673489 (-1.01%); split: -1.03%, +0.02%
SALU: 121459 -> 121515 (+0.05%); split: -0.00%, +0.05%
VMEM: 29632 -> 30021 (+1.31%); split: -0.02%, +1.33%
SMEM: 73744 -> 73836 (+0.12%); split: -0.01%, +0.14%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31593>
2024-10-21 15:52:53 +00:00
Rhys Perry
9784165de5 radv: fix output statistic for fragment shaders
This is a per-component bit mask (0xf for each output).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 0e0c2574d1 ("radv: Add shader stats for inputs and outputs.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31593>
2024-10-21 15:52:52 +00:00
Samuel Pitoiset
0f2363993d radv: fix emitting DB_RENDER_OVERRIDE on GFX12
This register is already set in the GFX12 preamble and it shouldn't
be overwritten.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31690>
2024-10-18 00:28:02 +00:00
Samuel Pitoiset
daefd280e2 radv do not force-disable hierarchical stencil testing
Looks like this was disabled by mistake. RadeonSI relies on the default
value which is "no force" and PAL only sets this to FORCE_DISABLE when
HTILE is completely disabled using settings.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31690>
2024-10-18 00:28:01 +00:00
Georg Lehmann
dbf63a0788 nir: remove nir_op_is_derivative
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31014>
2024-10-17 09:50:19 +00:00
Samuel Pitoiset
17dc91709d radv: use radv_normalize_blend_factor() more
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31688>
2024-10-16 18:24:22 +00:00
Samuel Pitoiset
38e12dd53c radv: optimize breaking batch when CB_TARGET_MASK change
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31688>
2024-10-16 18:24:22 +00:00
Samuel Pitoiset
fc52c6358c radv: stop recomputing the viewport xform for guarband/viewport
It's already computed when viewports are bound.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31680>
2024-10-16 16:10:12 +00:00
Konstantin Seurer
0098f8ef35 radv: Remap 10 and 12 bit formats to 16 bit formats
Preserves the previous behavior while handling the new formats.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30821>
2024-10-16 14:30:15 +00:00
Georg Lehmann
40c4ec881d radv: call nir_opt_remove_phis in radv_optimize_nir_algebraic
Foz-DB Navi31:
Totals from 3048 (3.84% of 79395) affected shaders:
Instrs: 603535 -> 599281 (-0.70%); split: -0.74%, +0.03%
CodeSize: 3074416 -> 3056236 (-0.59%); split: -0.60%, +0.01%
Latency: 2851382 -> 2849808 (-0.06%); split: -0.07%, +0.01%
InvThroughput: 294247 -> 294201 (-0.02%); split: -0.02%, +0.01%
SClause: 18077 -> 18083 (+0.03%); split: -0.03%, +0.07%
Copies: 63860 -> 59926 (-6.16%); split: -6.33%, +0.17%
Branches: 15901 -> 15899 (-0.01%)
PreSGPRs: 62441 -> 61353 (-1.74%)
VALU: 291049 -> 291035 (-0.00%); split: -0.01%, +0.00%
SALU: 96786 -> 92606 (-4.32%); split: -4.42%, +0.10%

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31360>
2024-10-15 10:01:43 +00:00
Samuel Pitoiset
03b4477c8f radv: fix returning non-zero captured address without binding
The Vulkan spec says:
    "If the buffer was created with a non-zero value of
    VkBufferOpaqueCaptureAddressCreateInfo::opaqueCaptureAddress or
    VkBufferDeviceAddressCreateInfoEXT::deviceAddress, the return
    value will be the same address that was returned at capture time."

My interpretation is that you can get the buffer device address before
binding if you passed a non-zero address during buffer creation. The
returned BDA would be similar if a memory object is bound to the
buffer later.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31145>
2024-10-14 07:37:00 +00:00
Bas Nieuwenhuizen
c8c354d9c3 radv: Disable EXT BDA capture and replay.
Spec allows calling VkBufferGetDeviceAddressInfo without binding to memory:

VUID-VkBufferDeviceAddressInfo-buffer-02600
If buffer is non-sparse and was not created with the VK_BUFFER_CREATE_DEVICE_ADDRESS_CAPTURE_REPLAY_BIT flag, then it must be bound completely and contiguously to a single VkDeviceMemory object

Which  we can only do by making it sparse unconditionally, which feels very wrong to me for a capture & replay extension as that significantly impacts execution.

Current theory is that this was only intended for the EXT and not the core functionality. As such, let's disable capture using the EXT.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31140>
2024-10-11 22:17:33 +00:00
Konstantin Seurer
d975d23cd8 radv/meta: Do not pass NULL to vk_texcompress_astc_finish
The pointer can be NULL if initialization fails.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11953
Fixes: f97b449 ("radv: integrate meta astc compute decoder to radv")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31505>
2024-10-11 20:56:21 +00:00
Samuel Pitoiset
583b93f7a2 radv: rename 'gfx' to 'main' in the DGC path
It can be confusing because the main DGC IB can be executed either on
GFX or ACE compute queues.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31583>
2024-10-10 15:52:51 +00:00
Samuel Pitoiset
2643c48700 radv/amdgpu: remove unused code about external IBs in the submit path
Now that everything is chained, the driver no longer uses external IBs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30809>
2024-10-10 14:08:39 +00:00
Samuel Pitoiset
d686ba36a9 radv/amdgpu: simplify cs_execute_ib()
It's only used for executing IB2 on GFX.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30809>
2024-10-10 14:08:39 +00:00
Samuel Pitoiset
c1b2cb6ef7 radv: implement IB chaining for DGC when it's executed on compute
The IB2 packet is only supported on the graphics queue. To execute DGC
IB on compute, the previous solution was to submit it separately
without any chaining. Though this solution was incomplete because it's
easy to reach the maximum number of IBs per submit when there is a lot
of ExecuteIndirect() calls.

To fix that, the proposed solution is to implement DGC IB chaining when
it's executed on the compute only. The idea is to add a trailer that is
added at the beginning of the DGC IB (to know the offset). This trailer
is used to chain back back the DGC IB to a normal CS, it's patched at
execution time. Patching is fine because it's not allowed to execute
the same DGC IB concurrently and the entire solution relies on that.

When the DGC IB is executed on graphics, the trailer isn't patched and
it only contains NOPs padding. Performance should be mostly similar.

This fixes
dEQP-VK.dgc.nv.compute.misc.execute_many_*_primary_cmd_compute_queue.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30809>
2024-10-10 14:08:39 +00:00
Samuel Pitoiset
303a456aa5 radv: add PKT3_INDIRECT_BUFFER_BYTES in the DGC path
To avoid using a magic number.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30809>
2024-10-10 14:08:39 +00:00
Samuel Pitoiset
056b638588 radv: add a helper to bind the color output state
Instead of duplicating almost the same code chunk in three different
locations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31566>
2024-10-10 13:19:22 +00:00
Samuel Pitoiset
39745dd7cf radv: move radv_compact_spi_shader_col_format() to radv_cmd_buffer.c
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31566>
2024-10-10 13:19:22 +00:00
Samuel Pitoiset
1641db461f radv: fix generating the global key for pipeline binaries
The global key wasn't considering GPU family, Git revision etc and it
was mostly invariant.

Fixes: be06bfcbed ("radv: add initial support for pipeline binaries")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11995
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31576>
2024-10-09 21:15:48 +00:00
Samuel Pitoiset
336f80137d radv: fix conditional rendering with DGC preprocessing on compute
Preprocess now must use the same conditional rendering state as the
execute, so the DGC prepare shader must reset the number of sequences
to generate an empty cmdbuf for compute.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31563>
2024-10-08 12:35:16 -04:00
Samuel Pitoiset
1cbc316999 radv: remove RADV_THREAD_TRACE_TRIGGER completely
SteamOS switched to VK_MESA_TRACE_TRIGGER since a while.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31539>
2024-10-07 11:42:38 +00:00
Samuel Pitoiset
2e66ab265d radv: squash radv_get_memory_fd() with radv_GetMemoryFdKHR()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31539>
2024-10-07 11:42:37 +00:00
Samuel Pitoiset
78666f1caf radv: remove RADV_MAX_DRM_DEVICES
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31539>
2024-10-07 11:42:37 +00:00