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radv: optimize breaking batch when CB_TARGET_MASK change

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31688>
This commit is contained in:
Samuel Pitoiset 2024-10-14 18:53:09 +02:00 • committed by Marge Bot
parent f406595ec7
commit 38e12dd53c
2 changed files with 10 additions and 3 deletions
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11
src/amd/vulkan/radv_cmd_buffer.c
View file

@ -3634,16 +3634,21 @@ radv_emit_color_write(struct radv_cmd_buffer *cmd_buffer)
color_write_mask |= d->vk.cb.attachments[i].write_mask << (4 * i);
}
if (device->pbb_allowed && settings->context_states_per_bin > 1) {
const uint32_t cb_target_mask = color_write_enable & color_write_mask;
if (device->pbb_allowed && settings->context_states_per_bin > 1 &&
cmd_buffer->state.last_cb_target_mask != cb_target_mask) {
/* Flush DFSM on CB_TARGET_MASK changes. */
radeon_emit(cmd_buffer->cs, PKT3(PKT3_EVENT_WRITE, 0, 0));
radeon_emit(cmd_buffer->cs, EVENT_TYPE(V_028A90_BREAK_BATCH) | EVENT_INDEX(0));
cmd_buffer->state.last_cb_target_mask = cb_target_mask;
}
if (pdev->info.gfx_level >= GFX12) {
radeon_set_context_reg(cmd_buffer->cs, R_028850_CB_TARGET_MASK, color_write_mask & color_write_enable);
radeon_set_context_reg(cmd_buffer->cs, R_028850_CB_TARGET_MASK, cb_target_mask);
} else {
radeon_set_context_reg(cmd_buffer->cs, R_028238_CB_TARGET_MASK, color_write_mask & color_write_enable);
radeon_set_context_reg(cmd_buffer->cs, R_028238_CB_TARGET_MASK, cb_target_mask);
}
}

2
src/amd/vulkan/radv_cmd_buffer.h
View file

@ -442,6 +442,8 @@ struct radv_cmd_state {
unsigned custom_blend_mode;
unsigned db_render_control;
unsigned last_cb_target_mask;
unsigned rast_prim;
uint32_t vtx_base_sgpr;