Revert "radv: implement 2D views of 3D images using 2D_ARRAY descriptors on GFX9+"

Using view3dAs2dArray changes the tiling and it's slower (-7.5% in
Silent Hill 2 Remake) than using 3D tiling. The previous implementation
was the best one regarding performance (it's also what RadeonSI does).

Sadly it seems that sampler2DViewOf3D can't really be supported without
that but nobody really needs it apparently.

Also view3dAs2array is incompatible for 2D views of sparse 3D images
because sparse 3D images requires 3D tiling.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11997

This reverts commit f5805bcb8e.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31869>
This commit is contained in:
Samuel Pitoiset 2024-10-28 11:38:29 +01:00 committed by Marge Bot
parent 742a1097a9
commit 0ae880c08c
6 changed files with 29 additions and 14 deletions

View file

@ -24,7 +24,8 @@ static inline void radv_aco_convert_ps_epilog_key(struct aco_ps_epilog_info *aco
static inline void
radv_aco_convert_shader_info(struct aco_shader_info *aco_info, const struct radv_shader_info *radv,
const struct radv_shader_args *radv_args, const enum amd_gfx_level gfx_level)
const struct radv_shader_args *radv_args, const struct radv_device_cache_key *radv_key,
const enum amd_gfx_level gfx_level)
{
ASSIGN_FIELD(wave_size);
ASSIGN_FIELD(has_ngg_culling);
@ -43,7 +44,7 @@ radv_aco_convert_shader_info(struct aco_shader_info *aco_info, const struct radv
aco_info->ps.has_prolog = false;
aco_info->gfx9_gs_ring_lds_size = radv->gs_ring_info.lds_size;
aco_info->is_trap_handler_shader = radv->type == RADV_SHADER_TYPE_TRAP_HANDLER;
aco_info->image_2d_view_of_3d = false;
aco_info->image_2d_view_of_3d = radv_key->image_2d_view_of_3d;
aco_info->epilog_pc = radv_args->epilog_pc;
aco_info->hw_stage = radv_select_hw_stage(radv, gfx_level);
aco_info->tcs.tcs_offchip_layout = radv_args->tcs_offchip_layout;

View file

@ -847,9 +847,11 @@ capture_trace(VkQueue _queue)
static void
radv_device_init_cache_key(struct radv_device *device)
{
const struct radv_physical_device *pdev = radv_device_physical(device);
struct radv_device_cache_key *key = &device->cache_key;
key->disable_trunc_coord = device->disable_trunc_coord;
key->image_2d_view_of_3d = device->vk.enabled_features.image2DViewOf3D && pdev->info.gfx_level == GFX9;
key->mesh_shader_queries = device->vk.enabled_features.meshShaderQueries;
key->primitives_generated_query = radv_uses_primitives_generated_query(device);
@ -862,6 +864,7 @@ radv_device_init_cache_key(struct radv_device *device)
* enabled, regardless of what features are actually enabled on the logical device.
*/
if (device->vk.enabled_features.shaderObject) {
key->image_2d_view_of_3d = pdev->info.gfx_level == GFX9;
key->primitives_generated_query = true;
}

View file

@ -54,6 +54,7 @@ struct radv_layer_dispatch_tables {
struct radv_device_cache_key {
uint32_t disable_trunc_coord : 1;
uint32_t image_2d_view_of_3d : 1;
uint32_t mesh_shader_queries : 1;
uint32_t primitives_generated_query : 1;
};

View file

@ -640,9 +640,6 @@ radv_get_surface_flags(struct radv_device *device, struct radv_image *image, uns
unreachable("unhandled image type");
}
if (image->vk.create_flags & (VK_IMAGE_CREATE_2D_ARRAY_COMPATIBLE_BIT | VK_IMAGE_CREATE_2D_VIEW_COMPATIBLE_BIT_EXT))
flags |= RADEON_SURF_VIEW_3D_AS_2D_ARRAY;
/* Required for clearing/initializing a specific layer on GFX8. */
flags |= RADEON_SURF_CONTIGUOUS_DCC_LAYERS;

View file

@ -121,8 +121,13 @@ gfx10_make_texture_descriptor(struct radv_device *device, struct radv_image *ima
radv_compose_swizzle(desc, mapping, swizzle);
type = radv_tex_dim(image->vk.image_type, view_type, image->vk.array_layers, image->vk.samples, is_storage_image,
pdev->info.gfx_level == GFX9);
if (create_2d_view_of_3d) {
assert(image->vk.image_type == VK_IMAGE_TYPE_3D);
type = V_008F1C_SQ_RSRC_IMG_3D;
} else {
type = radv_tex_dim(image->vk.image_type, view_type, image->vk.array_layers, image->vk.samples, is_storage_image,
pdev->info.gfx_level == GFX9);
}
if (type == V_008F1C_SQ_RSRC_IMG_1D_ARRAY) {
height = 1;
@ -134,8 +139,9 @@ gfx10_make_texture_descriptor(struct radv_device *device, struct radv_image *ima
depth = image->vk.array_layers / 6;
if (create_2d_view_of_3d) {
assert(image->vk.image_type == VK_IMAGE_TYPE_3D && type == V_008F1C_SQ_RSRC_IMG_2D_ARRAY);
assert(type == V_008F1C_SQ_RSRC_IMG_3D);
depth = !is_storage_image ? depth : u_minify(depth, first_level);
array_pitch = is_storage_image;
} else if (sliced_3d) {
assert(type == V_008F1C_SQ_RSRC_IMG_3D && is_storage_image);
@ -225,6 +231,8 @@ gfx6_make_texture_descriptor(struct radv_device *device, struct radv_image *imag
const struct radv_physical_device *pdev = radv_device_physical(device);
const struct radv_instance *instance = radv_physical_device_instance(pdev);
enum pipe_format format = radv_format_to_pipe_format(vk_format);
const bool create_2d_view_of_3d =
(image->vk.create_flags & VK_IMAGE_CREATE_2D_VIEW_COMPATIBLE_BIT_EXT) && view_type == VK_IMAGE_VIEW_TYPE_2D;
const struct util_format_description *desc;
enum pipe_swizzle swizzle[4];
unsigned type;
@ -242,8 +250,13 @@ gfx6_make_texture_descriptor(struct radv_device *device, struct radv_image *imag
radv_compose_swizzle(desc, mapping, swizzle);
type = radv_tex_dim(image->vk.image_type, view_type, image->vk.array_layers, image->vk.samples, is_storage_image,
pdev->info.gfx_level == GFX9);
if (pdev->info.gfx_level == GFX9 && create_2d_view_of_3d) {
assert(image->vk.image_type == VK_IMAGE_TYPE_3D);
type = V_008F1C_SQ_RSRC_IMG_3D;
} else {
type = radv_tex_dim(image->vk.image_type, view_type, image->vk.array_layers, image->vk.samples, is_storage_image,
pdev->info.gfx_level == GFX9);
}
if (type == V_008F1C_SQ_RSRC_IMG_1D_ARRAY) {
height = 1;

View file

@ -2975,7 +2975,7 @@ shader_compile(struct radv_device *device, struct nir_shader *const *shaders, in
struct aco_shader_info ac_info;
struct aco_compiler_options ac_opts;
radv_aco_convert_opts(&ac_opts, options, args, stage_key);
radv_aco_convert_shader_info(&ac_info, info, args, options->info->gfx_level);
radv_aco_convert_shader_info(&ac_info, info, args, &device->cache_key, options->info->gfx_level);
aco_compile_shader(&ac_opts, &ac_info, shader_count, shaders, &args->ac, &radv_aco_build_shader_binary,
(void **)&binary);
}
@ -3117,7 +3117,7 @@ radv_create_rt_prolog(struct radv_device *device)
struct radv_shader_stage_key stage_key = {0};
struct aco_shader_info ac_info;
struct aco_compiler_options ac_opts;
radv_aco_convert_shader_info(&ac_info, &info, &in_args, options.info->gfx_level);
radv_aco_convert_shader_info(&ac_info, &info, &in_args, &device->cache_key, options.info->gfx_level);
radv_aco_convert_opts(&ac_opts, &options, &in_args, &stage_key);
aco_compile_rt_prolog(&ac_opts, &ac_info, &in_args.ac, &out_args.ac, &radv_aco_build_shader_binary,
(void **)&binary);
@ -3183,7 +3183,7 @@ radv_create_vs_prolog(struct radv_device *device, const struct radv_vs_prolog_ke
struct aco_shader_info ac_info;
struct aco_vs_prolog_info ac_prolog_info;
struct aco_compiler_options ac_opts;
radv_aco_convert_shader_info(&ac_info, &info, &args, options.info->gfx_level);
radv_aco_convert_shader_info(&ac_info, &info, &args, &device->cache_key, options.info->gfx_level);
radv_aco_convert_opts(&ac_opts, &options, &args, &stage_key);
radv_aco_convert_vs_prolog_key(&ac_prolog_info, key, &args);
aco_compile_vs_prolog(&ac_opts, &ac_info, &ac_prolog_info, &args.ac, &radv_aco_build_shader_part, (void **)&binary);
@ -3238,7 +3238,7 @@ radv_create_ps_epilog(struct radv_device *device, const struct radv_ps_epilog_ke
struct aco_shader_info ac_info;
struct aco_ps_epilog_info ac_epilog_info = {0};
struct aco_compiler_options ac_opts;
radv_aco_convert_shader_info(&ac_info, &info, &args, options.info->gfx_level);
radv_aco_convert_shader_info(&ac_info, &info, &args, &device->cache_key, options.info->gfx_level);
radv_aco_convert_opts(&ac_opts, &options, &args, &stage_key);
radv_aco_convert_ps_epilog_key(&ac_epilog_info, key, &args);
aco_compile_ps_epilog(&ac_opts, &ac_info, &ac_epilog_info, &args.ac, &radv_aco_build_shader_part, (void **)&binary);