Commit graph

24890 commits

Author SHA1 Message Date
Jakob Bornecrantz
6160c8be57 softpipe: Also defere primary textures to backend 2009-08-05 19:29:29 +01:00
Dave Airlie
ac3de85eb6 r200: emit colorpitch 2009-08-05 11:26:29 +10:00
Eric Anholt
63d7a2f53f i965: Fix dangerous warning I let slip in. 2009-08-04 18:07:01 -07:00
Eric Anholt
78c022acd0 i965: Respect CondSwizzle in OPCODE_IF.
Fixes piglit glsl-vs-if-bool and progs/glsl/twoside, and will likely be
useful for the looping code.

Bug #18992
2009-08-04 18:06:34 -07:00
Eric Anholt
7007f8b352 i965: Emit conditional code updates as required for GLSL VS if statements.
Previously, we'd be branching based on whatever condition code happened to be
laying around.
2009-08-04 18:06:34 -07:00
Eric Anholt
011244853b i965: Don't set pop_count in the reserved MBZ area of IF statements. 2009-08-04 18:06:34 -07:00
Eric Anholt
8288ab4518 i965: Print out ELSE and ENDIF src1 arguments like IF does. 2009-08-04 18:06:34 -07:00
Roland Scheidegger
8b9a5cfce0 r200: fix off-by-one errors causing 6th texture unit to not work
both for normal and cube textures, this fixes demos/multiarb
(with 6 enabled texture units) and fixes #23142.
2009-08-05 02:33:34 +02:00
Roland Scheidegger
7c0fb3a1be r200: fix compiler warning (unused var) 2009-08-05 02:33:34 +02:00
Roland Scheidegger
15f5f839b1 radeon: fix miptree comparison breakage
another case of image never matching miptree in case of compressed textures
2009-08-05 01:13:22 +02:00
Roland Scheidegger
80cab49481 intel: implement intelCompressedTexSubImage2D
similar to the radeon code.
passes tests/texcompsub
2009-08-05 01:13:22 +02:00
Roland Scheidegger
0abc9e7565 tests: also test xoffset in texcompsub test
use glCompressedTexSubImage2DARB also with xoffset by splitting into 3 calls
in total. Dunno if the top/bottom reversal is intentional but leave as is.
2009-08-05 01:13:21 +02:00
Eric Anholt
de80eeea0e intel: Add support for EXT_provoking_vertex. 2009-08-04 15:32:18 -07:00
Eric Anholt
b010814e9c i965: Spell "conditional" correctly. 2009-08-04 15:32:18 -07:00
Eric Anholt
1d4bace9fc i965: Hook up the disassembler for INTEL_DEBUG={wm,vs}.
I was getting tired of doing the dance of INTEL_DEBUG=batch, copying it out,
and running intel-gen4disasm on it.
2009-08-04 15:32:18 -07:00
Eric Anholt
ce63e9929c i965: Initial import of disasm code from intel-gen4asm.
There's a bunch of stuff from gen4asm and gpu-tools that we probably want
to make into a library instead of cargo-culting it around.
2009-08-04 15:32:18 -07:00
Eric Anholt
def85826a0 i965: warning fix 2009-08-04 15:32:17 -07:00
Brian Paul
cd7a8225e8 tests/getteximage: test more texture sizes, including npot 2009-08-04 16:17:09 -06:00
Brian Paul
a746ef28df mesa: log the shader checksum 2009-08-04 15:36:29 -06:00
Brian Paul
f7783badb5 mesa: compute, print shader checksum 2009-08-04 15:36:29 -06:00
Brian Paul
b501263bf5 mesa: added gl_shader::SourceChecksum field (for debug purposes) 2009-08-04 15:36:28 -06:00
Brian Paul
9f8110adcc mesa: added _mesa_str_checksum() 2009-08-04 15:36:28 -06:00
Brian Paul
84c8315ae6 mesa: clean-up error debug/count code 2009-08-04 15:36:28 -06:00
Brian Paul
def77160d6 mesa: reset ErrorDebugCount to zero in glGetString() 2009-08-04 15:36:28 -06:00
Brian Paul
b98f0f2d51 mesa: better texture dump/debug code 2009-08-04 15:36:28 -06:00
Brian Paul
2b82bc93e2 mesa: more error message info for vertex pointer functions 2009-08-04 15:36:28 -06:00
Brian Paul
2465c4fa9c mesa: more glGetTexImage() error checking consolidation, new assertion 2009-08-04 15:36:28 -06:00
Eric Anholt
191e028de2 i965: Fix RECT shadow sampling by not losing the other texcoords.
Bug #20821
2009-08-04 12:43:18 -07:00
Brian Paul
3a221a9018 docs: 7.5.1 bug fixes 2009-08-04 09:27:49 -06:00
Brian Paul
61673aebb0 intel: Fix inverted test for disabling flushing of front buffer output.
The comment disagreed with the code, and nicely drew my eyes to what was
going wrong.

Bug #21774 (blender)
Bug #21788 (readpix)

(cherry picked from master, commit fd65418f60)
2009-08-04 09:23:17 -06:00
Brian Paul
f5f8be8bb2 intel: Wait on the last swapbuffers to complete before queuing a new one.
This fixes jerkiness in doom3 and other apps since the kernel change to
throttle less absurdly, which led to a thundering herd of frames.

Because this is a rather minimal fix, there is at least one downside: If
the whole scene completes in one batchbuffer, we'll end up stalling the GPU.

Thanks to Michel Dänzer for suggesting using glFlush to signal frame end
instead of going to all the effort of adding a new DRI2 extension.

(cherry picked from master, commit 0828579a65)
2009-08-04 09:22:15 -06:00
Brian Paul
2bec909c69 texenv: Use VP->Current, since _Current isn't updated at this point.
(cherry picked from master, commit a9ba1bfeb3)
2009-08-04 09:15:33 -06:00
Brian Paul
f0df08abbe texenv: Match state.c in deciding whether we'll be using a vertex shader.
(cherry picked from master, commit 40990d9dfb)
2009-08-04 09:15:09 -06:00
Brian Paul
9d3929b60c texenv: Add missing dependency on VP changes.
Funny thing is I annotated this dependency in
e5f63c403b, but didn't actually use it.

(cherry picked from master, commit 03187571b6)

Conflicts:
	src/mesa/main/state.c
2009-08-04 09:14:33 -06:00
Dan Nicholson
9185a61c8a mklib: Ensure target directory exists for library
Instead of relying on the Makefile to always generate $(TOP)/$(LIB_DIR),
just have mklib handle creating the directory. This should fix any races
when using parallel make.

Signed-off-by: Dan Nicholson <dbn.lists@gmail.com>
(cherry picked from commit 23671e5358)
2009-08-04 06:30:46 -07:00
Peter Hutterer
0ce73f84e9 Add missing X11_INCLUDES to egl/drivers/demo and egl/main.
Compiling mesa on a system with no X headers installed in the default
include paths fails due to missing X11 includes. The header includes are
picked up by configure but not applied.

Signed-off-by: Peter Hutterer <peter.hutterer@who-t.net>
Signed-off-by: Dave Airlie <airlied@redhat.com>
(cherry picked from commit 5358e54d1a)
2009-08-04 06:30:30 -07:00
Dan Nicholson
23671e5358 mklib: Ensure target directory exists for library
Instead of relying on the Makefile to always generate $(TOP)/$(LIB_DIR),
just have mklib handle creating the directory. This should fix any races
when using parallel make.

Signed-off-by: Dan Nicholson <dbn.lists@gmail.com>
2009-08-04 06:25:26 -07:00
Michel Dänzer
048f988aeb r300g: Slightly saner initialization of some texture / transfer fields. 2009-08-04 10:57:47 +02:00
Eric Anholt
d7430d942f i965: Assert that the offset in the VBO is below the VBO size.
This avoids sending a bad buffer address to the GPU due to programmer error,
and is permitted by the ARB_vbo spec.  Note that we still have the opportunity
to dereference past the end of the GPU, because we aren't clipping to a
correct _MaxElement, but that appears to be harder than it should be.  This
gets us the 90% solution.

Bug #19911.
2009-08-03 17:56:49 -07:00
Eric Anholt
e340d4f986 i965: Even if no VS inputs are set, still load some amount of URB as required.
See comment on Vertex URB Entry Read Length for VS_STATE.

This, combined with the previous three commits, fixes #22945.
2009-08-03 17:19:03 -07:00
Eric Anholt
e93848e595 i965: Make sure the VS URB size is big enough to fit a VF VUE.
This fix is just from code and docs inspection, but it may fix hangs on
some applications.
2009-08-03 17:19:03 -07:00
Eric Anholt
d1fbfd0f96 i965: Don't emit bad packets when no VBs are referenced.
It appears that sometimes Mesa (and I suppose a VS could as well) emits
a program which references no vertex data, and thus we end up with
nr_enabled == 0 even though some VBs are enabled.  We'd end up emitting
VB/VE packet headers of 0xffffffff in that case, leading to GPU hangs.

Bug #22945 (wine with an uncompiled VS)
2009-08-03 17:19:03 -07:00
Eric Anholt
9b9cb30d12 i965: Calculate enabled[] and nr_enabled once and re-use the values.
The code duplication bothered me.
2009-08-03 17:19:03 -07:00
Robert Ellison
1f1ead9947 typo fix
somehow, this change was missed on the last checkin
2009-08-03 17:09:14 -06:00
Robert Ellison
0d18e9259e mesa: fix up some GLAPI XML
- Added specifications for the extensions GL_APPLE_flush_buffer_range and
  GL_APPLE_texture_range

- EXT_framebuffer_object.xml strangely held specifications for both
  the GL_EXT_framebuffer_object extension and the GL_EXT_texture_array
  extension.  Split out the GL_EXT_texture_array data into its own
  file.
2009-08-03 17:04:50 -06:00
Roland Scheidegger
50c736589e radeon: more fixes for compressed textures
- fix not respecting required hardware stride with compressedTexImage -
  this fixes #22615.
- make sure correct stride is used in various places
- fix stored miptree never matching with a TexImage call with compressed
  texture
- don't always store data with compressedtexsubimage at offset 0,
  and actually use the supplied pixel data... (untested)
- make sure rows for compressed texture handling are rounded up not down

Note that trying to access stored compressed textures in hardware miptrees
from core mesa (get_compressed_teximage, swrast fallbacks) can't work correctly,
since RowStride isn't really set to anything useful, plus some places (at least
get_compressed_teximage) assume this data has native stride and no padding.
2009-08-04 00:21:07 +02:00
Eric Anholt
4221e81b24 radeon: Fix inverted test for disabling flushing of front buffer output.
(corresponding fix to the intel driver one)
2009-08-03 14:40:46 -07:00
Eric Anholt
fd65418f60 intel: Fix inverted test for disabling flushing of front buffer output.
The comment disagreed with the code, and nicely drew my eyes to what was
going wrong.

Bug #21774 (blender)
Bug #21788 (readpix)
2009-08-03 14:33:40 -07:00
Eric Anholt
0828579a65 intel: Wait on the last swapbuffers to complete before queuing a new one.
This fixes jerkiness in doom3 and other apps since the kernel change to
throttle less absurdly, which led to a thundering herd of frames.

Because this is a rather minimal fix, there is at least one downside: If
the whole scene completes in one batchbuffer, we'll end up stalling the GPU.

Thanks to Michel Dänzer for suggesting using glFlush to signal frame end
instead of going to all the effort of adding a new DRI2 extension.
2009-08-03 13:34:07 -07:00
Alex Deucher
e0d61fd696 r600: add some new r7xx pci ids 2009-08-03 16:10:32 -04:00