Commit graph

6222 commits

Author SHA1 Message Date
Mike Blumenkrantz
b67a4ba4ad nir/format_convert: add ssa version of uint packing
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10619>
2021-07-07 13:41:37 +00:00
Mike Blumenkrantz
c948251d2b nir/format_convert: nir_shift -> nir_shift_imm
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10619>
2021-07-07 13:41:37 +00:00
Emma Anholt
4118264643 nir: Free the instructions in a DCE instr removal.
No significant change in shader-db time (n=11), but should be a little win
for memory usage by the compiler.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11628>
2021-07-06 11:24:48 -07:00
Emma Anholt
5618445d45 nir: Use remove_and_dce for nir_shader_lower_instructions().
Reduces the work that other shader passes have to do to look at dead code,
and possibly extra rounds around the optimization loop if dce wasn't the
last pass in it.

shader-db runtime -1.12919% +/- 0.264337% (n=49) on SKL.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11628>
2021-07-06 11:24:45 -07:00
Emma Anholt
5251548572 nir: Add a nir_instr_remove that recursively removes dead code.
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11628>
2021-07-06 11:24:43 -07:00
Danylo Piliaiev
c0f623e62f glsl: Prohibit implicit conversion of mem parameter in atomicOP functions
Per OpenGL Shading Language, section 8.11. "Atomic Memory Functions"
first argument "mem" of all atomicOP functions is inout.
The same is true for ARB_shader_storage_buffer_object and
GL_INTEL_shader_atomic_float_minmax

For implicit conversion of inout parameters it is required for type
to support bi-directional conversion, since there is no such types
in glsl - implicit conversion is effectively prohibited.

Alternatively we could have marked atomic_var parameter of built-in
atomicOP functions as inout, however it opens another can of worms
during NIR lowerings.

Fixes: ea0a1f5beb
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2837
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4887>
2021-07-05 18:29:51 +03:00
Thomas H.P. Andersen
ffea622604 nir/ifind_msb_rev: fix input check
ifind_msb_rev was introduced in a5747f8ab3.

ifind_msb_rev guards against src0 being both 0 or -1 at the same time.
That is always true. This patch changes it to check for those values
individually.

Spotted from a compile warning.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

Fixes: a5747f8ab3 (\"nir: add opcodes for *find_msb_rev and lowering\")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11630>
2021-07-04 12:17:58 +00:00
Jesse Natalie
f8f2c3d835 nir_lower_readonly_images: Clear variable data when changing the type
For images, variable data includes the format. For samplers, variable
data is used for OpenCL inline samplers. When converting a variable
from one to the other, zero out the data so we don't accidentally
interpret a converted image as an inline sampler.

Fixes: fa677c86 ("nir_lower_readonly_images_to_tex: Support non-CL semantics")
Acked-by: Enrico Galli <enrico.galli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11674>
2021-07-02 04:24:22 +00:00
Alyssa Rosenzweig
3da23a9c7e nir: Fix constant folding for irhadd/urhadd
This should be a subtract, not an add. The comment's proof is correct,
but the (wrong) expression we actually use isn't what it's in the
comment! Correct the discrepancy.

The lowering in nir_opt_algebraic was correctly typed.

Fixes: 272e927d0e ("nir/spirv: initial handling of OpenCL.std extension opcodes")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11671>
2021-07-02 00:21:22 +00:00
Rob Clark
c7b935962b nir: Add pass to lower phi precision
In addition to register pressure benefits from getting more fp16/int16,
this avoids i2imp's from standing in the way of loop unrolling.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11545>
2021-06-29 23:27:28 +00:00
Thomas H.P. Andersen
b4369de27f nir/lower_packing: use shader_instructions_pass
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11615>
2021-06-29 22:08:29 +00:00
Thomas H.P. Andersen
ed530ac6c2 nir: return progress from nir_lower_packing
Compiling with clang warns about an unused variable in
nir_lower_packing.

Tracking progress was added to nir_lower_packing in
adb157ddfd but the function
will ignore the progress from impl calls and always return
false.

This patch changes it to return the progress. It fixes the
warning and should enable validation calls in NIR_PASS when
progress is made.

Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Fixes: adb157ddfd "nir: Return progress from nir_lower_64bit_pack()"
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11615>
2021-06-29 22:08:29 +00:00
Timothy Arceri
a73e7305e9 util/driconf: add new ignore_write_to_readonly_var workaround
This forces the GLSL compiler to ignore writes to readonly vars
rather than throwing an error.

Cc: mesa-stable

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11602>
2021-06-29 02:59:28 +00:00
Timothy Arceri
e607205af0 glsl: force_glsl_version to shaders with no defined version
If a shader has no defined version force_glsl_version was
previous ignored and the shader would default to 110. This updates
the code so that those shaders are forced to a new level also.

We reused the existing code to make sure a sensible value is set
for the version.

Cc: mesa-stable

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11602>
2021-06-29 02:59:28 +00:00
Eleni Maria Stea
49e8b77fd9 intel: struct bitset is renamed to brw_bitset
Static struct bitset was renamed to brw_bitset as a struct bitset
is defined in sys/_bitset.h included by pthread_np.h on FreeBSD that
is indirectly included by src/intel/compiler/brw_nir_lower_shader_calls.c

Signed-off-by: Eleni Maria Stea <elene.mst@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11203>
2021-06-28 21:12:24 +03:00
Emma Anholt
0afab39af9 nir: Add a helper for chasing movs with nir_ssa_scalar().
Sometimes you might want to find a constant source without going through
all the copy prop and constant folding to make your source be a
load_const.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11613>
2021-06-28 16:26:24 +00:00
Rhys Perry
502b06c4f5 nir/opt_load_store_vectorize: fix check_for_robustness() with deref access
We could do better if we knew the nir_address_format to obtain
addition_bits, but the only affected driver (Turnip) probably won't
benefit because it doesn't vectorize across vec4.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Fixes: 2e7bceb220 ("nir/load_store_vectorizer: fix check_for_robustness() with indirect loads")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4922
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11382>
2021-06-28 15:15:42 +00:00
Caio Marcelo de Oliveira Filho
6ad88a8f08 spirv: Support SPV_KHR_subgroup_uniform_control_flow
There's no SPIR-V Capability associated, so check in the Execution
Mode.  For now, don't keep track of whether a shader uses uniform
control flow in the shader_info, we can add that when/if a driver
actually need that information.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11476>
2021-06-25 22:41:32 +00:00
Caio Marcelo de Oliveira Filho
a219073e9b spirv: Update headers and metadata from latest Khronos commit
This corresponds to f95c3b3761ee1b1903f54ae69b526ed6f0edc3b9
("Merge pull request #219 from cmarcelo/SPV_EXT_shader_atomic_float16_add")
in https://github.com/KhronosGroup/SPIRV-Headers.

Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11476>
2021-06-25 22:41:32 +00:00
Caio Marcelo de Oliveira Filho
3a9289eaed nir: Add test to check edge case in Split ALU optimization
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11476>
2021-06-25 22:41:32 +00:00
Caio Marcelo de Oliveira Filho
b951929795 nir/opt_if: Don't split ALU for single block infinite loops
Some infinite loop cases were already covered by other
restrictions (e.g. if the loop had a body), but the case with a single
block in the loop body wasn't yet.

This prevents an infinite loop when optimizing the shader in
dEQP-VK.reconvergence.subgroup_uniform_control_flow_ballot.compute.nesting2.3.2
and various others reconvergence tests.

Fixes: 0881e90c09 ("nir: Split ALU instructions in loops that read phis")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com> [v1]
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11476>
2021-06-25 22:41:32 +00:00
Enrico Galli
8a5333c105 nir: Add modes filter to nir_sort_variables
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10989>
2021-06-24 20:05:13 +00:00
Jason Ekstrand
81cb20bd17 nir: Add a function for sorting variables
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10989>
2021-06-24 20:05:13 +00:00
Lionel Landwerlin
7ed0aaced7 nir: use a more fitting index for btd_stack_push_intel
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8637>
2021-06-22 21:09:25 +00:00
Lionel Landwerlin
423c47de99 nir: drop the btd_resume_intel intrinsic
This is now 100% equivalent to the new rt_resume intrinsic.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8637>
2021-06-22 21:09:25 +00:00
Jason Ekstrand
72437f6d54 spirv: Create acceleration structure and shader record variables
spirv_to_nir now requires NIR variables to be created for everything.

Fixes: 10b3eecd36 "spirv: Don't remove variables used by resource..."
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8637>
2021-06-22 21:09:25 +00:00
Charlie Turner
786fa3435c spirv_to_nir: Add environment variable to change default log level
During dEQP runs for radv, I see a lot of warnings like,

ERROR - dEQP error: SPIR-V WARNING:
ERROR - dEQP error:     In file ../src/compiler/spirv/spirv_to_nir.c:1073
ERROR - dEQP error:     Decoration not allowed on struct members: SpvDecorationRestrict
ERROR - dEQP error:     408 bytes into the SPIR-V binary

This fails jobs on Gitlab, due to,

Job's log exceeded limit of 4194304 bytes.
Job execution will continue but no more output will be collected.

Since it doesn't seem feasible right now to fix the many shaders in
the VK-CTS triggering this warning, add an environment toggle that
allows test runners to only see the level of commentary they want.

v2 from Martin:
 - Add my SoB

v3 from Martin:
 - fix the indentation (suggested by Eric)
 - put the declarations at the top of the function

v4 from Martin:
 - make vtn_default_log_level() static (Marcin)
 - cache the default level in vtn_log (Marcin)
 - move vtn_log_level_strings inside vtn_default_log_level()
 - Fix the build issue on MSC

Signed-off-by: Martin Peres <martin.peres@mupuf.org>
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Acked-by: Andres Gomez <agomez@igalia.com>
Acked-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11491>
2021-06-22 13:59:43 +03:00
Bas Nieuwenhuizen
8dfb240b1f nir: Add raytracing shader call lowering pass.
Really copying Jason's pass.

Changes:
- Instead of all the intel lowering introduce rt_{execute_callable,trace_ray,resume}
- Add the ability to use scratch intrinsics directly.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10339>
2021-06-21 21:23:51 +00:00
Bas Nieuwenhuizen
02c5dc8035 nir: Add lowered vendor independent raytracing intrinsics.
For use in a generic nir_lower_shader_calls.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10339>
2021-06-21 21:23:51 +00:00
Jason Ekstrand
73188c6954 nir,docs: Add docs for NIR ALU instructions
About half or more of the text here is actually from Connor Abbot.  I've
edited it a bit to bring it up-to-date and make a few things more clear.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11438>
2021-06-21 16:46:59 +00:00
Jason Ekstrand
f00b5a30f5 nir: Require vectorized ALU ops to be all-or-nothing
Long ago, the semantics of bcsel were such that it took a single boolean
value and selected between whole vectors.  These days, it takes a vector
boolean with the assumption that if you want the old behavior you can
just use a .xxxx swizzle.  There currently are no opcodes which use a
output_size of 0 but have a scalar or fixed-vector input.  Let's
disallow it for now to force us to think through the semantics again if
this ever comes up as something someone actually wants.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11438>
2021-06-21 16:46:59 +00:00
Rhys Perry
ea68d4a676 nir/propagate_invariant: add invariant_prim option
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11035>
2021-06-21 15:13:05 +00:00
Jason Ekstrand
2e08bae9b3 nir,vc4: Suffix a bunch of unorm 4x8 opcodes _vc4
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11463>
2021-06-21 09:04:08 -05:00
Jason Ekstrand
0afbfee8da nir,panfrost: Suffix fsat_signed and fclamp_pos with _mali
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11463>
2021-06-21 09:03:34 -05:00
Jason Ekstrand
f0f713960b nir,amd: Suffix nir_op_cube_face_coord/index with _amd
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11463>
2021-06-21 09:03:34 -05:00
Emma Anholt
990c232603 nir: Add an interface for logging shaders with mesa_log*.
For debug on Android, it's useful to be able to print shaders to the
android log interface, since you don't usually have stdout/stderr.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9262>
2021-06-18 18:18:35 +00:00
Eric Anholt
47804f53f9 nir: Do peephole select on other instructions if the limit is ~0.
limit==0 is the signal for "don't peephole anything but a move that will
be optimized aways."  limit > 0 is "up to N alu instructions may be moved
out."  nir-to-tgsi uses ~0 as the indicator of "No, we really need to
eliminate all if instructions" on hardware like i915 that doesn't have
control flow.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11329>
2021-06-18 04:30:43 +00:00
Emma Anholt
aba8b6675a nir/lower_int_to_float: Make sure the cursor is in the right spot.
We need to make get it updated after we may have nir_instr_remove()d an
instruction, and when we cross blocks.  This didn't really matter before
because the only builder usage was idiv, which other users of
lower_int_to_float were probably never hitting.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11329>
2021-06-18 04:30:43 +00:00
Caio Marcelo de Oliveira Filho
64cb143b92 spirv: Fix handling of OpBranchConditional with same THEN and ELSE
When an OpBranchConditional that had two equal branches was parsed, we
were treating it as a regular OpBranch.  However this doesn't work
well when there's an associated OpSelectionMerge.  We ended up
skipping marking the merge block as such, and depending on what was
inside the construct we would end up trying to process the block
twice.

Fix this by keeping the vtn_if around, but when emitting NIR identify
the two equal branch case.

Fixes: 9c2a11430e ("spirv: Rewrite CFG construction")
Closes: #3786, #4580
Reviewed-by: Yevhenii Kolesnikov <yevhenii.kolesnikov@globallogic.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9297>
2021-06-17 20:05:39 +00:00
Iván Briano
4c67924251 intel/nir: Fix txs for null surfaces
Closes: #4860
Fixes: 05a37e2422 ("intel/nir: Set lower txs with non-zero LOD")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11435>
2021-06-17 11:55:22 -07:00
Martin Krastev
eb272f6571 compiler/glsl: Use mutex lock while freeing up mem_ctx
builtin_builder::~builtin_builder() and builtin_builder::release()
are running into race condition. This leads lightsmark to crash at
the end because both calls ralloc_free which mutates the arguments state

This patch fixes lightsmark2008 crash

Fixes: e4da8b9c33 ("mesa/compiler: rework tear down of builtin/types")

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Neha Bhende <bhenden@vmware.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Tested-by: Neha Bhende <bhenden@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11385>
2021-06-16 23:14:23 +00:00
Marek Olšák
d0d2108425 shader_enums: change VERT_BIT back to the 32-bit shift
This reverts 0e2566a8. The warning is fixed differently.

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10993>
2021-06-16 21:45:57 +00:00
Rhys Perry
35e54abc67 nir/cse: resize the instruction set
ministat (CSE only):
Difference at 95.0% confidence
	-3357.54 +/- 32.5177
	-25.267% +/- 0.24098%
	(Student's t, pooled s = 33.909)

ministat (entire run):
Difference at 95.0% confidence
	-3414.27 +/- 270.628
	-2.76477% +/- 0.217647%
	(Student's t, pooled s = 282.207)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6390>
2021-06-15 17:57:07 +00:00
Rhys Perry
964f59d20e nir: use a single set during CSE
Use a single set and ensure dominance by checking after a equivalent
instruction is found.

Besides removing the need to copy a set, this also lets us resize the set
at the start of the pass in the next commit.

ministat (CSE only):
Difference at 95.0% confidence
	-984.956 +/- 28.8559
	-6.90075% +/- 0.190231%
	(Student's t, pooled s = 26.9052)

ministat (entire run):
Difference at 95.0% confidence
	-1246.1 +/- 257.253
	-0.998972% +/- 0.205094%
	(Student's t, pooled s = 239.863)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Co-authored-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6390>
2021-06-15 17:57:07 +00:00
Jason Ekstrand
e23b55c3f0 i965: Use nir_lower_passthrough_edgeflags
Now that there's a common NIR pass, there's no point in us doing this in
the back-end anymore.  In order to use this pass in i965, we do have to
make one tiny change.  Gallium runs the pass after assigning input and
output locations and so needs the pass to respect those locations and
num_inputs.  i965, however, runs it before any location assignment or
I/O lowering so we don't care.  We do, however, need the pass to succeed
with num_inputs == 0 because we set that later.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11313>
2021-06-11 21:19:06 +00:00
Dave Airlie
eff418fe57 nir/edgeflags: update outputs written when lowering edge flags.
In theory you can rerun the info gather pass, but in practice that
doesn't always end well. Be consistent inside this pass and update the
info.

While we're here, change the inputs read to use VERT_BIT_EDGEFLAG.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11313>
2021-06-11 21:19:06 +00:00
Rhys Perry
7c63ec70ef nir: document that ACCESS_RESTRICT is not set at intrinsics
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7295>
2021-06-10 13:17:22 +00:00
Rhys Perry
938098c98d nir/opt_load_store_vectorize: only require one variable to be restrict
No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7295>
2021-06-10 13:17:22 +00:00
Rhys Perry
865ca3af2b nir/opt_load_store_vectorize: check for restrict at the variable
SPIR-V -> NIR doesn't set ACCESS_RESTRICT at the intrinsic.

fossil-db (GFX10.3):
Totals from 3 (0.00% of 139391) affected shaders:
CodeSize: 12364 -> 12356 (-0.06%)
Instrs: 2493 -> 2494 (+0.04%); split: -0.04%, +0.08%
Cycles: 15279372 -> 15295756 (+0.11%); split: -0.11%, +0.21%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7295>
2021-06-10 13:17:22 +00:00
Rhys Perry
2e7bceb220 nir/load_store_vectorizer: fix check_for_robustness() with indirect loads
fossil-db (GFX10.3, robustness2 enabled):
Totals from 13958 (9.54% of 146267) affected shaders:
VGPRs: 609168 -> 624304 (+2.48%); split: -0.05%, +2.53%
CodeSize: 48229504 -> 48488392 (+0.54%); split: -0.02%, +0.56%
MaxWaves: 354426 -> 349448 (-1.40%); split: +0.00%, -1.41%
Instrs: 9332093 -> 9375053 (+0.46%); split: -0.03%, +0.49%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7295>
2021-06-10 13:17:22 +00:00