Commit graph

68964 commits

Author SHA1 Message Date
Emil Velikov
b2dccfd17e docs: add news item and link release notes for mesa 10.4.7
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
2015-03-21 00:54:14 +00:00
Emil Velikov
0030eef62b docs: Add sha256 sums for the 10.4.7 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit cb154bb221)
2015-03-21 00:53:22 +00:00
Emil Velikov
befb5d1c94 Add release notes for the 10.4.7 release
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
(cherry picked from commit d26f3c1f86)
2015-03-21 00:53:21 +00:00
Dave Airlie
ad6ede260f mesa: reorder gl_light_attrib
reduces from 2664->2656.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:41 +10:00
Dave Airlie
b99c7defac mesa: reorder gl_framebuffer
this reduces it from 1088 -> 1080 bytes

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:38 +10:00
Dave Airlie
727eb4c4e7 mesa: fix hole in vertex_array_object
this just removes 4 bytes from this object.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:33 +10:00
Dave Airlie
974e4783a5 mesa: repack gl_texture_attrib.
This removes a hole, and puts the large allocation at the end,

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:29 +10:00
Dave Airlie
2dbd8284e7 mesa: reduce gl_colorbuffer_attrib and gl_fog_attrib
These 392->388 and 72->68.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:25 +10:00
Dave Airlie
2c016ed35f mesa: reorder gl_image_unit
reduces 40->32
but reduces use in context from 7680->6144.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:21 +10:00
Dave Airlie
0ff4726a06 mesa: reorder gl_program, gl_shader, gl_shader_program
gl_program : 1344->1336
gl_shader: 488->472
gl_shader_program: 352->344.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:16 +10:00
Dave Airlie
7b634fed59 mesa: reorder gl_transform_feedback_object
Reduces size from 184 to 176 bytes.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:09 +10:00
Dave Airlie
e17b0435c5 mesa: reorder prog_instruction
reduces size from 64 to 56 bytes.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:05 +10:00
Dave Airlie
401b11843b mesa: reorder gl_array_attrib
drops 80 bytes to 72.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:14:00 +10:00
Dave Airlie
b3f6e0bb58 mesa: reorder gl_client_array
drops from 56 to 48 bytes,
drops gl_vertex_array_object from 4584 to 4320 bytes

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:13:56 +10:00
Dave Airlie
cbaff50828 mesa: reorder gl_texture_unit
drops size from 520 -> 512 bytes,
which then makes gl_texture_attrib go from 99984 to 98440.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:13:51 +10:00
Dave Airlie
83606b4904 mesa: reorder gl_point_attrib
this drops the size from 52 bytes to 48 bytes.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:13:47 +10:00
Dave Airlie
684c914014 mesa: reorder gl_multisample_attrib
drops size from 28 bytes to 20.

Acked-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Alex Deucher alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-21 08:13:17 +10:00
Ian Romanick
a04b520890 i965/fs: Use correct null destination register in cmod tests
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89670
Reviewed-by: Matt Turner <mattst88@gmail.com>
Cc: Vinson Lee <vlee@freedesktop.org>
2015-03-20 12:27:02 -07:00
Connor Abbott
ccb9cbc849 i965/fs: bail on move-to-flag in sel peephole
Fixes a piglit regression
(shaders/glsl-fs-vec4-indexing-temp-dst-in-nested-loop-combined) with
my series for GVN.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-20 11:53:11 -04:00
Francisco Jerez
1cc00f1875 i965: Mask out unused Align16 components in brw_untyped_atomic.
This is currently not a problem because the vec4 visitor happens to
mask out unused components from the destination, but it might become
an issue when we start using atomics without writeback message.  In
any case it seems sensible to set it again here because the
consequences of setting the wrong writemask (random graphics memory
corruption) are difficult to debug and can easily go unnoticed.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-20 17:01:35 +02:00
Francisco Jerez
959d16e38e i965: Pass number of components explicitly to brw_untyped_atomic and _surface_read.
And calculate the message response size based on the number of
components rather than the other way around.  This simplifies their
interface somewhat and allows the caller to request a writeback
message with more than one vector component in SIMD4x2 mode.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-20 17:01:35 +02:00
Francisco Jerez
a815cd8449 i965: Don't disable exec masking for sampler message sends.
This was telling the sampler to do texture fetches for *all* channels
in the non-constant surface index case, what could have reduced
throughput unnecessarily when some of the channels were disabled by
control flow.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-20 17:01:35 +02:00
Francisco Jerez
a902a5d6ba i965: Factor out logic to build a send message instruction with indirect descriptor.
This is going to be useful because the Gen7+ uniform and varying pull
constant, texturing, typed and untyped surface read, write, and atomic
generation code on the vec4 and fs back-end all require the same logic
to handle conditionally indirect surface indices.  In pseudocode:

|   if (surface.file == BRW_IMMEDIATE_VALUE) {
|      inst = brw_SEND(p, dst, payload);
|      set_descriptor_control_bits(inst, surface, ...);
|   } else {
|      inst = brw_OR(p, addr, surface, 0);
|      set_descriptor_control_bits(inst, ...);
|      inst = brw_SEND(p, dst, payload);
|      set_indirect_send_descriptor(inst, addr);
|   }

This patch abstracts out this frequently recurring pattern so we can
now write:

| inst = brw_send_indirect_message(p, sfid, dst, payload, surface)
| set_descriptor_control_bits(inst, ...);

without worrying about handling the immediate and indirect surface
index cases explicitly.

v2: Rebase.  Improve documentatation and commit message. (Topi)
    Preserve UW destination type cargo-cult. (Topi, Ken, Matt)

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-20 17:01:35 +02:00
Francisco Jerez
fd149628e1 i965: Set nr_params to the number of uniform components in the VS/GS path.
Both do_vs_prog and do_gs_prog initialize brw_stage_prog_data::nr_params to
the number of uniform *vectors* required by the shader rather than the number
of uniform components, contradicting the comment.  This is inconsistent with
what the state upload code and scalar path expect but it happens to work until
Gen8 because vec4_visitor interprets it as a number of vectors on construction
and later on overwrites its original value with the number of uniform
components referenced by the shader.

Also there's no need to add the number of samplers, they're not actually
passed in as uniforms.

Fixes a memory corruption issue on BDW with SIMD8 VS.

Cc: "10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-03-20 16:55:36 +02:00
Kenneth Graunke
706b916960 i965/skl: Break down SIMD16 3-source instructions when required.
Several steppings of Skylake fail when using SIMD16 with 3-source
instructions (such as MAD).

This implements WaDisableSIMD16On3SrcInstr and fixes ~190 Piglit
tests.

Based on a patch by Neil Roberts.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Neil Roberts <neil@linux.intel.com>
2015-03-20 13:25:41 +00:00
Neil Roberts
bc4b18d297 i965: Refactor SIMD16-to-2xSIMD8 checks.
The places that were checking whether 3-source instructions are
supported have now been combined into a small helper function. This
will be used in the next patch to add an additonal restriction.

Based on a patch by Kenneth Graunke.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-20 13:25:41 +00:00
Neil Roberts
c02c4b567c i965: Store the GPU revision number in brw_context
brwContextInit now queries the GPU revision number via a new parameter
for DRM_I915_GETPARAM. This new parameter requires a kernel patch and
a patch to libdrm. If the kernel doesn't support it then it will
continue but set the revision number to -1. The intention is to use
this to implement workarounds that are only needed on certain
steppings of the GPU.

Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-03-20 13:25:40 +00:00
Fredrik Höglund
2fd21d8a84 mesa: Make sure the buffer exists in _mesa_lookup_bufferobj_err
Generate GL_INVALID_OPERATION and return NULL when the buffer object
hasn't been created.  All callers expect this.

v2: Use a more concise error message.

Cc: Laura Ekstrand <laura@jlekstrand.net>
Reviewed-by: Laura Ekstrand <laura@jlekstrand.net>
2015-03-20 01:25:29 +01:00
Dave Airlie
9d97cd2e3e u_primconvert: add primitive restart support
This add primitive restart support to the prim conversion.

This involves changing the API for the translate functions
as we need to pass the prim restart index and the original
number of indices into the translate functions.

primitive restart is support for quads, quad strips
and polygons.

This deal with the case where the actual number of output
primitives is less than the initially calculated number,
by filling the rest of the output primitives with the restart
index, the other option is to reduce the output prim number,
but that will make the generator code a bit messier.

Reviewed-by: Brian Paul <brianp@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-20 09:46:30 +10:00
Kenneth Graunke
201aef9d13 i965/fp: Emit discard jumps.
This should improve the performance of any shaders using the KIL
instruction.  I'm a bit surprised we missed this.

Unfortunately, I have not been able to measure any performance
improvements from this patch.  It does make ARB_fragment_program
behave similarly to GLSL code.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-19 16:14:51 -07:00
Kenneth Graunke
8a0946f3b1 i965/fs: Make an emit_discard_jump() function to reduce duplication.
This is already copied in two places, and I want to copy it to a third
place.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Carl Worth <cworth@cworth.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-19 16:14:51 -07:00
Laura Ekstrand
09bfa326a9 main: Add TEXTURE_CUBE_MAP support in CopyTextureSubImage3D.
So it turns out that this doesn't actually fix any bugs or add any features,
stictly speaking. However, it does avoid a lot of kludginess.  Previously, if
you called

glCopyTextureSubImage3D(texcube, 0, 0, 0, zoffset = 3, ...

it would grab the texture image object for face = 0 in teximage.c instead of
the desired face = 3.  But Line 274 of brw_blorp_blit.cpp would correct for
this by updating the slice to 3.

This commit does the correct thing before calling any drivers,
which should make the functionality much more robust and uniform across all
drivers.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-19 16:07:57 -07:00
Laura Ekstrand
037e36a8aa main: Simplify debug messages for CopyTex*SubImage*D.
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-03-19 16:07:44 -07:00
Ian Romanick
a44b95cd57 glsl: Annotate as_foo functions that the this pointer cannot be NULL
We use the idiom

   ir_foo *x = y->as_foo();
   if (x == NULL)
      return;

all over the place.  GCC generates some quite lovely code for this.
One such example:

  340a5b:       83 7d 18 04             cmpl   $0x4,0x18(%rbp)
  340a5f:       0f 85 06 04 00 00       jne    340e6b
  340a65:       48 85 ed                test   %rbp,%rbp
  340a68:       0f 84 fd 03 00 00       je     340e6b

This case used as_expression() (ir_type_expression is 4).  Note that it
checks the ir_type, then checks that the pointer isn't NULL.  There is
some disconnect in GCC around the condition in the as_foo functions.

      return ir_type == ir_type_##TYPE ? (ir_##TYPE *) this : NULL; \

It believes "this" could be NULL, so it emits check outside the function
just for fun.

This patch uses assume() to tell GCC that it need not bother with extra
NULL checking of the pointer returned by the as_foo functions.

   text	   data	    bss	    dec	    hex	filename
4836430	 158688	  26248	5021366	 4c9eb6	i965_dri-before.so
4836173	 158688	  26248	5021109	 4c9db5	i965_dri-after.so

v2: Replace 'if (this == NULL) unreachable("this cannot be NULL")' with
assume(this != NULL).  Suggested by Ilia Mirkin.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-03-19 15:35:42 -07:00
Paul Berry
bf9d921936 main: Change the type argument of use_shader_program() to gl_shader_stage.
This allows it to be called from a loop.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2015-03-19 13:38:51 -07:00
Paul Berry
57b2652322 main: Clean up a strange construction in use_shader_program().
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2015-03-19 13:38:51 -07:00
Jason Ekstrand
46c35c61e9 i965/nir: Sort uniforms direct-first and use two different uniform registers
Previously, we put all the uniforms into one big array.  The problem with
this approach is that, as soon as there was one indirect array acces, the
backend would decide that the entire large array should be pull constants.
This commit splits the array in half: first direct-only uniforms and then
potentially-indirect uniforms.  This may not be optimal, but it does let
the backend promote things to push constants.

Shader-db results on HSW:
total instructions in shared programs: 4114840 -> 4112172 (-0.06%)
instructions in affected programs:     43316 -> 40648 (-6.16%)
helped:                                116
HURT:                                  0

v2: Set param_size[num_direct_uniforms] only if we have indirect uniforms.
    This caused a bug that, strangely enough, only showed up on Broadwell
    vertex shaders.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-19 13:18:39 -07:00
Jason Ekstrand
8a33f95b7a nir/lower_io: Add a assign_locations function that sorts by [in]direct use
v2: Delete the set of indirectly accessed variables when we're done with it
v3: Rename from _packed to _scalar

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-19 13:18:39 -07:00
Jason Ekstrand
25db44a845 nir/lower_io: Make variable location assignment a manual operation
Previously, we just assigned variable locations in nir_lower_io.  Now, we
force the user to assign variable locations for us.  This gives the backend
a bit more control over where variables are placed.

v2: Rename from _packed to _scalar

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-19 13:18:39 -07:00
Jason Ekstrand
639115123e nir: Use a list instead of a hash_table for inputs, outputs, and uniforms
We never did a single hash table lookup in the entire NIR code base that I
found so there was no real benifit to doing it that way.  I suppose that
for linking, we'll probably want to be able to lookup by name but we can
leave building that hash table to the linker.  In the mean time this was
causing problems with GLSL IR -> NIR because GLSL IR doesn't guarantee us
unique names of uniforms, etc.  This was causing massive rendering isues in
the unreal4 Sun Temple demo.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-03-19 13:18:38 -07:00
Brian Paul
8f255f948b gallivm: remove unused 'builder' variable
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2015-03-19 12:56:35 -06:00
Brian Paul
1cd3745911 mesa: use more descriptive error messages for glUniform errors
Different errors for type mismatches, size mismatches and matrix/
non-matrix mismatches.  Use a common format of "uniformName"@location
in the messags.

Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-03-19 12:56:35 -06:00
Matt Turner
b0d422cd2a i965/fs: Print spills:fills and number of promoted constants.
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2015-03-19 11:15:57 -07:00
Ian Romanick
b616164c95 i965/fs: Emit better b2f of an expression on GEN4 and GEN5
On platforms that do not natively generate 0u and ~0u for Boolean
results, b2f expressions that look like

    f = b2f(expr cmp 0)

will generate better code by pretending the expression is

    f = ir_triop_sel(0.0, 1.0, expr cmp 0)

This is because the last instruction of "expr" can generate the
condition code for the "cmp 0".  This avoids having to do the "-(b & 1)"
trick to generate 0u or ~0u for the Boolean result.  This means code like

    mov(16)         g16<1>F         1F
    mul.ge.f0(16)   null            g6<8,8,1>F      g14<8,8,1>F
    (+f0) sel(16)   m6<1>F          g16<8,8,1>F     0F

will be generated instead of

    mul(16)         g2<1>F          g12<8,8,1>F     g4<8,8,1>F
    cmp.ge.f0(16)   g2<1>D          g4<8,8,1>F      0F
    and(16)         g4<1>D          g2<8,8,1>D      1D
    and(16)         m6<1>D          -g4<8,8,1>D     0x3f800000UD

v2: When the comparison is either == 0.0 or != 0.0 use the knowledge
that the true (or false) case already results in zero would allow better
code generation by possibly avoiding a load-immediate instruction.

v3: Apply the optimization even when neither comparitor is zero.

Shader-db results:

GM45 (0x2A42):
total instructions in shared programs: 3551002 -> 3550829 (-0.00%)
instructions in affected programs:     33269 -> 33096 (-0.52%)
helped:                                121

Iron Lake (0x0046):
total instructions in shared programs: 4993327 -> 4993146 (-0.00%)
instructions in affected programs:     34199 -> 34018 (-0.53%)
helped:                                129

No change on other platforms.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Tapani Palli <tapani.palli@intel.com>
2015-03-19 10:21:08 -07:00
Matt Turner
036e347f3c util: Optimize _mesa_roundeven with SSE 4.1.
The SSE 4.1 ROUND instructions let us implement roundeven directly.
Otherwise we assume that the rounding mode has not been modified (as we
do in the rest of Mesa) and use rint().

glibc uses the ROUND instruction in rint() after a cpuid check. This
patch just lets us inline it directly when we're already building for
SSE 4.1.

Reviewed-by: Carl Worth <cworth@cworth.org>
2015-03-18 21:06:26 -07:00
Matt Turner
5de86102f9 util: Add a roundeven test.
Reviewed-by: Carl Worth <cworth@cworth.org>
2015-03-18 21:06:26 -07:00
Matt Turner
dd0d3a2c0f mesa: Replace _mesa_round_to_even() with _mesa_roundeven().
Eric's initial patch adding constant expression evaluation for
ir_unop_round_even used nearbyint. The open-coded _mesa_round_to_even
implementation came about without much explanation after a reviewer
asked whether nearbyint depended on the application not modifying the
rounding mode. Of course (as Eric commented) we rely on the application
not changing the rounding mode from its default (round-to-nearest) in
many other places, including the IROUND function used by
_mesa_round_to_even!

Worse, IROUND() is implemented using the trunc(x + 0.5) trick which
fails for x = nextafterf(0.5, 0.0).

Still worse, _mesa_round_to_even unexpectedly returns an int. I suspect
that could cause problems when rounding large integral values not
representable as an int in ir_constant_expression.cpp's
ir_unop_round_even evaluation. Its use of _mesa_round_to_even is clearly
broken for doubles (as noted during review).

The constant expression evaluation code for the packing built-in
functions also mistakenly assumed that _mesa_round_to_even returned a
float, as can be seen by the cast through a signed integer type to an
unsigned (since negative float -> unsigned conversions are undefined).

rint() and nearbyint() implement the round-half-to-even behavior we want
when the rounding mode is set to the default round-to-nearest. The only
difference between them is that nearbyint() raises the inexact
exception.

This patch implements _mesa_roundeven{f,}, a function similar to the
roundeven function added by a yet unimplemented technical specification
(ISO/IEC TS 18661-1:2014), with a small difference in behavior -- we
don't bother raising the inexact exception, which I don't think we care
about anyway.

At least recent Intel CPUs can quickly change a subset of the bits in
the x87 floating-point control register, but the exception mask bits are
not included. rint() does not need to change these bits, but nearbyint()
does (twice: save old, set new, and restore old) in order to raise the
inexact exception, which would incur some penalty.

Reviewed-by: Carl Worth <cworth@cworth.org>
2015-03-18 21:06:26 -07:00
Matt Turner
bb22aa08e4 i965/fs: Ignore type in cmod prop if scan_inst is CMP.
total instructions in shared programs: 6263270 -> 6203091 (-0.96%)
instructions in affected programs:     2606529 -> 2546350 (-2.31%)
helped:                                14301
GAINED:                                5
LOST:                                  3

Revewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
2015-03-18 21:03:09 -07:00
Jason Ekstrand
e1f3ddef8c i965/nir: Make our environment variable checking smarter
Before, we enabled NIR if you set INTEL_USE_NIR to anything which mean that
INTEL_USE_NIR=false would actually turn on NIR.  In preparation for turning
NIR on by default, this commit makes it smarter by allowing the
INTEL_USE_NIR variable to work as either a force-enable or a force-disable.

Reviewed-by: Mark Janes <mark.a.janes@intel.com>
2015-03-18 16:40:22 -07:00
Dave Airlie
37e3a116f8 egl: don't fill client apis string forever.
We never reset the string on eglTerminate, so it grows
for ever on multiple eglInitialise.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-03-19 08:28:38 +10:00