i965: Don't disable exec masking for sampler message sends.

This was telling the sampler to do texture fetches for *all* channels
in the non-constant surface index case, what could have reduced
throughput unnecessarily when some of the channels were disabled by
control flow.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Francisco Jerez 2015-02-26 17:24:03 +02:00
parent a902a5d6ba
commit a815cd8449
2 changed files with 8 additions and 8 deletions

View file

@ -762,6 +762,8 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src
brw_AND(p, addr, addr, brw_imm_ud(0x0ff));
brw_OR(p, addr, addr, temp);
brw_pop_insn_state(p);
/* dst = send(offset, a0.0 | <descriptor>) */
brw_inst *insn = brw_send_indirect_message(
p, BRW_SFID_SAMPLER, dst, src, addr);
@ -775,8 +777,6 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg dst, struct brw_reg src
simd_mode,
return_format);
brw_pop_insn_state(p);
/* visitor knows more than we do about the surface limit required,
* so has already done marking.
*/
@ -1229,6 +1229,8 @@ fs_generator::generate_varying_pull_constant_load_gen7(fs_inst *inst,
brw_set_src0(p, insn_and, vec1(retype(index, BRW_REGISTER_TYPE_UD)));
brw_set_src1(p, insn_and, brw_imm_ud(0x0ff));
brw_pop_insn_state(p);
/* dst = send(offset, a0.0 | <descriptor>) */
brw_inst *insn = brw_send_indirect_message(
p, BRW_SFID_SAMPLER, retype(dst, BRW_REGISTER_TYPE_UW),
@ -1243,8 +1245,6 @@ fs_generator::generate_varying_pull_constant_load_gen7(fs_inst *inst,
simd_mode,
0);
brw_pop_insn_state(p);
/* visitor knows more than we do about the surface limit required,
* so has already done marking.
*/

View file

@ -419,6 +419,8 @@ vec4_generator::generate_tex(vec4_instruction *inst,
brw_AND(p, addr, addr, brw_imm_ud(0x0ff));
brw_OR(p, addr, addr, temp);
brw_pop_insn_state(p);
/* dst = send(offset, a0.0 | <descriptor>) */
brw_inst *insn = brw_send_indirect_message(
p, BRW_SFID_SAMPLER, dst, src, addr);
@ -432,8 +434,6 @@ vec4_generator::generate_tex(vec4_instruction *inst,
BRW_SAMPLER_SIMD_MODE_SIMD4X2,
return_format);
brw_pop_insn_state(p);
/* visitor knows more than we do about the surface limit required,
* so has already done marking.
*/
@ -1091,6 +1091,8 @@ vec4_generator::generate_pull_constant_load_gen7(vec4_instruction *inst,
brw_set_src0(p, insn_and, vec1(retype(surf_index, BRW_REGISTER_TYPE_UD)));
brw_set_src1(p, insn_and, brw_imm_ud(0x0ff));
brw_pop_insn_state(p);
/* dst = send(offset, a0.0 | <descriptor>) */
brw_inst *insn = brw_send_indirect_message(
p, BRW_SFID_SAMPLER, dst, src, addr);
@ -1104,8 +1106,6 @@ vec4_generator::generate_pull_constant_load_gen7(vec4_instruction *inst,
BRW_SAMPLER_SIMD_MODE_SIMD4X2,
0);
brw_pop_insn_state(p);
/* visitor knows more than we do about the surface limit required,
* so has already done marking.
*/