Commit graph

69350 commits

Author SHA1 Message Date
David Rosca
ad96031ec6 radeonsi/vce: Only send one task per IB
There is no need to use second task for config when creating the
session, also it doesn't work now as we don't set the next task
offset in task info anymore.

Fixes: 9ca1cda2be ("radeonsi/vce: Cleanup")
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34894>
2025-05-16 10:36:44 +00:00
David Rosca
fd1480c3df radeonsi/vce: Fix bitstream buffer size
On old VCE this was being rejected by kernel because the size here
was the buffer size, but the bitstream buffer address includes the
offset.

Fixes: 901aafb030 ("radeonsi/vce: Support raw packed headers")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13128
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34894>
2025-05-16 10:36:44 +00:00
Juan A. Suarez Romero
f27d062abc gallium/util: fix num primitives for line loops
When computing the number of primitives from the number of vertices, for
the case of line loops we need to include an extra line that closes the
shape.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35007>
2025-05-16 09:06:17 +00:00
Gert Wollny
58d8dc9543 r600/sfn: dump the lowered shader when translation fails
So far we printed the variant before the final lowering was done,
this is usually not that helpful. For this the code to dump the
shader has to go into r600_shader_from_nir.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34999>
2025-05-16 08:45:58 +00:00
Valentine Burley
2ce2c1f835 zink/ci: Skip flaky trace on TGL
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Signed-off-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35016>
2025-05-16 08:00:11 +00:00
Rob Clark
65e18a8494 freedreno: Fix shader-clock when kernel exposes UCHE_TRAP_BASE
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Fixes: 4b1b4ee10c ("freedreno,tu: Read and pass to compiler uche_trap_base)
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35010>
2025-05-15 22:27:17 +00:00
Yinjie Yao
089e2cb6f9 radeonsi: Disable av1 cdef_channel_strength for VCN4
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VCN4 hardware doesn't support this feature, it can only be supported in VCN5.

Signed-off-by: Yinjie Yao <yinjie.yao@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35004>
2025-05-15 18:52:08 +00:00
Seán de Búrca
e4d895f0e1 rusticl: fix build with clippy driver
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35002>
2025-05-15 09:35:17 -07:00
Seán de Búrca
35af55a2a7 rusticl: replace map_or(false, f) with is_some_and(f)
A new clippy lint fails on this pattern, causing build errors on
versions >= 1.84.0. `is_some_and()` is stable from 1.70.0.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35002>
2025-05-15 09:35:08 -07:00
José Roberto de Souza
bca12800aa iris: Restrict platforms that needs Wa_1604061319
It was being applied even to platforms that don't require it.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34988>
2025-05-15 15:25:12 +00:00
Corentin Noël
6c1c116a0f virgl: Avoid possible double free when destroying the hw resource
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When a resource is un-referenced, the reference count is decremented,
and intentionally no lock is acquired. This can result in the following
race condition when a resource is created from a handle:

```
[Thread] Operation
[0] Create resource from handle for the first time, refcount set to 1
[0] resource is unreferenced, refcount is decremented to 0 (intentionally
    no mutex is locked)
[0] before entering virgl_hw_res_destroy to lock
    virgl_drm_winsys::bo_handles_mutex the thread yields
[1] Create resource from handle pulls the resource from
     virgl_drm_winsys::bo_handles, refcount is incremented to 1
[1] resource is unreferenced, refcount is decremented to 0
[1] Enter virgl_hw_res_destroy,
[1] acquire the lock on virgl_drm_winsys::bo_handles_mutex
[1] check reference count to be 0, yes -> the resource is destroyed
[1] release the lock on virgl_drm_winsys::bo_handles_mutex
[0] Enter virgl_hw_res_destroy,
[0] acquire the lock on virgl_drm_winsys::bo_handles_mutex
[0] Here the res pointer already points to freed memory
[0] check reference count to be 0, yes -> the resource is destroyed (again!)
double free or corruption (!prev)
```

To work around this race condition, keep track of the number of times
the resource was pulled from virgl_drm_winsys::bo_handles to see whether
it has to be kept alive despite the reference count being zero.

This can be reproduced with the `spec@ext_image_dma_buf_import@ext_image_dma_buf_import-refcount-multithread`
piglit test.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34809>
2025-05-15 10:38:13 +00:00
Mary Guillemard
0bb9df9d33 pan/lib: Make pan_shader_get_compiler_options not GENX
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34895>
2025-05-15 10:40:57 +02:00
Mary Guillemard
7158f2eb8b pan/lib: Make pan_shader_compile not GENX
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Olivia Lee <olivia.lee@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34895>
2025-05-15 10:40:47 +02:00
Eric Engestrom
2bc7130808 r300/ci: switch radeon.ko jobs to common kernel (6.13.7)
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Now that it is possible to have more than one initrd, let's switch to
the common b2c kernel which requires two additional initrds:

 * The GPU initrd which contains amdgpu, i915, nouveau, radeon, and xe,
   along with their necessary firmware
 * The depmod initrd which contains what's necessary to modprobe the
   modules of the GPU initrd

Since the GPU initrd is huge (73 MB), let's reduce the size by dropping
all the firmware that is not related to AMD.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34881>
2025-05-14 23:06:42 +00:00
Marek Olšák
3fd2bdd285 radeonsi: move si_gs_output_info into si_temp_shader_variant_info
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Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
97357e721d radeonsi: add struct si_temp_shader_variant_info
This contains all shader info that's used during compilation,
but is never used after compilation.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
53cd29d946 radeonsi: move shaders args initialization into its own file
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
af8c4f19ab radeonsi: move shader variant info and spi_ps_input_ena code into its own file
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
2e8cac328a radeonsi: move si_nir_mark_divergent_texture_non_uniform to its own file
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
deda05e2b7 nir: move nir_lower_color_inputs into radeonsi
it's the only user

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
70aa58cc95 radeonsi: move shader info structures into new file si_shader_info.h
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
5389a3736f radeonsi: move NIR passes from si_shader.c into their own files
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
e478410466 radeonsi: inline shader_info in si_shader_info, keep only what's used
This reduces the si_shader_info size by 244 B.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
dc5e0e2b73 radeonsi: rename num_stream_output_components -> num_gs_stream_components
it's not for streamout

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
54cc89f7c2 radeonsi: use a simpler way to gather enabled_streamout_buffer_mask
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
180f320e69 radeonsi: use info.num_streamout_vec4s instead of si_shader_uses_streamout
It's identical now.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
759de230de radeonsi: don't declare GDS size for LLVM
We don't use GDS memory.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:17 +00:00
Marek Olšák
32274ab50e radeonsi: implement remove_streamout in si_nir_kill_outputs
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
100f9a1624 radeonsi: move xfb fields from si_shader_info to shader variant info
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
9edcf19f7d radeonsi: remove si_shader_info::writes_position
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
c761da42ce radeonsi: don't use si_shader_info in si_parse_next_shader_property
just use NIR info.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
20e5c35cfe radeonsi: gather uses_discard from shader variants
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
de6ca8c7ec radeonsi: gather writes_z/stencil/sample_mask as shader variant info
si_get_shader_variant_info doesn't need to check the kill flags because
killed stores are removed from NIR before that.

Only shader variants need to clear the writes_* flags if the epilog kills
them.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
a9ac95fc0a radeonsi: gather uses_gs_state_provoking_vtx_first/outprim from the shader
Just use nir_def_bits_used() instead of the manually written conditions.

These are gathered from bits of load_scalar_arg(vs_state_bits):
- uses_vs_state_indexed
- uses_gs_state_provoking_vtx_first
- uses_gs_state_outprim

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
b85984d2b5 radeonsi: gather VS system value usage from shader variants
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
3b276e4ba6 radeonsi: move gathering VMEM information into si_get_shader_variant_info
This is a step towards gathering shader info from shader variants instead of
input NIR.

uses_fbfetch_output can be ignored because it's already lowered to image
loads.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
c59fc30fee radeonsi: always gather shader variant info
All shaders will eventually have their info there, not just FS.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
e114b9b11c radeonsi: don't return progress from run_pre_link_optimization_passes
We will always gather shader info after it, so always optimize instead of
returning progress.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
3d6747f6e0 radeonsi: determine uses_vmem_load_other more accurately
Some opcodes don't load from memory.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
bcd0679258 radeonsi: remove si_shader_info::uses_indirect_descriptor
It shouldn't affect uses_vmem_load_other because divergent descriptors
are loaded with SMEM in waterfall loops.

Also all this removed code is highly questionable. Indirect access doesn't
matter for anything. Divergent access does, and that's handled correctly.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
970825258e radeonsi: restructure si_get_shader_variant_info
iterate over instructions outside of the conditional.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Marek Olšák
f5bc1ebc11 radeonsi: don't check sel->nir in si_init_shader_selector_async
It's always non-NULL.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34492>
2025-05-14 20:19:16 +00:00
Erik Faye-Lund
df38cdce53 gallium/aux: fixup bad indent
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34954>
2025-05-14 16:33:12 +00:00
Erik Faye-Lund
8e48db3028 r600: ingest u_blitter_clear_buffer
r600 is the only driver using this functionality, so let's move it there.

There's a few functions we used that aren't available outside of
u_blitter.c, but it turns out these aren't really needed. The first one
is blitter_check_saved_vertex_states(), that one just verifies that
certain states are saved as they should be. It's a bit sad to lose these
checks, but they are currently always passing, so nothing should break
by dropping them right now.

The second one is blitter_disable_render_cond(), and this one is also OK
to drop, because r600 never calls util_blitter_save_render_condition()
in the first place.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34954>
2025-05-14 16:33:12 +00:00
Erik Faye-Lund
20986b77f3 gallium/aux: move util_pipe_tex_to_tgsi_tex to u_blitter.c
This is the only place this is called from, and this allows us to avoid
a TGSI specific include from generic code.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34954>
2025-05-14 16:33:12 +00:00
Christoph Pillmayer
b115850ece panfrost: Remove unused ls_sb_slot from contexts
ls_sb_slot is unused now in cs_tracing_ctx and cs_exception_handler_ctx.
Let's remove it.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34808>
2025-05-14 14:03:29 +00:00
Christoph Pillmayer
82f36cd8e3 panfrost: Make ls tracker mandatory in cs_builder
This commit moves cs_load_store_tracker from the cs_builder_conf
to cs_builder and makes it no longer optional to supply.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34808>
2025-05-14 14:03:29 +00:00
Georg Lehmann
33b5d8b2ec radeonsi: always lower alu bit sizes
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/13072

load_vs_input_from_vertex_buffer can create unsupported 16bit shifts on GFX6/7.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Qiang Yu <yuq825@gmail.com>

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34946>
2025-05-14 07:42:23 +00:00
Mary Guillemard
53f780ec91 panfrost: Remove progress_increment from all CS builders
Progression logic is deprecated since v11 and we don't plan to use it.
Let's get ride of all increment logic on all instructions.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34947>
2025-05-14 07:16:36 +00:00
Patrick Lerda
769510f1cc r600: implement EXT_shader_image_load_store
Some checks are pending
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Evergreen and cayman have the hardware support for this extension.
This is described by the manual as EXPORT_RAT_INST_INC_UINT_RTN
and EXPORT_RAT_INST_DEC_UINT_RTN.

This change was tested and passes the piglit tests (17/17)
on cypress, palm and cayman.

Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34501>
2025-05-14 01:23:54 +00:00