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pan/lib: Make pan_shader_compile not GENX
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com> Acked-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Olivia Lee <olivia.lee@collabora.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/34895>
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9 changed files with 72 additions and 123 deletions
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@ -121,7 +121,7 @@ GENX(pan_blend_get_shader_locked)(struct pan_blend_shader_cache *cache,
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struct util_dynarray binary;
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util_dynarray_init(&binary, NULL);
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GENX(pan_shader_compile)(nir, &inputs, &binary, &info);
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pan_shader_compile(nir, &inputs, &binary, &info);
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struct panfrost_ptr bin =
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pan_pool_alloc_aligned(cache->bin_pool, binary.size, 64);
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@ -4388,7 +4388,7 @@ GENX(panfrost_cmdstream_screen_init)(struct panfrost_screen *screen)
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screen->vtbl.submit_batch = submit_batch;
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screen->vtbl.get_blend_shader = GENX(pan_blend_get_shader_locked);
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screen->vtbl.get_compiler_options = GENX(pan_shader_get_compiler_options);
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screen->vtbl.compile_shader = GENX(pan_shader_compile);
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screen->vtbl.compile_shader = pan_shader_compile;
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screen->vtbl.afbc_size = panfrost_afbc_size;
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screen->vtbl.afbc_pack = panfrost_afbc_pack;
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screen->vtbl.mtk_detile = panfrost_mtk_detile_compute;
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@ -566,7 +566,7 @@ pan_preload_get_shader(struct pan_fb_preload_cache *cache,
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lower_sampler_parameters, nir_metadata_control_flow, NULL);
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}
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GENX(pan_shader_compile)(b.shader, &inputs, &binary, &shader->info);
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pan_shader_compile(b.shader, &inputs, &binary, &shader->info);
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shader->key = *key;
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shader->address =
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@ -283,64 +283,9 @@ remap_variant(nir_function *func, unsigned variant, const char *target)
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return "default";
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}
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void pan_shader_compile_v6(nir_shader *nir,
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struct panfrost_compile_inputs *inputs,
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struct util_dynarray *binary,
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struct pan_shader_info *info);
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void pan_shader_compile_v7(nir_shader *nir,
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struct panfrost_compile_inputs *inputs,
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struct util_dynarray *binary,
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struct pan_shader_info *info);
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void pan_shader_compile_v9(nir_shader *nir,
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struct panfrost_compile_inputs *inputs,
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struct util_dynarray *binary,
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struct pan_shader_info *info);
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void pan_shader_compile_v10(nir_shader *nir,
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struct panfrost_compile_inputs *inputs,
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struct util_dynarray *binary,
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struct pan_shader_info *info);
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void pan_shader_compile_v12(nir_shader *nir,
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struct panfrost_compile_inputs *inputs,
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struct util_dynarray *binary,
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struct pan_shader_info *info);
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void pan_shader_compile_v13(nir_shader *nir,
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struct panfrost_compile_inputs *inputs,
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struct util_dynarray *binary,
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struct pan_shader_info *info);
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static void
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shader_compile(int arch, nir_shader *nir,
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struct panfrost_compile_inputs *inputs,
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struct util_dynarray *binary, struct pan_shader_info *info)
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{
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switch (arch) {
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case 6:
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pan_shader_compile_v6(nir, inputs, binary, info);
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break;
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case 7:
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pan_shader_compile_v7(nir, inputs, binary, info);
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break;
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case 9:
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pan_shader_compile_v9(nir, inputs, binary, info);
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break;
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case 10:
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pan_shader_compile_v10(nir, inputs, binary, info);
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break;
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case 12:
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pan_shader_compile_v12(nir, inputs, binary, info);
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break;
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case 13:
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pan_shader_compile_v13(nir, inputs, binary, info);
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break;
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default:
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unreachable("Unknown arch!");
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}
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}
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void pan_shader_compile(nir_shader *nir, struct panfrost_compile_inputs *inputs,
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struct util_dynarray *binary,
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struct pan_shader_info *info);
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int
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main(int argc, const char **argv)
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@ -479,8 +424,8 @@ main(int argc, const char **argv)
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struct util_dynarray shader_binary;
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struct pan_shader_info shader_info = {0};
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util_dynarray_init(&shader_binary, NULL);
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shader_compile(target_arch, clone, &inputs, &shader_binary,
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&shader_info);
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pan_shader_compile(clone, &inputs, &shader_binary,
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&shader_info);
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assert(shader_info.push.count * 4 <=
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BIFROST_PRECOMPILED_KERNEL_ARGS_SIZE &&
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@ -59,6 +59,7 @@ libpanfrost_lib_files = files(
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'pan_clear.c',
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'pan_earlyzs.c',
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'pan_samples.c',
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'pan_shader.c',
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'pan_tiler.c',
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'pan_layout.c',
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'pan_scratch.c',
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@ -114,7 +114,7 @@ pan_indirect_dispatch_init(struct pan_indirect_dispatch_meta *meta)
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util_dynarray_init(&binary, NULL);
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pan_shader_preprocess(b.shader, inputs.gpu_id);
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GENX(pan_shader_compile)(b.shader, &inputs, &binary, &shader_info);
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pan_shader_compile(b.shader, &inputs, &binary, &shader_info);
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ralloc_free(b.shader);
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@ -27,12 +27,10 @@
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#include "pan_blend.h"
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#include "pan_format.h"
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#if PAN_ARCH <= 5
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#include "panfrost/midgard/midgard_compile.h"
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#else
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#include "panfrost/compiler/bifrost_compile.h"
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#endif
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#include "panfrost/midgard/midgard_compile.h"
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#ifdef PAN_ARCH
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const nir_shader_compiler_options *
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GENX(pan_shader_get_compiler_options)(void)
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{
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@ -68,20 +66,21 @@ pan_raw_format_mask_midgard(enum pipe_format *formats)
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}
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#endif
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#else
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void
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GENX(pan_shader_compile)(nir_shader *s, struct panfrost_compile_inputs *inputs,
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struct util_dynarray *binary,
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struct pan_shader_info *info)
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pan_shader_compile(nir_shader *s, struct panfrost_compile_inputs *inputs,
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struct util_dynarray *binary, struct pan_shader_info *info)
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{
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unsigned arch = pan_arch(inputs->gpu_id);
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memset(info, 0, sizeof(*info));
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NIR_PASS(_, s, nir_lower_printf_buffer, 0, LIBPAN_PRINTF_BUFFER_SIZE - 8);
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#if PAN_ARCH >= 6
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bifrost_compile_shader_nir(s, inputs, binary, info);
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#else
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midgard_compile_shader_nir(s, inputs, binary, info);
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#endif
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if (arch >= 6)
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bifrost_compile_shader_nir(s, inputs, binary, info);
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else
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midgard_compile_shader_nir(s, inputs, binary, info);
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info->stage = s->info.stage;
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info->contains_barrier =
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@ -94,28 +93,30 @@ GENX(pan_shader_compile)(nir_shader *s, struct panfrost_compile_inputs *inputs,
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info->attributes_read_count = util_bitcount64(info->attributes_read);
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info->attribute_count = info->attributes_read_count;
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#if PAN_ARCH <= 5
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if (info->midgard.vs.reads_raw_vertex_id)
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info->attribute_count = MAX2(info->attribute_count, PAN_VERTEX_ID + 1);
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if (arch <= 5) {
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if (info->midgard.vs.reads_raw_vertex_id)
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info->attribute_count =
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MAX2(info->attribute_count, PAN_VERTEX_ID + 1);
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bool instance_id =
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BITSET_TEST(s->info.system_values_read, SYSTEM_VALUE_INSTANCE_ID);
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if (instance_id)
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info->attribute_count =
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MAX2(info->attribute_count, PAN_INSTANCE_ID + 1);
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#endif
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bool instance_id =
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BITSET_TEST(s->info.system_values_read, SYSTEM_VALUE_INSTANCE_ID);
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if (instance_id)
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info->attribute_count =
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MAX2(info->attribute_count, PAN_INSTANCE_ID + 1);
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}
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info->vs.writes_point_size =
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s->info.outputs_written & (1 << VARYING_SLOT_PSIZ);
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#if PAN_ARCH >= 9
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info->varyings.output_count =
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util_last_bit(s->info.outputs_written >> VARYING_SLOT_VAR0);
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if (arch >= 9) {
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info->varyings.output_count =
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util_last_bit(s->info.outputs_written >> VARYING_SLOT_VAR0);
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/* Store the mask of special varyings, in case we need to emit ADs later. */
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info->varyings.fixed_varyings =
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panfrost_get_fixed_varying_mask(s->info.outputs_written);
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#endif
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/* Store the mask of special varyings, in case we need to emit ADs
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* later. */
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info->varyings.fixed_varyings =
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panfrost_get_fixed_varying_mask(s->info.outputs_written);
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}
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break;
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case MESA_SHADER_FRAGMENT:
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if (s->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
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@ -161,14 +162,15 @@ GENX(pan_shader_compile)(nir_shader *s, struct panfrost_compile_inputs *inputs,
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info->fs.reads_face =
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(s->info.inputs_read & (1 << VARYING_SLOT_FACE)) ||
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BITSET_TEST(s->info.system_values_read, SYSTEM_VALUE_FRONT_FACE);
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#if PAN_ARCH >= 9
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info->varyings.input_count =
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util_last_bit(s->info.inputs_read >> VARYING_SLOT_VAR0);
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if (arch >= 9) {
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info->varyings.input_count =
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util_last_bit(s->info.inputs_read >> VARYING_SLOT_VAR0);
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/* Store the mask of special varyings, in case we need to emit ADs later. */
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info->varyings.fixed_varyings =
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panfrost_get_fixed_varying_mask(s->info.inputs_read);
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#endif
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/* Store the mask of special varyings, in case we need to emit ADs
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* later. */
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info->varyings.fixed_varyings =
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panfrost_get_fixed_varying_mask(s->info.inputs_read);
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}
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break;
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default:
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/* Everything else treated as compute */
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@ -188,22 +190,24 @@ GENX(pan_shader_compile)(nir_shader *s, struct panfrost_compile_inputs *inputs,
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info->ftz_fp16 = nir_is_denorm_flush_to_zero(execution_mode, 16);
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info->ftz_fp32 = nir_is_denorm_flush_to_zero(execution_mode, 32);
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#if PAN_ARCH >= 9
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/* Valhall hardware doesn't have a "flush FP16, preserve FP32" mode, and we
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* don't advertise independent FP16/FP32 denorm modes in panvk, but it's
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* still possible to have shaders that don't specify any denorm mode for
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* FP32. In that case, default to flush FP32. */
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if (info->ftz_fp16 && !info->ftz_fp32) {
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assert(!nir_is_denorm_preserve(execution_mode, 32));
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info->ftz_fp32 = true;
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if (arch >= 9) {
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/* Valhall hardware doesn't have a "flush FP16, preserve FP32" mode, and
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* we don't advertise independent FP16/FP32 denorm modes in panvk, but
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* it's still possible to have shaders that don't specify any denorm mode
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* for FP32. In that case, default to flush FP32. */
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if (info->ftz_fp16 && !info->ftz_fp32) {
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assert(!nir_is_denorm_preserve(execution_mode, 32));
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info->ftz_fp32 = true;
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}
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}
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#endif
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#if PAN_ARCH >= 6
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/* This is "redundant" information, but is needed in a draw-time hot path */
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for (unsigned i = 0; i < ARRAY_SIZE(info->bifrost.blend); ++i) {
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info->bifrost.blend[i].format =
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pan_blend_type_from_nir(info->bifrost.blend[i].type);
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if (arch >= 6) {
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/* This is "redundant" information, but is needed in a draw-time hot path */
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for (unsigned i = 0; i < ARRAY_SIZE(info->bifrost.blend); ++i) {
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info->bifrost.blend[i].format =
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pan_blend_type_from_nir(info->bifrost.blend[i].type);
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}
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}
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#endif
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}
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#endif
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@ -26,13 +26,13 @@
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#define __PAN_SHADER_H__
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#include "compiler/nir/nir.h"
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#include "genxml/gen_macros.h"
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#include "panfrost/compiler/bifrost/disassemble.h"
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#include "panfrost/compiler/valhall/disassemble.h"
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#include "panfrost/lib/pan_props.h"
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#include "panfrost/midgard/disassemble.h"
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#include "panfrost/util/pan_ir.h"
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#include "panfrost/util/pan_lower_framebuffer.h"
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#include "panfrost/lib/pan_props.h"
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#include "genxml/gen_macros.h"
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void bifrost_preprocess_nir(nir_shader *nir, unsigned gpu_id);
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void midgard_preprocess_nir(nir_shader *nir, unsigned gpu_id);
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@ -67,14 +67,13 @@ pan_shader_disassemble(FILE *fp, const void *code, size_t size, unsigned gpu_id,
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uint8_t pan_raw_format_mask_midgard(enum pipe_format *formats);
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void pan_shader_compile(nir_shader *nir, struct panfrost_compile_inputs *inputs,
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struct util_dynarray *binary,
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struct pan_shader_info *info);
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#ifdef PAN_ARCH
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const nir_shader_compiler_options *GENX(pan_shader_get_compiler_options)(void);
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void GENX(pan_shader_compile)(nir_shader *nir,
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struct panfrost_compile_inputs *inputs,
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struct util_dynarray *binary,
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struct pan_shader_info *info);
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#if PAN_ARCH >= 9
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static inline enum mali_shader_stage
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pan_shader_stage(const struct pan_shader_info *info)
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@ -884,7 +884,7 @@ panvk_compile_nir(struct panvk_device *dev, nir_shader *nir,
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struct util_dynarray binary;
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util_dynarray_init(&binary, NULL);
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GENX(pan_shader_compile)(nir, compile_input, &binary, &shader->info);
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pan_shader_compile(nir, compile_input, &binary, &shader->info);
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void *bin_ptr = util_dynarray_element(&binary, uint8_t, 0);
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unsigned bin_size = util_dynarray_num_elements(&binary, uint8_t);
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@ -1989,7 +1989,7 @@ panvk_per_arch(create_internal_shader)(
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struct util_dynarray binary;
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util_dynarray_init(&binary, nir);
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GENX(pan_shader_compile)(nir, compiler_inputs, &binary, &shader->info);
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pan_shader_compile(nir, compiler_inputs, &binary, &shader->info);
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unsigned bin_size = util_dynarray_num_elements(&binary, uint8_t);
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if (bin_size) {
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