Commit graph

189364 commits

Author SHA1 Message Date
Rohan Garg
aa9244c8f6 intel/brw: update Xe2 max SIMD message sizes
All the non-transpose messages are SIMD 1,2,4,8,16,32 capable (BSpec
57330)

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29212>
2024-05-15 12:02:02 +00:00
Samuel Pitoiset
c8852719d0 radv: rename radeon perfctr uconfig helpers
To match other helpers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29192>
2024-05-15 11:34:35 +00:00
Samuel Pitoiset
2957cedad7 radv: remove redundant radeon_set_perfctr_reg() helper
It's exactly the same as radeon_set_uconfig_reg_perfctr().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29192>
2024-05-15 11:34:35 +00:00
Samuel Pitoiset
6b023780ad radv: introduce radeon_set_reg_seq()
This is the base helper for emitting packets, it will be much more
closer to the new command buffer recording mecanishm if we decide to
use the same helpers as RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29192>
2024-05-15 11:34:35 +00:00
Samuel Pitoiset
f0d4212847 radv: stop using radv_physical_device for radeon helpers
It will be easier to share helpers between RadeonSI and RADV.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29192>
2024-05-15 11:34:35 +00:00
Karol Herbst
1e78e4a344 rusticl/device: properly handle devices with no support for images
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29205>
2024-05-15 11:00:23 +00:00
Karol Herbst
017ae1f02d rusticl/device/caps: move enough for has_images
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29205>
2024-05-15 11:00:23 +00:00
Karol Herbst
e02b4e0d44 rusticl/device: add DeviceCaps and move timestamp stuff into it
We do query caps quite a lot and this struct should be used to cache
results and to make it easier to express more complex dependencies between
features (e.g. images being supported or not).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29205>
2024-05-15 11:00:23 +00:00
Paulo Zanoni
e3e5f8e6db anv/sparse: assert a format can't be standard and non-standard
A format can't be standard and non-standard at the same time. If we
ever hit this assertion, it's because something behind the scenes has
evolved (such as the tiling formats) so something that was marked as
non-standard became standard. Add an assertion so we can quickly catch
these issues in the future and adjust the code.

I don't want to mix this assertion with the one in the line above
since that one is the most useful assertion we have in all the sparse
code, so it's good to know which one we're hitting.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:16 +00:00
Paulo Zanoni
4384c8782e anv+zink/ci: add failures related to multi-sampled sparse binding
After enabling multi-sampled sparse binding in Anv, we get these
failures. I've investigated them and none are trivial, it's not clear
if they're Anv's fault or not, especially considering how many other
texture-related failures we already have in this fails.txt file.

Since both deqp-vk and Vulkan native apps seem to be working with pure
Anv (no Zink), I don't think it's worth blocking multi-sampled sparse
on Anv just because of Zink.

From what I have investigated, the problems seem related to the
following:
 - glcts is expecting 1D images to have 2D block shapes (this is
   definitely the case for StandardPageSizesTestCase, we get rid of
   the failure by either removing sparse support for 1D images or
   telling their block shapes are the same as the 2D images)
 - glcts/zink may be trying to use formats that are unsupported by Anv
   as if they were supported
 - there's probably something funny going on with the GL_R8 format

v2: Adjust test results after merging merging MR 29118.
v3: Zink test results are a moving target...

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (v1)
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:16 +00:00
Paulo Zanoni
5294faee20 anv: check for VK_RENDERING_SUSPENDING_BIT once at CmdEndRendering
Most of what we do in this function is conditional to not have
VK_RENDERING_SUSPENDING_BIT, so check for it once.

Suggested-by: Iván Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:16 +00:00
Paulo Zanoni
7ef3d652b2 anv/sparse: enable MSAA for Sparse when applicable
The newer platforms can't support 8x and 16x since Tile64's shape for
them is not a standard block shape (and claiming standard block shapes
is higher priority than supporting things without it). The TileYs
platforms are fine.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:16 +00:00
Paulo Zanoni
4e5979b5a2 anv/sparse: flush the tile cache when resolving sparse images
Consider the following program:
 - Uses a multi-sampled image as the color attachment.
 - Draws simple geometry at the color attachment.
 - Uses the (non-multi-sampled) swapchain image as the resolve image.
 - Presents the result.

If the color attachment image (the multi-sampled one) is a sparse
image and it's fully bound, everything works and this patch is not
required.

If the image is partially bound (or just completely unbound), without
this patch the unbound area of the image that ends up being displayed
on the screen is not completely black, and it should be completely
black due to the fact that we claim to support
residencyNonResidentStrict (which is required by vkd3d for DX12).

On DG2, what ends up being displayed in the swapchain image is
actually the whole image as if it was completely bound. On TGL the
unbound area partially displays the geometry that was supposed to be
drawn, but the background is a different color: it's a weird corrupted
image. On both platforms the unbound areas should all be fully black.

This patch applies the proper flushing so that we get the results we
should have.

The bug fixed by this patch is not caught by dEQP or anything our CI
runs (dEQP does have some checks for residencynonResidentStrict
correctness, but none that catch this issue in particular). I was able
to catch this with my own sample program. Using INTEL_DEBUG=stall also
makes the problem go away.

If we had a way to track which images are fully bound we would be able
to avoid this flush. I had code for that in the earliest versions of
sparse before xe.ko had support for gpuva, but it requires maintaining
a bunch of lists, so I'm not sure that's actually worth it.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:16 +00:00
Paulo Zanoni
8abfdfe576 anv/sparse: exclude Xe2's Tile64's non-standard block shapes
The Tile64 format from Xe2 is weird and some of its MSAA shapes are
non-standard. Reject them. Otherwise, we'll get dEQP failures such as:

  deqp-vk: ../../src/intel/vulkan/anv_sparse.c:829: anv_sparse_calc_image_format_properties: Assertion `is_standard || is_known_nonstandard_format' failed.

Many tests can reproduce this issue, including:

  dEQP-VK.memory.requirements.extended.image.sparse_tiling_optimal

Testcase: dEQP-VK.memory.requirements.extended.image.sparse_tiling_optimal
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:16 +00:00
Paulo Zanoni
e69c7cd149 anv/sparse: fix block_size_B when the image is multi-sampled
This is all that's needed to make anv_sparse_bind_image_memory() work
with multi-sampled images.

The assert() we just added would have been really helpful when
debugging this.

All the dEQP tests with "sparse" in their names are passing *even*
without this patch. Real-world applications show very clear visual
corruption for sparse MSAA images bound through non-opaque binds since
only a fraction of the the actual image ends up being bound.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:15 +00:00
Paulo Zanoni
6d748f5b2c anv/sparse: reject all sample flags that non-sparse doesn't support
We call anv_get_image_format_properties() from
anv_GetPhysicalDeviceSparseImageFormatProperties2() because we want to
reject all images that we don't support for the non-sparse case. That
function does not take sample counts as its input, it outputs a list
of possible sample counts. In this patch we check the sample counts it
outputs: if what the user is querying isn't even supported by
non-sparse, reject it right away.

That saves us from having to code in anv_sparse_image_check_support()
cases that are coded elsewhere. Examples include: 1D images and
compressed formats.

This change affects a number of dEQP tests, including:
  - dEQP-VK.api.info.sparse_image_format_properties2.1d.optimal.r4g4b4a4_unorm_pack16
  - dEQP-VK.api.info.sparse_image_format_properties2.2d.optimal.bc2_srgb_block

Without this patch, and with sparse multi-sampling enabled, this would
hit the following assertion:
  anv_formats.c:1903: anv_GetPhysicalDeviceSparseImageFormatProperties2: Assertion `false' failed.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:15 +00:00
Paulo Zanoni
620f1d1a7a anv/sparse: properly reject sample counts we don't support
Yes, I understand that this looks like the kind of check that the
applications should be doing instead of us, but if we don't that, dEQP
will have failures. If we claim support for any multi-sampled sparse
feature, dEQP will try to create multi-sampled sparse images with all
possible sample counts, including the ones supported by non-sparse but
not supported by sparse (x8 and x16 on Tile64 platforms) and also the
ones not supported at all, like x32 and x64.

This change affects a number of dEQP tests, including:
  - dEQP-VK.api.info.sparse_image_format_properties2.2d.optimal.r32g32_sfloat

Without this patch, and with sparse multi-sampling enabled, this would
hit the following assertion:
  anv_sparse.c:866: anv_sparse_calc_image_format_properties: Assertion `is_standard || is_known_nonstandard_format' failed.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:15 +00:00
Paulo Zanoni
af725a2ccc anv/sparse: we can't do multi-sampled depth/stencil sparse images
Our hardware has more than one layout for multi-sampled images that
use the tiling formats that give us the sparse standard block shapes:
see enum isl_msaa_layout. Only the layout we use for colored images is
compatible with the standard block shapes, so it's the only one we can
expose for multi-sampled sparse.

This change affects a number of dEQP tests, including:
  - dEQP-VK.memory.requirements.create_info.image.sparse_residency_aliased_tiling_optimal

Without this patch, and with sparse multi-sampling enabled, this test
would hit the following assertion:
  anv_sparse.c:866: anv_sparse_calc_image_format_properties: Assertion `is_standard || is_known_nonstandard_format' failed.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:15 +00:00
Paulo Zanoni
6d38801ebd anv/sparse: add the MSAA block shape tables
We're not enabling sparse on multi-sampled images yet, but having the
table here is a first step. The current approach should make the code
a little more compact.

These tables are in section 33.4.3: Standard Sparse Image Block Shapes
of the Vulkan 1.3 spec.

PS: I know we've questioned the need for us to have these tables here
as they are something dEQP should check, but I've hit the "this shape
is not standard" assertion multiple times during development of the
various sparse features, and that really helps narrowing down the
problems. For example, see the next 2 patches in this MR.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:15 +00:00
Paulo Zanoni
66b6671d3c isl: add ISL_TILING_64_XE2 to isl_tiling_to_name()
Fixes: c69650a95e ("isl,blorp,anv: introduce ISL_TILING_64_XE2 for Xe2+ platforms")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27306>
2024-05-15 08:00:15 +00:00
Marek Olšák
90b0925588 radeonsi: constify struct pipe_vertex_buffer *
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:34 +00:00
Marek Olšák
283f8af976 radeonsi/ci: remove some gfx11 flakes
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:34 +00:00
Marek Olšák
f237f497eb radeonsi/ci: update failures for all generations
This also removes ASTC failures fixed by:
    https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28917

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:34 +00:00
Marek Olšák
87fd149bd8 radeonsi/ci: fix caselists for vk-gl-cts/main
The files were moved in the repo.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:34 +00:00
Marek Olšák
b91220a825 radeonsi: remove slow code from si_msaa_resolve_blit_via_CB
This is mainly a cleanup. It wasn't faster.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:33 +00:00
Marek Olšák
b771d13557 radeonsi: replace the clear_12bytes_buffer shader with the DMA compute shader
It can handle 12-byte clear values with these trivial changes.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:33 +00:00
Marek Olšák
995e7d927c radeonsi: use set_work_size for all internal compute dispatches
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:33 +00:00
Marek Olšák
83d8b3bc1a radeonsi: simplify the complex clear/copy_buffer shader
Remove the logic that we don't need. In a future commit, it will be
extended to optimize aspects of buffer clears and copies that need to be
optimized.

Changes:
- remove the logic that generated multiple loads/stores per thread,
  only 1 load and store can occur in the shader now, allowing clearing/
  copying max 4 dwords per thread
- put the src buffer in SSBO slot 0, and the dst buffer in SSBO slot 1

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:33 +00:00
Marek Olšák
92497d1c8f radeonsi: minor simplifications of clear/copy_buffer shaders
- always use L2_LRU (never use ACCESS_NON_TEMPORAL) - for better perf
- never use ACCESS_COHERENT because the address might not be aligned to
  a cache line
- assume the wave size is always 64

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:33 +00:00
Marek Olšák
81c90cded0 radeonsi: get NIR options from si_screen instead of calling get_compiler_options
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:33 +00:00
Marek Olšák
56f2cc2277 radeonsi/gfx11: use a lighter workaround for Navi31 dEQP failures
This passes tests.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:33 +00:00
Marek Olšák
602dd4c601 radeonsi: set flags directly instead of having needs_db_flush
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:33 +00:00
Marek Olšák
5ebe75fab1 radeonsi: remove GDS tests
They were useful in the past. Not anymore.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:33 +00:00
Marek Olšák
0e546fb683 radeonsi: validate the buffer range in si_set_shader_buffer
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:33 +00:00
Marek Olšák
1d3dbb2bef radeonsi: fix the size of the query result SSBO
This was harmless because the shader writes only 4 bytes if the type has
32 bits.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:33 +00:00
Marek Olšák
96cf96f611 radeonsi: serialize shader disassembly string to fix asm dumps for ACO
Shaders loaded from the shader cache should be printable. Before this,
sometimes only "(null)" was printed.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:33 +00:00
Marek Olšák
573b2b813a ac/llvm: improve/simplify/fix load_ssbo
Effects:
- multi-component subdword handling removed because it's lowered
- 3-dword loads selected correctly instead of 4-dword loads
- the failure of dEQP-GLES3.functional.buffer.copy.subrange.large_to_small
  due to LLVM exposed by a future commit is mysteriously fixed by this

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
2024-05-15 06:42:33 +00:00
Tapani Pälli
197f99dc70 ci: update failures list with angle for jsl, tgl
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19414>
2024-05-15 04:45:55 +00:00
Tapani Pälli
7dcea9dd7b docs/features: add VK_EXT_legacy_dithering
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19414>
2024-05-15 04:45:55 +00:00
Tapani Pälli
2ac5e70fae anv: VK_EXT_legacy_dithering support
Toggle on dithering if it has been enabled on device and is set on the
rendering flags used.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19414>
2024-05-15 04:45:55 +00:00
Tapani Pälli
e7ce48557a vulkan/runtime: add a subpass bit for legacy dithering
v2: use bit only when dithering enabled on device

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19414>
2024-05-15 04:45:55 +00:00
Valentine Burley
826d467e40 tu: Change commas to semicolons in VK_EXT_map_memory_placed features
Semicolons should be used for device features.

Fixes: 220dae5870 ("tu: Implement VK_EXT_map_memory_placed")

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29206>
2024-05-15 02:08:29 +00:00
Valentine Burley
03d8620c4c tu: Add missing VK_EXT_legacy_vertex_attributes feature
This was missed during enablement.

Fixes: 660a47ecbf ("tu: support VK_EXT_legacy_vertex_attributes")

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29206>
2024-05-15 02:08:29 +00:00
Chia-I Wu
59babe9fa0 radv: make radv_pipeline_has_ngg static
radv_pipeline_has_ngg has no external user anymore.  Also remove the
unused radv_pipeline_has_gs_copy_shader.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29200>
2024-05-14 23:42:25 +00:00
Chia-I Wu
be391fdb33 radv: check gs_copy_shader directly for executable props
The pipeline could be a graphics pipeline library and
radv_pipeline_to_graphics would assert on debug builds.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29200>
2024-05-14 23:42:25 +00:00
Iván Briano
a9f24fb5f1 intel/brw: fix subgroup size of geometry stages for lnl+
Fixes dEQP-VK.subgroups.size_control.*allow_varying_subgroup_size* and
maybe others checking subgroup size.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29177>
2024-05-14 23:13:37 +00:00
David Heidelberg
a28a289374 ci/freedreno: update expectations from the nightly run
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28323>
2024-05-14 21:16:55 +00:00
David Heidelberg
96ad012878 freedreno/ci: Implement nightly piglit job for Adreno 630 and 618
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28323>
2024-05-14 21:16:55 +00:00
David Heidelberg
0e5a567523 freedreno/ci: Drop duplicated include and add missing stages
The .collabora-freedreno-rules are overriten by
.collabora-freedreno-turnip-rules which already includes these rules.

Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28323>
2024-05-14 21:16:55 +00:00
Rob Clark
926865580e freedreno/ci: Increase a630/a618 piglit fraction
After dropping obsolete skips, the piglit jobs take too long to run, so
switch to 1-in-3 fractional runs.

TODO we need nightly full runs

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28323>
2024-05-14 21:16:55 +00:00