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radeonsi: get NIR options from si_screen instead of calling get_compiler_options
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
This commit is contained in:
parent
56f2cc2277
commit
81c90cded0
1 changed files with 23 additions and 59 deletions
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@ -115,10 +115,8 @@ void *si_create_copy_image_cs(struct si_context *sctx, unsigned wg_dim,
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void *si_create_dcc_retile_cs(struct si_context *sctx, struct radeon_surf *surf)
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{
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const nir_shader_compiler_options *options =
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sctx->b.screen->get_compiler_options(sctx->b.screen, PIPE_SHADER_IR_NIR, PIPE_SHADER_COMPUTE);
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, options, "dcc_retile");
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, sctx->screen->nir_options,
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"dcc_retile");
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b.shader->info.workgroup_size[0] = 8;
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b.shader->info.workgroup_size[1] = 8;
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b.shader->info.workgroup_size[2] = 1;
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@ -163,10 +161,8 @@ void *si_create_dcc_retile_cs(struct si_context *sctx, struct radeon_surf *surf)
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void *gfx9_create_clear_dcc_msaa_cs(struct si_context *sctx, struct si_texture *tex)
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{
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const nir_shader_compiler_options *options =
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sctx->b.screen->get_compiler_options(sctx->b.screen, PIPE_SHADER_IR_NIR, PIPE_SHADER_COMPUTE);
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, options, "clear_dcc_msaa");
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, sctx->screen->nir_options,
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"clear_dcc_msaa");
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b.shader->info.workgroup_size[0] = 8;
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b.shader->info.workgroup_size[1] = 8;
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b.shader->info.workgroup_size[2] = 1;
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@ -210,11 +206,8 @@ void *gfx9_create_clear_dcc_msaa_cs(struct si_context *sctx, struct si_texture *
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/* Create a compute shader implementing clear_buffer or copy_buffer. */
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void *si_create_clear_buffer_rmw_cs(struct si_context *sctx)
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{
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const nir_shader_compiler_options *options =
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sctx->b.screen->get_compiler_options(sctx->b.screen, PIPE_SHADER_IR_NIR, PIPE_SHADER_COMPUTE);
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nir_builder b =
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nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, options, "clear_buffer_rmw_cs");
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, sctx->screen->nir_options,
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"clear_buffer_rmw_cs");
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b.shader->info.workgroup_size[0] = 64;
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b.shader->info.workgroup_size[1] = 1;
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b.shader->info.workgroup_size[2] = 1;
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@ -251,10 +244,6 @@ void *si_create_clear_buffer_rmw_cs(struct si_context *sctx)
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*/
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void *si_create_passthrough_tcs(struct si_context *sctx)
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{
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const nir_shader_compiler_options *options =
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sctx->b.screen->get_compiler_options(sctx->b.screen, PIPE_SHADER_IR_NIR,
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PIPE_SHADER_TESS_CTRL);
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unsigned locations[PIPE_MAX_SHADER_OUTPUTS];
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struct si_shader_info *info = &sctx->shader.vs.cso->info;
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@ -262,9 +251,8 @@ void *si_create_passthrough_tcs(struct si_context *sctx)
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locations[i] = info->output_semantic[i];
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}
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nir_shader *tcs =
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nir_create_passthrough_tcs_impl(options, locations, info->num_outputs,
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sctx->patch_vertices);
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nir_shader *tcs = nir_create_passthrough_tcs_impl(sctx->screen->nir_options, locations,
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info->num_outputs, sctx->patch_vertices);
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return create_shader_state(sctx, tcs);
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}
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@ -611,10 +599,7 @@ void *si_clear_render_target_shader(struct si_context *sctx, enum pipe_texture_t
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*/
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void *si_clear_image_dcc_single_shader(struct si_context *sctx, bool is_msaa, unsigned wg_dim)
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{
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const nir_shader_compiler_options *nir_options =
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sctx->b.screen->get_compiler_options(sctx->b.screen, PIPE_SHADER_IR_NIR, PIPE_SHADER_COMPUTE);
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, nir_options,
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, sctx->screen->nir_options,
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"write_clear_color_dcc_single");
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b.shader->info.num_images = 1;
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if (is_msaa)
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@ -650,11 +635,8 @@ void *si_clear_image_dcc_single_shader(struct si_context *sctx, bool is_msaa, un
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void *si_clear_12bytes_buffer_shader(struct si_context *sctx)
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{
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const nir_shader_compiler_options *options =
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sctx->b.screen->get_compiler_options(sctx->b.screen, PIPE_SHADER_IR_NIR, PIPE_SHADER_COMPUTE);
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nir_builder b =
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nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, options, "clear_12bytes_buffer");
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, sctx->screen->nir_options,
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"clear_12bytes_buffer");
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b.shader->info.workgroup_size[0] = 64;
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b.shader->info.workgroup_size[1] = 1;
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b.shader->info.workgroup_size[2] = 1;
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@ -671,16 +653,13 @@ void *si_clear_12bytes_buffer_shader(struct si_context *sctx)
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void *si_create_ubyte_to_ushort_compute_shader(struct si_context *sctx)
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{
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const nir_shader_compiler_options *options =
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sctx->b.screen->get_compiler_options(sctx->b.screen, PIPE_SHADER_IR_NIR, PIPE_SHADER_COMPUTE);
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unsigned store_qualifier = ACCESS_COHERENT | ACCESS_RESTRICT;
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/* Don't cache loads, because there is no reuse. */
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unsigned load_qualifier = store_qualifier | ACCESS_NON_TEMPORAL;
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nir_builder b =
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nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, options, "ubyte_to_ushort");
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, sctx->screen->nir_options,
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"ubyte_to_ushort");
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unsigned default_wave_size = si_determine_wave_size(sctx->screen, NULL);
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@ -706,9 +685,6 @@ void *si_create_dma_compute_shader(struct si_context *sctx, unsigned num_dwords_
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{
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assert(util_is_power_of_two_nonzero(num_dwords_per_thread));
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const nir_shader_compiler_options *options =
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sctx->b.screen->get_compiler_options(sctx->b.screen, PIPE_SHADER_IR_NIR, PIPE_SHADER_COMPUTE);
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unsigned store_qualifier = ACCESS_COHERENT | ACCESS_RESTRICT;
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if (dst_stream_cache_policy)
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store_qualifier |= ACCESS_NON_TEMPORAL;
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@ -716,8 +692,8 @@ void *si_create_dma_compute_shader(struct si_context *sctx, unsigned num_dwords_
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/* Don't cache loads, because there is no reuse. */
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unsigned load_qualifier = store_qualifier | ACCESS_NON_TEMPORAL;
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nir_builder b =
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nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, options, "create_dma_compute");
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, sctx->screen->nir_options,
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"create_dma_compute");
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unsigned default_wave_size = si_determine_wave_size(sctx->screen, NULL);
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@ -792,11 +768,8 @@ void *si_create_dma_compute_shader(struct si_context *sctx, unsigned num_dwords_
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*/
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void *si_create_fmask_expand_cs(struct si_context *sctx, unsigned num_samples, bool is_array)
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{
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const nir_shader_compiler_options *options =
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sctx->b.screen->get_compiler_options(sctx->b.screen, PIPE_SHADER_IR_NIR, PIPE_SHADER_COMPUTE);
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nir_builder b =
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nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, options, "create_fmask_expand_cs");
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, sctx->screen->nir_options,
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"create_fmask_expand_cs");
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b.shader->info.workgroup_size[0] = 8;
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b.shader->info.workgroup_size[1] = 8;
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b.shader->info.workgroup_size[2] = 1;
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@ -878,11 +851,8 @@ void *si_get_blitter_vs(struct si_context *sctx, enum blitter_attrib_type type,
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if (sctx->gfx_level >= GFX11 && type != UTIL_BLITTER_ATTRIB_NONE)
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vs_blit_property++;
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const nir_shader_compiler_options *options =
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sctx->b.screen->get_compiler_options(sctx->b.screen, PIPE_SHADER_IR_NIR, PIPE_SHADER_VERTEX);
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nir_builder b =
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nir_builder_init_simple_shader(MESA_SHADER_VERTEX, options, "get_blitter_vs");
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_VERTEX, sctx->screen->nir_options,
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"get_blitter_vs");
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/* Tell the shader to load VS inputs from SGPRs: */
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b.shader->info.vs.blit_sgprs_amd = vs_blit_property;
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@ -950,11 +920,8 @@ void *si_get_blitter_vs(struct si_context *sctx, enum blitter_attrib_type type,
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*/
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void *si_create_query_result_cs(struct si_context *sctx)
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{
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const nir_shader_compiler_options *options =
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sctx->b.screen->get_compiler_options(sctx->b.screen, PIPE_SHADER_IR_NIR, PIPE_SHADER_COMPUTE);
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nir_builder b =
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nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, options, "create_query_result_cs");
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, sctx->screen->nir_options,
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"create_query_result_cs");
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b.shader->info.workgroup_size[0] = 1;
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b.shader->info.workgroup_size[1] = 1;
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b.shader->info.workgroup_size[2] = 1;
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@ -1327,11 +1294,8 @@ void *si_create_query_result_cs(struct si_context *sctx)
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*/
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void *gfx11_create_sh_query_result_cs(struct si_context *sctx)
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{
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const nir_shader_compiler_options *options =
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sctx->b.screen->get_compiler_options(sctx->b.screen, PIPE_SHADER_IR_NIR, PIPE_SHADER_COMPUTE);
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nir_builder b =
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nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, options, "gfx11_create_sh_query_result_cs");
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nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, sctx->screen->nir_options,
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"gfx11_create_sh_query_result_cs");
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b.shader->info.workgroup_size[0] = 1;
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b.shader->info.workgroup_size[1] = 1;
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b.shader->info.workgroup_size[2] = 1;
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