fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-01-06 11:00:11 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

radeonsi: constify struct pipe_vertex_buffer *

Browse source 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29053>
This commit is contained in:
Marek Olšák 2024-01-29 22:27:42 -05:00 • committed by Marge Bot
parent 283f8af976
commit 90b0925588
3 changed files with 6 additions and 6 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
src/gallium/drivers/radeonsi/si_state.h
View file

@ -690,7 +690,7 @@ void si_update_tess_io_layout_state(struct si_context *sctx);
void si_cp_dma_prefetch(struct si_context *sctx, struct pipe_resource *buf,
unsigned offset, unsigned size);
void si_set_vertex_buffer_descriptor(struct si_screen *sscreen, struct si_vertex_elements *velems,
struct pipe_vertex_buffer *vb, unsigned element_index,
const struct pipe_vertex_buffer *vb, unsigned element_index,
uint32_t *out);
void si_emit_buffered_compute_sh_regs(struct si_context *sctx);
void si_init_draw_functions_GFX6(struct si_context *sctx);

8
src/gallium/drivers/radeonsi/si_state_draw.cpp
View file

@ -1696,7 +1696,7 @@ static void si_emit_draw_packets(struct si_context *sctx, const struct pipe_draw
/* Return false if not bound. */
template<amd_gfx_level GFX_VERSION>
static void ALWAYS_INLINE si_set_vb_descriptor(struct si_vertex_elements *velems,
struct pipe_vertex_buffer *vb,
const struct pipe_vertex_buffer *vb,
unsigned index, /* vertex element index */
uint32_t *desc) /* where to upload descriptors */
{
@ -1727,7 +1727,7 @@ static void ALWAYS_INLINE si_set_vb_descriptor(struct si_vertex_elements *velems
#if GFX_VER == 6 /* declare this function only once because it supports all chips. */
void si_set_vertex_buffer_descriptor(struct si_screen *sscreen, struct si_vertex_elements *velems,
struct pipe_vertex_buffer *vb, unsigned element_index,
const struct pipe_vertex_buffer *vb, unsigned element_index,
uint32_t *out)
{
switch (sscreen->info.gfx_level) {
@ -1891,7 +1891,7 @@ static bool si_upload_and_prefetch_VB_descriptors(struct si_context *sctx,
/* the first iteration always executes */
do {
unsigned vbo_index = velems->vertex_buffer_index[i];
struct pipe_vertex_buffer *vb = &sctx->vertex_buffer[vbo_index];
const struct pipe_vertex_buffer *vb = &sctx->vertex_buffer[vbo_index];
uint32_t *desc;
radeon_emit_array_get_ptr(4, &desc);
@ -1906,7 +1906,7 @@ static bool si_upload_and_prefetch_VB_descriptors(struct si_context *sctx,
/* the first iteration always executes */
do {
unsigned vbo_index = velems->vertex_buffer_index[i];
struct pipe_vertex_buffer *vb = &sctx->vertex_buffer[vbo_index];
const struct pipe_vertex_buffer *vb = &sctx->vertex_buffer[vbo_index];
uint32_t *desc = &ptr[(i - num_vbos_in_user_sgprs) * 4];
si_set_vb_descriptor<GFX_VERSION>(velems, vb, i, desc);

2
src/gallium/drivers/radeonsi/si_state_shaders.cpp
View file

@ -2297,7 +2297,7 @@ void si_vs_key_update_inputs(struct si_context *sctx)
unsigned i = u_bit_scan(&mask);
unsigned log_hw_load_size = 1 + ((elts->hw_load_is_dword >> i) & 1);
unsigned vbidx = elts->vertex_buffer_index[i];
struct pipe_vertex_buffer *vb = &sctx->vertex_buffer[vbidx];
const struct pipe_vertex_buffer *vb = &sctx->vertex_buffer[vbidx];
unsigned align_mask = (1 << log_hw_load_size) - 1;
if (vb->buffer_offset & align_mask) {
fix |= 1 << i;