Commit graph

83004 commits

Author SHA1 Message Date
Kenneth Graunke
586f4a42e7 glsl: Propagate invariant/precise after lowering const arrays.
The new uniform may need precise as well.

Fixes copy propagation of constant array uniforms in Tomb Raider shaders.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-06-23 11:58:50 -07:00
Kenneth Graunke
c264fdbc07 glsl: Split arrays even in the presence of whole-array copies.
Previously, we failed to split constant arrays.  Code such as

   int[2] numbers = int[](1, 2);

would generates a whole-array assignment:

  (assign () (var_ref numbers)
             (constant (array int 4) (constant int 1) (constant int 2)))

opt_array_splitting generally tried to visit ir_dereference_array nodes,
and avoid recursing into the inner ir_dereference_variable.  So if it
ever saw a ir_dereference_variable, it assumed this was a whole-array
read and bailed.  However, in the above case, there's no array deref,
and we can totally handle it - we just have to "unroll" the assignment,
creating assignments for each element.

This was mitigated by the fact that we constant propagate whole arrays,
so a dereference of a single component would usually get the desired
single value anyway.  However, I plan to stop doing that shortly;
early experiments with disabling constant propagation of arrays
revealed this shortcoming.

This patch causes some arrays in Gl32GSCloth's geometry shaders to be
split, which allows other optimizations to eliminate unused GS inputs.
The VS then doesn't have to write them, which eliminates the entire VS
(5 -> 2 instructions).  It still renders correctly.

No other change in shader-db.

v2: Drop !AOA check and improve a comment (feedback from Tim Arceri).

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-06-23 11:58:50 -07:00
Kenneth Graunke
acf5444044 glsl: Make constant propagation's folder not propagate into an LHS.
opt_constant_propagation.cpp contains constant folding code which can
actually do constant propagation in some cases.  It was happily
propagating constants into the left-hand-side of assignments.

For example,

   (assign () (var_ref temp) (constant ...))

would brilliantly be turned into:

   (assign () (constant ...) (constant ....))

This is a bigger hammer than necessary - it prevents propagation
into the left-hand-side altogether.  We could certainly do better
someday.  Notably, the constant propagation pass itself already
takes this approach - it's just the constant propagation pass's
built-in constant folding code (which actually propagates, too)
that was broken.

No change in shader-db, but prevents regressions after future commits.
It seems plausible that this could be hit today, but I haven't seen it
happen.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-06-23 11:58:50 -07:00
Topi Pohjolainen
3487d2e7bf i965/blorp: Disable vertex element swizzling
Without vertex elements originating directly from vertex fetcher
are not passed to wm-state correctly.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-06-23 21:39:09 +03:00
Topi Pohjolainen
12783aac50 i965/blorp: Let program data tell if push constants are needed
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-06-23 21:39:09 +03:00
Topi Pohjolainen
874f2e9523 i965/blorp: Use prog data counters to guide wm/ps setup
just as core upload logic does.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-06-23 21:39:09 +03:00
Topi Pohjolainen
f5e8575ab4 i965/blorp: Use prog data counters to guide sf/sbe setup
just as core upload logic does.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-06-23 21:39:09 +03:00
Ardinartsev Nikita
01c89ccc5d i965: Avoid division by zero.
Fixes regression introduced by af5ca43f26

Cc: "12.0 11.2" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95419
2016-06-23 10:08:58 -07:00
Tim Rowley
a16d274032 swr: [rasterizer core] fix dependency bug
Never be dependent on "draw 0", instead have a bool that makes the draw
dependent on the previous draw or not dependent at all.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-23 10:51:11 -05:00
Tim Rowley
73a9154bde swr: [rasterizer core] use wrap-around safe compares for dependency checking
Move drawIDs from 64-bit to 32-bit to increase perf.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-23 10:51:06 -05:00
Tim Rowley
dd189536dc swr: [rasterizer jitter] add support for component packing for 'odd' formats
Add early-out if no components are enabled. Add asserts.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-23 10:51:00 -05:00
Tim Rowley
35935ca4f2 swr: [rasterizer core] track whether GS outputs viewport array index
So we can skip the index gather in PA.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-23 10:50:55 -05:00
Tim Rowley
2d80295a6e swr: [rasterizer core] GS viewport array index attribute
Only adds the attribute mapping to the jitter; no implementation yet.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-23 10:50:47 -05:00
Tim Rowley
c7cd33b605 swr: [rasterizer core] conservative rasterization frontend support
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-23 10:50:41 -05:00
Tim Rowley
c867c22d85 swr: [rasterizer core] stop single threaded crash exit crash
Function static destructors were getting called by exit
handlers before context teardown.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-23 10:50:36 -05:00
Tim Rowley
0f025eb478 swr: [rasterizer jitter] small fetch jit cleanup
Handle SGV stores separate from the stream fetch code.

Because of this change, there is a potential to jit an extra unused store.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-23 10:50:30 -05:00
Tim Rowley
eca877f27b swr: [rasterizer core] remove old comment
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-23 10:50:25 -05:00
Tim Rowley
d3d97f8395 swr: [rasterizer jitter] cleanup supporting different llvm versions
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-23 10:50:19 -05:00
Tim Rowley
42215e6116 swr: [rasterizer jitter] unitialized component fix in fetch jit
Was trying to store an extra uninitialized component.
Only affects component packing, which isn't enabled (yet).

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-23 10:50:12 -05:00
Tim Rowley
b6d2c96851 swr: [rasterizer] add support for building avx512 version
Currently, most code paths between AVX2 and AVX512 are identical
(see changes to knobs.h).

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-23 10:50:05 -05:00
Tim Rowley
695af2a7e2 swr: [rasterizer common] fix include for Intel compiler
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-23 10:49:59 -05:00
Tim Rowley
95f21a9766 swr: [rasterizer common] workaround clang for windows __cpuid() bug
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-23 10:49:46 -05:00
Tim Rowley
9ca741c645 swr: push/pop DEBUG macro around llvm includes
llvm redefines DEBUG; adding push/pop prevents a undefined reference
to debug_refcnt_state in llvm-3.7+.

v2: add undef DEBUG

Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2016-06-23 09:58:08 -05:00
Jose Fonseca
805dbdf06d include: Require MSVC 2013 Update 4.
Earlier MSVC 2013 releases have troubles compiling some of our C99 code,
so make sure we have Update 4 to avoid confusion.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-06-23 15:07:19 +01:00
Brian Paul
4f5d513755 svga: rename svga_surface_copy() to svga_resource_copy_region()
To be consistent with the pipe_context function name.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2016-06-23 07:31:20 -06:00
Brian Paul
743ff588f2 svga: don't copy blit_info into local var
There's no reason for doing so.

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2016-06-23 07:31:20 -06:00
Brian Paul
e0dc3c5f19 gallium/util: fix some 4-space indentation in blitter code
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Charmaine Lee <charmainel@vmware.com>
2016-06-23 07:31:20 -06:00
Charmaine Lee
2aa9ff0cda svga: fix texture array update regression
With commit fb9fe35, we start using transfer_inline_write
for memcpy TexSubImage path, but that triggers a regression with
texture array in the svga driver.

With this patch, the direct map code will update the texture array
correctly.

Fixes VMware bug 1679293.

Tested with MTT piglit, glretrace, conform.

Reviewed-by: Brian Paul <brianp@vmware.com>
2016-06-23 07:31:20 -06:00
Charmaine Lee
d4a77254cb svga: fix index/vertex buffer surface reference at draw
Currently with the SetVertexBuffers optimization, we avoid emitting
redundant DXSetVertexBuffers commands. However, these buffers surfaces
will still need to be referenced, otherwise, in the case of linux,
the subsequent surface discard map will map to the existing mob instead
of a new one, causing rendering artifacts.

With this patch, we'll call resource_rebind() to reference the resources
even if we are avoiding the actual set command. This fixes the
rendering artifacts in the window title area running with unity in
Ubuntu 14.04

Tested with piglit, glretrace.

Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2016-06-23 07:31:20 -06:00
Charmaine Lee
2b81e31d44 svga: fix vertex buffer references in the hw state
This patch fixes three issues with vertex buffer references:
(1) Instead of copy the vertex buffer resource handles to the hw state
    in the context structure, use pipe_resource_reference to properly
    reference the vertex buffer resources in the context.

(2) Make sure to unbind those unused vertex buffer resources.

(3) Force to rebind the vertex buffer resources at the first draw of each
    command buffer to make sure the vertex buffer resources are paged in.

Reviewed-by: Brian Paul <brianp@vmware.com>
2016-06-23 07:31:20 -06:00
Charmaine Lee
a1d74f5528 svga: fix index buffer reference in the hw state
Instead of copy the index buffer resource handle to the hw state in
the context structure, use pipe_resource_reference to properly reference
the index buffer resource in the context.

Reviewed-by: Brian Paul <brianp@vmware.com>
2016-06-23 07:31:19 -06:00
Timothy Arceri
ab99196b6b glsl/mesa: stop duplicating geom and tcs layout values
We already store these in gl_shader and gl_program here we
remove it from gl_shader_program and just use the values
from gl_shader.

This will allow us to keep the shader cache restore code as
simple as it can be while making it somewhat clearer where these
values originate from.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-06-23 11:01:46 +10:00
Timothy Arceri
24b3be0938 glsl/mesa: stop duplicating tes layout values
We already store this in gl_shader and gl_program here we
remove it from gl_shader_program and just use the values
from gl_shader.

This will allow us to keep the shader cache restore code as
simple as it can be while making it somewhat clearer where these
values originate from.

V2: remove unnecessary NULL check

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Iago Toral <itoral@igalia.com>
2016-06-23 11:01:36 +10:00
Edward O'Callaghan
f3ae370a36 .mailmap: Fixup my email address
Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
2016-06-23 00:00:46 +02:00
Christian Gmeiner
22304554a2 st/mesa: expose EXT_vertex_array_bgra when supported by backend
Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-06-22 12:46:08 -07:00
Jason Ekstrand
c2f2c8e407 anv: Use different BOs for different scratch sizes and stages
This solves a race condition where we can end up having different stages
stomp on each other because they're all trying to scratch in the same BO
but they have different views of its layout.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:39:45 -07:00
Jason Ekstrand
45c0f60999 genxml: Make ScratchSpaceBasePointer an address instead of an offset
While we're here, we also fixup MEDIA_VFE_STATE and rename the field in
3DSTATE_VS on gen6-7.5 to be consistent with the others.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:39:42 -07:00
Jason Ekstrand
966bed17c1 anv: Add an allocator for scratch buffers
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:39:20 -07:00
Jason Ekstrand
89ded099f8 genxml: Put append counter fields before MCS in RENDER_SURFACE_STATE on gen7
The pack header generation scripts can't handle the case where you have
two addresses in the same dword; they just take whatever is the last one.
This meant that the MCS address wasn't properly getting handled.  Since we
don't care about append counters, we can just re-arrange the XML for now.

Reviewed-by: Chad Versace <chad.versace@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:26:43 -07:00
Jason Ekstrand
d82322eb18 anv,isl: Lower storage image formats in anv
ISL was being a bit too clever for its own good and lowering the format for
us.  This is all well and good *if* we always want to lower it.  However,
the GL driver selectively lowers the format depending on whether the
surface is write-only or not.

Reviewed-by: Chad Versace <chad.versace@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:26:43 -07:00
Jason Ekstrand
97f12773b8 isl/state: Allow for full 31-bit buffer texture sizes
Ivy Bridge and above can handle up to 2^31 elements for RAW buffer
surfaces.

Reviewed-by: Chad Versace <chad.versace@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:26:43 -07:00
Jason Ekstrand
bb64e666ba isl/state: Don't use designated initializers for buffer surface state
Reviewed-by: Chad Versace <chad.versace@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:26:43 -07:00
Jason Ekstrand
4061fde66e isl/state: Add assertions for buffer surface restrictions
Acked-by: Chad Versace <chad.versace@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:26:43 -07:00
Jason Ekstrand
ce24097abe isl/state: Don't set SurfacePitch for gen9 1-D textures
This field is ignored by the hardware in this case and, on very large 1-D
textures, it can end up being larger than the maximum allowed value.

Reviewed-by: Chad Versace <chad.versace@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:26:43 -07:00
Jason Ekstrand
f47e23a8b6 isl/state: Use TILEWALK_XMAJOR for linear surfaces on gen7
This matches better what happens on gen8 where the "Tiled Surface" and
"Tile Walke" bits are combined into a single two-bit value.  This is also
more consistent with what the GL driver does.

Reviewed-by: Chad Versace <chad.versace@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:26:43 -07:00
Jason Ekstrand
96706bad5f isl/state: Emit no-op mip tail setup on SKL
This hasn't ever been a problem in the past but it is recommended by the
hardware docs.

Reviewed-by: Chad Versace <chad.versace@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:26:43 -07:00
Jason Ekstrand
14d7c16e50 isl/state: Only set cube face enables if usage includes CUBE_BIT
It seems safe to set it all the time, but this reduces the diff between
the way i965 does it and what ISL does.

Reviewed-by: Chad Versace <chad.versace@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:26:43 -07:00
Jason Ekstrand
5d24e9cfa1 isl/state: Use the layout for computing qpitch rather than dimensions
For depth/stencil 1-D textures on SKL, we want them layed out in the old
format that has been used since gen4.  In order for the surface state
fill-out code to handle, this it needs to distinguish based on layout
rather than just dimensionality.

Reviewed-by: Chad Versace <chad.versace@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:26:43 -07:00
Jason Ekstrand
6a43204afa isl/state: Set the IntegerSurfaceFormat bit on Haswell
This fixes 688 Vulkan CTS tests on Haswell.

Reviewed-by: Chad Versace <chad.versace@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:26:43 -07:00
Jason Ekstrand
324103da75 isl/format: Mark R9G9B9E5 as containing 9-bit unsigned float channels
Reviewed-by: Chad Versace <chad.versace@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
2016-06-22 12:26:43 -07:00