Commit graph

562 commits

Author SHA1 Message Date
Tapani Pälli
7d4c23991a intel/blorp: remove unused blorp batch flag
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28623>
2024-04-10 05:38:24 +00:00
Rohan Garg
afb63443a0 intel/blorp: add fast clear rectangle dimensions for single sampled TILE64 CCS surfaces
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23030>
2024-04-04 02:17:34 +00:00
Lionel Landwerlin
a147ccaa5c blorp: add support for cached dynamic states
Of the dynamic states we have blorp reemit for each operations, a few
actually never change :
   * BLEND_STATE (it looks like it does, but actually for anv no)
   * COLOR_CALC_STATE
   * CC_VIEWPORT
   * SAMPLER_STATE

We add infrastructure here to upload into the driver and retrieve the
state offset later.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28368>
2024-03-28 02:41:50 +00:00
Lionel Landwerlin
1d7c38a5de blorp: handle a few allocation failure cases
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28387>
2024-03-26 12:59:37 +00:00
Rohan Garg
9628723943 anv,blorp: implement restrictions from WA 1406738321
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23632>
2024-03-21 18:28:27 +00:00
Francisco Jerez
644a0ede1e intel/blorp/xe2+: Don't use replicated-data clears.
They've been removed from the hardware.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28306>
2024-03-20 15:46:44 -07:00
Lionel Landwerlin
194afe8416 anv/iris/blorp: use the right MOCS values for each engine
There are multiple problems currently :

   - blorp blitter commands overwrite the protection value coming from
     the driver
   - anv & iris are using render target MOCS for compute commands

Driver already have the ability to pass the MOCS values so we choose
to stick to that in this change. But now the driver need to select the
right MOCS depending on the engine the commands are going to run onto.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27956>
2024-03-06 20:33:12 +00:00
Rohan Garg
731ffa0737 anv, blorp: Set COMPUTE_WALKER Message SIMD field
Fixes: d95bbf35 ('anv: Set COMPUTE_WALKER Message SIMD field')
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27983>
2024-03-06 10:58:27 +00:00
Caio Oliveira
c11d7743b3 intel/blorp: Remove Gfx8- references in BRW code
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27691>
2024-02-28 05:45:37 +00:00
Tapani Pälli
1a4f220c29 intel/blorp: disable use of REP16 independent of format
Previously we were optimistic and tied this to certain format but wa
description lists other formats and bspec clearly disallows the usage.

Issue can be seen with different 16bpp tests, effect looks a bit like
dithering pattern but it is not, it is just rep16 failing.

Fixes:
   GTF-GL46.gtf42.GL3Tests.texture_storage.texture_storage_texture_as_framebuffer_attachment

on DG2 and MTL, some 565 EGL tests on Android and internal issue on game
that displays a dither like pattern on the background while it's not
supposed to do that.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10646
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27794>
2024-02-26 19:30:31 +00:00
Caio Oliveira
255a411450 intel: Use _brw suffix for genX headers that rely on brw
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27563>
2024-02-24 00:24:32 +00:00
Caio Oliveira
80cfc3d712 intel/blorp: Remove Gfx9+ references in elk code
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27563>
2024-02-24 00:24:31 +00:00
Caio Oliveira
0e582f0dfd intel/blorp: Add ELK support
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27563>
2024-02-24 00:24:31 +00:00
Caio Oliveira
f5149e025e intel/blorp: Explicitly include brw_compiler.h header
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27563>
2024-02-24 00:24:31 +00:00
Caio Oliveira
4eb63a0137 intel/blorp: Move brw specific code to a separate file
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27563>
2024-02-24 00:24:31 +00:00
Caio Oliveira
8ae528331c intel/compiler: Use "intel" prefix for walk_order enum
Will be used later in non-brw specific code in Iris.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27646>
2024-02-21 00:38:35 +00:00
Caio Oliveira
dc76cfc781 intel/compiler: Collect NIR-only passes in intel_nir.h
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27644>
2024-02-16 22:35:05 +00:00
Caio Oliveira
3b48b7df1f intel/blorp: Use a Meson dependency for blorp
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27643>
2024-02-16 00:08:42 +00:00
Caio Oliveira
62a8de99ac intel/blorp: Move brw_compiler.h include to where is needed
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27581>
2024-02-15 10:29:19 +00:00
Caio Oliveira
f4df4be7e7 intel/blorp: Avoid brw types in blorp_priv.h
Abuse void* here so there's one less file dependent on specific brw
types.  We can revisit if there's a need later, if we ever end up with
a common type for prog_data.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27581>
2024-02-15 10:29:19 +00:00
Caio Oliveira
b28cf9123b intel/blorp: Move brw_blorp_get_urb_length helper
Moving to blorp_genX_exec.h to help make blorp_priv.h independent of brw
types.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27581>
2024-02-15 10:29:19 +00:00
Caio Oliveira
b34df9f801 intel/blorp: Remove outdated reference in comment
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27581>
2024-02-15 10:29:19 +00:00
Caio Oliveira
9377dc417d intel/blorp: Use a struct to return blorp_compile_*() results
Allocate the prog_data instead of expecting one from the user, also
explicitly return both kernel and prog_data size, so that the
plumbing code isn't required to use the exact prog_data type.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27581>
2024-02-15 10:29:19 +00:00
Caio Oliveira
82ecc219e0 intel/blorp: Simplify blorp_compile_cs() interface
No need to take brw_prog_cs_key.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27581>
2024-02-15 10:29:19 +00:00
Caio Oliveira
cfad85eed0 intel/blorp: Simplify blorp_compile_fs() interface
Take multisample_fbo parameter instead of a brw_wm_key.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27581>
2024-02-15 10:29:18 +00:00
Caio Oliveira
16ba2478fa intel/blorp: Remove brw_ prefix when not applicable
Remove the brw_ prefix from some blorp functions and structs to avoid
confusion with what's related to brw and what's not.  Some of those will
become independent of brw in upcoming patches.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27581>
2024-02-15 10:29:18 +00:00
Caio Oliveira
c8fda63378 intel/blorp: Don't require specific prog_data type in callback
Make interface less dependent on brw types.  If we care, later
might make sense to add a tagged union for the possible types here.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27581>
2024-02-15 10:29:18 +00:00
Caio Oliveira
5732c9d269 intel/compiler: Rename brw_cs_dispatch_info to intel_cs_dispatch_info
And move to the intel_shader_enums.h file.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27475>
2024-02-14 22:31:23 -08:00
Caio Oliveira
c5b80de583 intel/compiler: Rename brw_vue_map to intel_vue_map
And move to the intel_shader_enums.h file.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27475>
2024-02-14 22:31:23 -08:00
Caio Oliveira
7d85d2c7fd intel/compiler: Rename DISPATCH_MODE_* enums to INTEL_DISPATCH_MODE_*
And move to the intel_shader_enums.h file.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27475>
2024-02-14 22:31:23 -08:00
Tapani Pälli
5ae2b4882a blorp: implement Wa_16014912113 callback for drivers
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26920>
2024-02-05 13:50:58 +00:00
Tapani Pälli
bdc7d32e93 blorp/crocus: refactor blorp_emit_urb_config
Patch changes blorp_emit_urb_config to use intel_urb_config so that we
can use it later to communicate blorp urb configuration for drivers.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26920>
2024-02-05 13:50:58 +00:00
Tapani Pälli
a1b885b482 intel: refactor urb configuration, add intel_urb_config
Patch adds a structure holding urb configuration. This makes it nicer
to pass it around as example for blorp. We need to be able to sometimes
compare with last urb configuration to be able to implement some
workaround.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26920>
2024-02-05 13:50:58 +00:00
Tapani Pälli
5bea69cdd6 intel/blorp: add a TODO note about stencil buffer resolve
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27355>
2024-02-02 18:28:39 +00:00
José Roberto de Souza
44b4fee786 iris: Avoid read of uninitialized value in blorp_clear_stencil_as_rgba()
In clear_depth_stencil() stencil_surf is defined but not initiaized.
Then in the same function if stencil_mask is calculated and if != 0
stencil_surf is initialized.
But blorp_clear_stencil_as_rgba() access stencil_surf before checking
stencil_mask, what could cause a read of a uninitialized valued.

clear_depth_stencil()
	struct blorp_surf stencil_surf;
	...
	uint8_t stencil_mask = clear_stencil && stencil_res ? 0xff : 0;
	if (stencil_mask) {
		...
		iris_blorp_surf_for_resource(&stencil_surf);
	}
	...
	blorp_clear_depth_stencil(stencil_mask, stencil_surf)
		blorp_clear_stencil_as_rgba(stencil_mask, stencil)
			if (surf->surf->format ...)
				....

Just inverting the order and checking stencil_mask first in
blorp_clear_stencil_as_rgba() fixes the issue.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27390>
2024-01-31 22:29:31 +00:00
Kenneth Graunke
5e7f4ff97f intel: Add driver support for hardware generated local invocation IDs
This adds a few new fields in the brw_cs_prog_data struct and then
uses them to fill in the relevant COMPUTE_WALKER fields.

Although the Tile Layout field theoretically has different settings for
32/64/128bpe, it appears that the recommended programming is to always
pick either TileY 32bpe or Linear.  It's not very practical to look at
the surface formats involved, anyway.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27167>
2024-01-25 08:43:04 +00:00
Kenneth Graunke
10ed4f1cab intel/nir: Pass devinfo and prog_data to brw_nir_lower_cs_intrinsics
We'll want to check for Alchemist and set various prog_data fields
in the next patch, in order to enable some optimizations.  Passing
NULL for prog_data will remain valid and continue working as before.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27167>
2024-01-25 08:43:04 +00:00
Rohan Garg
c69650a95e isl,blorp,anv: introduce ISL_TILING_64_XE2 for Xe2+ platforms
Xe2+ changed the msaa mapping for 2D/3D Tile64 surfaces, introduce a
Xe2+ specific enum to handle this change.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27113>
2024-01-24 17:01:48 +01:00
Francisco Jerez
e7b1993376 intel/compiler: Add max_polygons FS compilation parameter.
Add a brw_compile_fs_params parameter that specifies to the compiler
the maximum number of polygons that may be processed in parallel per
PS SIMD thread.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26585>
2023-12-22 18:05:30 +00:00
Jordan Justen
a659b1f0c0 anv, blorp, iris, intel/genxml: Update 3DSTATE_PS_EXTRA for xe2
Update 3DSTATE_PS_EXTRA programming for xe2

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26600>
2023-12-18 15:41:31 +00:00
Jordan Justen
5548e6a478 anv, blorp, iris, intel/genxml: Update 3DSTATE_VS for xe2
Update 3DSTATE_VS programming for xe2

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26600>
2023-12-18 15:41:31 +00:00
Jordan Justen
f170995e66 anv, blorp, iris: Update 3DSTATE_PS programming for xe2
Rework:
 * Jordan: Move code into intel_update_ps_state()

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26600>
2023-12-18 15:41:30 +00:00
Zhang, Jianxun
2c41811808 intel/genxml: update 3DSTATE_WM_HZ_OP instruction (xe2)
The depth clear value is provided from 3DSTATE_WM_HZ_OP now.

Signed-off-by: Zhang, Jianxun <jianxun.zhang@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26600>
2023-12-18 15:41:30 +00:00
Sagar Ghuge
b223d33141 blorp: Handle stencil buffer compression on blitter engine
XY_BLOCK_COPY_BLT and XY_FAST_COLOR_BLT instruction supports AUX_CCS
surface mode. Stencil buffer compression is stencil data with CCS so we
can easily support that on blitter engine.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26167>
2023-12-06 04:39:09 +00:00
Rohan Garg
2e72917923 blorp: set min/max viewport depths to -FLT_MAX/FLT_MAX when EXT_depth_range_unrestricted is enabled
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26426>
2023-12-01 13:23:54 +00:00
Lionel Landwerlin
c76cb19b01 anv/blorp: move helper function about BTI changes to blorp
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26247>
2023-11-17 10:17:51 +00:00
Lionel Landwerlin
ec3f8c0d42 intel/blorp: move Wa_18019816803 out of blorp code
The driver already need to track this WA for blorp. We can completely
remove any blorp code dealing with this and instead have the flush
required by the workaround be combined with potential other flushes
the driver already has to insert before blorp operations.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26247>
2023-11-17 10:17:51 +00:00
Rohan Garg
1b03acb26b blorp,anv,iris: refactor blorp functions into something more generic
Refactor some of the blorp code into something more generic that we can
reuse for functionality needed post 3DPRIMITIVE emission.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25039>
2023-11-08 11:00:54 +00:00
Lionel Landwerlin
f9753488ec blorp: handle binding table & surface state allocation failures
The embedding driver could be failing the allocation for whatever
reason, in which case we should skip the surface state writes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25955>
2023-10-30 14:47:18 +00:00
Francisco Jerez
694d64188b intel/xehp+: Define driconf option for selectively disabling TBIMR.
This may help debugging performance problems in the possible case that
TBIMR negatively impacts the performance of some application.  It could
also allow applying application-specific band-aid fixes in the XML file
until a more general workaround is implemented.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25493>
2023-10-27 14:48:29 -07:00