Commit graph

92185 commits

Author SHA1 Message Date
Timothy Arceri
fd2b3da5c8 glsl/main: remove unused params and make function static
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-06-30 16:51:25 +10:00
Timothy Arceri
32c410d2df glsl: simplify link_uniform_blocks()
There is only ever one shader so simplify the input params.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-06-30 16:51:25 +10:00
Timothy Arceri
1fb8c6df88 glsl/mesa: split gl_shader in two
There are two distinctly different uses of this struct. The first
is to store GL shader objects. The second is to store information
about a shader stage thats been linked.

The two uses actually share few fields and there is clearly confusion
about their use. For example the linked shaders map one to one with
a program so can simply be destroyed along with the program. However
previously we were calling reference counting on the linked shaders.

We were also creating linked shaders with a name even though it
is always 0 and called the driver version of the _mesa_new_shader()
function unnecessarily for GL shader objects.

Acked-by: Iago Toral Quiroga <itoral@igalia.com>
2016-06-30 16:51:25 +10:00
Timothy Arceri
378f07ccb5 mesa: don't print name in _mesa_append_uniforms_to_file()
This is only used to print linked shaders which always have a name of 0
so this was pointless.

Acked-by: Iago Toral Quiroga <itoral@igalia.com>
2016-06-30 16:51:25 +10:00
Timothy Arceri
e8c8aa0320 mesa: remove unreachable code from _mesa_write_shader_to_file()
_mesa_write_shader_to_file() is only used to print gl shader objects
so Program should never be set as it only gets set for linked shaders.

Acked-by: Iago Toral Quiroga <itoral@igalia.com>
2016-06-30 16:51:25 +10:00
Timothy Arceri
9b41c743cc glsl: pass symbols to find_matching_signature() rather than shader
This will allow us to later split gl_shader into two structs.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-06-30 16:51:25 +10:00
Timothy Arceri
47f8381730 glsl: pass symbols rather than shader to _mesa_get_main_function_signature()
This will allow us to split gl_shader into two different structs, one for
shader objects and one for linked shaders.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-06-30 16:51:25 +10:00
Timothy Arceri
9e9d01cbe8 mesa: don't use drivers NewShader function when creating shader objects
The drivers function only needs to be used when creating a struct for
linked shaders.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-06-30 16:51:25 +10:00
Timothy Arceri
962933b6d4 glsl: make cross_validate_globals() more generic
Rather than passing in gl_shader we now pass in the IR. This will
allow us to later split gl_shader into two structs. One for use
as a linked per stage shader struct and one for use as a GL shader
object.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
2016-06-30 16:51:25 +10:00
Ian Romanick
5921f372c8 mapi: Export all GLES 3.1 functions in libGLESv2.so
Khronos recommends that the GLES 3.1 library also be called libGLESv2.
It also requires that functions be statically linkable from that
library.

NOTE: Mesa has supported the EGL_KHR_get_all_proc_addresses extension
since at least Mesa 10.5, so applications targeting Linux should use
eglGetProcAddress to avoid problems running binaries on systems with
older, non-GLES 3.1 libGLESv2 libraries.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "11.2 12.0" <mesa-stable@lists.freedesktop.org>
Cc: Mike Gorchak <mike.gorchak.qnx@gmail.com>
Reported-by: Mike Gorchak <mike.gorchak.qnx@gmail.com>
Acked-by: Chad Versace <chad.versace@intel.com>
2016-06-29 14:28:59 -07:00
Chad Versace
d3a147ba40 i965: Use drmIoctl for DRM_I915_GETPARAM (v2)
Stop using drmCommandWriteRead for such a simple ioctl.

v2: Handle errno correctly. [ickle]

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
2016-06-29 13:44:23 -07:00
sonjiang
b928ff6f62 radeon/uvd: fix a h265 context size bug
Signed-off-by: sonjiang <sonny.jiang@amd.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-06-29 15:30:25 -04:00
sonjiang
5c80354a23 radeon/uvd: seperate uvd context buffer from DPB
Signed-off-by: sonjiang <sonny.jiang@amd.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-06-29 15:30:20 -04:00
sonjiang
28f85eab49 radeon uvd add uvd fw version for amdgpu
Signed-off-by: sonjiang <sonny.jiang@amd.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2016-06-29 15:30:14 -04:00
Samuel Pitoiset
fa10d1d674 nv50/ir: print EMIT subops in debug mode
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-06-29 20:37:38 +02:00
Samuel Pitoiset
a6d3b2e176 nv50/ir: print RSQ/RCP subops in debug mode
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-06-29 20:37:36 +02:00
Samuel Pitoiset
908ba19554 nv50/ir: print PIXLD subops in debug mode
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-06-29 20:37:33 +02:00
Samuel Pitoiset
c0d92078bb nv50/ir: print SHFL subops in debug mode
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-06-29 20:37:18 +02:00
Rodrigo Vivi
85ea8deb26 i965: Removing PCI IDs that are no longer listed as Kabylake.
This is unusual. Usually IDs listed on early stages of platform
definition are kept there as reserved for later use.

However these IDs here are not listed anymore in any of steppings
and devices IDs tables for Kabylake on configurations overview
section of BSpec.

So it is better removing them before they become used in any
other future platform.

Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2016-06-29 11:14:19 -07:00
Rodrigo Vivi
bdff2e5547 i956: Add more Kabylake PCI IDs.
The spec has been updated adding new PCI IDs.

Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2016-06-29 11:14:19 -07:00
Marek Olšák
63f8d648f0 gallium/radeon: remove zombie textures kept alive by DCC stat gathering
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 20:12:00 +02:00
Marek Olšák
44906101c4 gallium/radeon: don't re-create queries for DCC stat gathering
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 20:12:00 +02:00
Marek Olšák
82b39f3521 gallium/radeon: assume X11 DRI3 can use at most 5 back buffers
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 20:12:00 +02:00
Marek Olšák
9ae41227c2 gallium/radeon: separate DCC starts as disabled (ps_draw_ratio = 0)
DRI3:
- Only slows clears can enable it for the first frame.
- A good PS/draw ratio can enable it for other frames.

DRI2:
- Only slows clears can enable it for a frame.
- Page-flipped color buffers are unref'd at the end of each frame,
  so it can't be enabled in any other way.
- Relying on slow clears is sufficient for our synthetic benchmarks.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 20:12:00 +02:00
Marek Olšák
9fd4eff43c gallium/radeon: R600_DEBUG=nodccfb disables separate DCC
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 20:12:00 +02:00
Marek Olšák
36cf5a57c2 gallium/radeon: add and use r600_texture_reference
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Vedran Miletić <vedran@miletic.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 20:12:00 +02:00
Marek Olšák
6da92df538 gallium/radeon: add a HUD query for PS draw ratio stats from separate DCC
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 20:12:00 +02:00
Marek Olšák
49e3c74cdd gallium/radeon: add a heuristic enabling DCC for scanout surfaces (v2)
DCC for displayable surfaces is allocated in a separate buffer and is
enabled or disabled based on PS invocations from 2 frames ago (to let
queries go idle) and the number of slow clears from the current frame.

At least an equivalent of 5 fullscreen draws or slow clears must be done
to enable DCC. (PS invocations / (width * height) + num_slow_clears >= 5)

Pipeline statistic queries are always active if a color buffer that can
have separate DCC is bound, even if separate DCC is disabled. That means
the window color buffer is always monitored and DCC is enabled only when
the situation is right.

The tracking of per-texture queries in r600_common_context is quite ugly,
but I don't see a better way.

The first fast clear always enables DCC. DCC decompression can disable it.
A later fast clear can enable it again. Enable/disable typically happens
only once per frame.

The impact is expected to be negligible because games usually don't have
a high level of overdraw. DCC usually activates when too much blending
is happening (smoke rendering) or when testing glClear performance and
CMASK isn't supported (Stoney).

v2: rename stuff, add assertions

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 20:12:00 +02:00
Marek Olšák
9124457bff gallium/radeon: add state setup for a separate DCC buffer
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 20:12:00 +02:00
Marek Olšák
fa7c927625 radeonsi: always calculate DCC info even if it's not used immediately
for a later use

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 20:12:00 +02:00
Marek Olšák
ebb9c7d7c4 radeonsi: unreference framebuffer state with set_framebuffer_state
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 20:12:00 +02:00
Marek Olšák
e607a6be2b gallium/radeon: add flag R600_QUERY_HW_FLAG_BEGIN_RESUMES
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 20:12:00 +02:00
Chad Versace
a2ae888929 i965: Use intel_get_param() more often
Replace some open-coded ioctls with intel_get_param().

This is just a cleanup. No change in behavior.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-06-29 09:34:21 -07:00
Chad Versace
844e0bd946 i965: Refactor intel_get_param()
Replace the function's __DRIscreen parameter with struct intel_screen.
The callsites feel more natural that way.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2016-06-29 09:34:21 -07:00
Marek Olšák
0c135a773f radeonsi: don't advertise multisample shader images
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 16:34:22 +02:00
Marek Olšák
eff81cbc81 radeonsi: enable distributed tess on multi-SE parts only
ported from Vulkan

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 16:34:22 +02:00
Marek Olšák
dd56d04568 radeonsi: set optimal VGT_HS_OFFCHIP_PARAM
ported from Vulkan

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 16:34:22 +02:00
Marek Olšák
9a71bf8858 radeonsi: enable CU0 in each SE for LS-HS execution
Offchip-only tessellation allows this.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 16:34:22 +02:00
Marek Olšák
4b11ef23b4 radeonsi: use conformant line rasterization
AA lines are not completely correct (see TODO), but everything else
should be.

+ 3 linestipple piglits

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-06-29 16:34:22 +02:00
Rob Herring
789ed13284 Android: add missing u_math.h include path for libmesa_isl
Commit 87d062a940 ("i965: Fix shared local memory size for Gen9+.")
added u_math.h include which broke the Android build:

In file included from external/mesa3d/src/intel/isl/isl_storage_image.c:25:
In file included from external/mesa3d/src/mesa/drivers/dri/i965/brw_compiler.h:29:
external/mesa3d/src/mesa/main/macros.h:35:10: fatal error: 'util/u_math.h' file not found
         ^

Add the missing include paths for libmesa_isl.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Kenneth Garunke <kenneth@whitecape.org>
2016-06-28 12:48:46 -07:00
Charmaine Lee
6397c12f32 svga: force direct map for transfering multiple slices
With commit fb9fe35, we start using transfer_inline_write
for memcpy of TexSubImage. But SurfaceDMA command does not work
well with texture array. This patch forces direct map when
transfering multiple slices of a texture array.

Fixes piglit regression "texelFetch fs sampler1DArray"

Tested with MTT piglit, glretrace, conform.

Reviewed-by: Sinclair Yeh <syeh@vmware.com>
2016-06-28 13:43:23 -06:00
Brian Paul
d65c4e22a8 svga: whitespace, line wrapping fixes in svga_surface.c 2016-06-28 13:43:23 -06:00
Samuel Pitoiset
cc97b6a34a gm107/ir: make sure that flagsDef is set when emitting setcond
Rely on the existence of a second destination when emitting a setcond
flag is dangerous, because this doesn't mean that the flag has been
correctly set. Instead rely on flagsDef like what emitX() does
for flagsSrc.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Cc: <mesa-stable@lists.freedesktop.org>
2016-06-28 18:38:56 +02:00
Grazvydas Ignotas
234323558d doc: improve INTEL_DEBUG documentation
Remove 'reg' option that does not actually exist, elaborate more about
'sync' and add the missing options.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2016-06-28 07:21:07 -07:00
Marek Olšák
c1dbc563f4 radeonsi: set PA_SU_SMALL_PRIM_FILTER_CNTL register on Polaris
This was missing.

Cc: 12.0 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-06-28 15:47:13 +02:00
Boyuan Zhang
06f0a4d9ed radeon/vce: use vce structure for vce 52 firmware
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2016-06-28 08:58:03 -04:00
Boyuan Zhang
533bd6ae17 radeon/vce: add vce structures
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
2016-06-28 08:58:00 -04:00
Leo Liu
05d302ffe2 st/omx: fix decoder fillout for the OMX result buffer
The call for vl_video_buffer_adjust_size is with wrong order of
arguments, apparently it will have problem when interlaced false;

The size of OMX result buffer depends on real size of clips, vl buffer
dimension is aligned with 16, so 1080p(1920*1080) video will overflow
the OMX buffer

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Tested-by: Julien Isorce <j.isorce@samsung.com>
2016-06-28 08:57:56 -04:00
Hans de Goede
459cc94507 pipe_loader_sw: Fix fd leak when instantiated via pipe_loader_sw_probe_kms
Make pipe_loader_sw_probe_kms take ownership of the passed in fd,
like pipe_loader_drm_probe_fd does.

The only caller is dri_kms_init_screen which passes in a dupped fd,
just like dri2_init_screen passes in a dupped fd to
pipe_loader_drm_probe_fd.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
2016-06-28 12:29:54 +02:00
Jan Vesely
87787e9079 clover: Fix kernel metadata retrieval after clang r273425
Signed-off-by: Jan Vesely <jan.vesely@rutgers.edu>
Acked-by: Francisco Jerez <currojerez@riseup.net>
2016-06-27 23:12:37 -07:00