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gallium/radeon: separate DCC starts as disabled (ps_draw_ratio = 0)
DRI3: - Only slows clears can enable it for the first frame. - A good PS/draw ratio can enable it for other frames. DRI2: - Only slows clears can enable it for a frame. - Page-flipped color buffers are unref'd at the end of each frame, so it can't be enabled in any other way. - Relying on slow clears is sufficient for our synthetic benchmarks. Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
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1 changed files with 10 additions and 9 deletions
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@ -1021,12 +1021,11 @@ r600_texture_create_object(struct pipe_screen *screen,
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/* Applies to GCN. */
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rtex->last_msaa_resolve_target_micro_mode = rtex->surface.micro_tile_mode;
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/* We want to optimistically enable separate DCC on the first clear
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* for apps that don't call SwapBuffers or call it too late, so set
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* a very high number at the beginning. If the PS/draw ratio is too
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* low, the first DCC decompression will disable DCC.
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/* Disable separate DCC at the beginning. DRI2 doesn't reuse buffers
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* between frames, so the only thing that can enable separate DCC
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* with DRI2 is multiple slow clears within a frame.
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*/
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rtex->ps_draw_ratio = 100;
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rtex->ps_draw_ratio = 0;
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if (rtex->is_depth) {
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if (!(base->flags & (R600_RESOURCE_FLAG_TRANSFER |
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@ -1839,6 +1838,12 @@ static void vi_separate_dcc_try_enable(struct r600_common_context *rctx,
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if (tex->dcc_offset)
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return; /* already enabled */
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/* Enable the DCC stat gathering. */
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if (!tex->dcc_gather_statistics) {
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tex->dcc_gather_statistics = true;
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vi_separate_dcc_start_query(&rctx->b, tex);
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}
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if (!vi_should_enable_separate_dcc(tex))
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return; /* stats show that DCC decompression is too expensive */
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@ -1861,10 +1866,6 @@ static void vi_separate_dcc_try_enable(struct r600_common_context *rctx,
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tex->surface.dcc_alignment);
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if (!tex->dcc_separate_buffer)
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return;
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/* Enabling for the first time, so start the query. */
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tex->dcc_gather_statistics = true;
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vi_separate_dcc_start_query(&rctx->b, tex);
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}
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/* dcc_offset is the absolute GPUVM address. */
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