gallium/radeon: separate DCC starts as disabled (ps_draw_ratio = 0)

DRI3:
- Only slows clears can enable it for the first frame.
- A good PS/draw ratio can enable it for other frames.

DRI2:
- Only slows clears can enable it for a frame.
- Page-flipped color buffers are unref'd at the end of each frame,
  so it can't be enabled in any other way.
- Relying on slow clears is sufficient for our synthetic benchmarks.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2016-06-28 21:02:40 +02:00
parent 9fd4eff43c
commit 9ae41227c2

View file

@ -1021,12 +1021,11 @@ r600_texture_create_object(struct pipe_screen *screen,
/* Applies to GCN. */
rtex->last_msaa_resolve_target_micro_mode = rtex->surface.micro_tile_mode;
/* We want to optimistically enable separate DCC on the first clear
* for apps that don't call SwapBuffers or call it too late, so set
* a very high number at the beginning. If the PS/draw ratio is too
* low, the first DCC decompression will disable DCC.
/* Disable separate DCC at the beginning. DRI2 doesn't reuse buffers
* between frames, so the only thing that can enable separate DCC
* with DRI2 is multiple slow clears within a frame.
*/
rtex->ps_draw_ratio = 100;
rtex->ps_draw_ratio = 0;
if (rtex->is_depth) {
if (!(base->flags & (R600_RESOURCE_FLAG_TRANSFER |
@ -1839,6 +1838,12 @@ static void vi_separate_dcc_try_enable(struct r600_common_context *rctx,
if (tex->dcc_offset)
return; /* already enabled */
/* Enable the DCC stat gathering. */
if (!tex->dcc_gather_statistics) {
tex->dcc_gather_statistics = true;
vi_separate_dcc_start_query(&rctx->b, tex);
}
if (!vi_should_enable_separate_dcc(tex))
return; /* stats show that DCC decompression is too expensive */
@ -1861,10 +1866,6 @@ static void vi_separate_dcc_try_enable(struct r600_common_context *rctx,
tex->surface.dcc_alignment);
if (!tex->dcc_separate_buffer)
return;
/* Enabling for the first time, so start the query. */
tex->dcc_gather_statistics = true;
vi_separate_dcc_start_query(&rctx->b, tex);
}
/* dcc_offset is the absolute GPUVM address. */