Commit graph

218528 commits

Author SHA1 Message Date
Eric Engestrom
7eef815667 docs/precompiled: modernize distro documentation
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39732>
2026-02-12 16:15:50 +00:00
Vignesh Raman
202437dd8e ci/gitlab_gql: disable schema fetch
When running ci_run_n_monitor, the following error is seen,
gql.transport.exceptions.TransportQueryError: Error while fetching schema: {'message': 'Internal server error'}
If you don't need the schema, you can try with: "fetch_schema_from_transport=False"

Set fetch_schema_from_transport=False to avoid this failure.

Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39845>
2026-02-12 16:02:01 +00:00
David Rosca
5d4f977573 radv/video: Support UVD decode on hawaii and older
H264 requires extra allocation in DPB. Use helper function
to get the required size, same as we do for encode.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:27 +00:00
David Rosca
24c74f522c ac/vcn_dec: Make the helper functions static
They are only used in ac_vcn_dec.c now.

Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
7ad4f501fa radv: Drop videoarraypath debug option
It's not really usefull and only works for H264/5.
On AV1/VP9 it would cause hang.

Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
19a8b7121e radv/video: Remove old VCN and UVD decode implementation
Only ac_video_dec is now used.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
Benjamin Cheng
6aed906410 radv/video: Use ac_video_dec for decode
Supports VCN and UVD.

Co-authored-by: David Rosca <david.rosca@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
2130df7c2a radeonsi/video: Drop offsets parameter for si_vid_resize_buffer
Not used anymore.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
af5b9d7a4e radeonsi: Move functions from radeon_video.c to si_video.c
And remove radeon_video.c/h

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
528b5c56d2 radeonsi: Rename si_uvd.c to si_video.c
Also move function declarations to si_video.h

Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
0f48b667b2 radeonsi: Rename si_uvd_create_decoder to si_video_codec_create
Reviewed-by: Benjamin Cheng <benjamin.cheng@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
1fad2ae6e1 radeonsi/video: Remove old VCN and UVD decode implementation
Only ac_video_dec is now used.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
26979becec radeonsi/video: Add video decoder using ac_video_dec
Supports VCN, VCN JPEG and UVD.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
cb1dde2cc3 radeonsi: Don't assert when using src texture in si_compute_clear_copy_buffer
This will be used for texture -> texture copy in next commit, to copy
DPB (layered texture with multiple planes). It needs to use buffer copy,
because VCN expects interleaved layers.
(layer0_plane0, layer0_plane1, layer1_plane0, layer1_plane1, ...).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
4d06fb9acd ac: Add UVD ac_video_dec implementation
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
9608abb26b ac: Add VCN JPEG ac_video_dec implementation
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
79af03556c ac: Add VCN ac_video_dec implementation
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:26 +00:00
David Rosca
b5028e84c8 ac: Add video decode interface
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39627>
2026-02-12 15:38:25 +00:00
Samuel Pitoiset
02a2451e1f radv: rename radv_image_use_dcc_image_stores()
To radv_image_compress_dcc_on_image_stores() because it seems more
informative.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39803>
2026-02-12 15:18:26 +00:00
Samuel Pitoiset
d58080f787 radv/meta: add a function to fixup DCC metadata for compute resolves
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39803>
2026-02-12 15:18:25 +00:00
Samuel Pitoiset
ed166804f6 radv/meta: remove an useless barrier when fixing up DCC for compute resolves
The resolve operation doesn't use DCC of the destination image, so the
clear can run in parallel.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39803>
2026-02-12 15:18:25 +00:00
Samuel Pitoiset
a673c9e414 radv/meta: stop fixing up DCC after a partial resolve using compute
The decompression pass already resets DCC to its uncompressed state,
so this is just redundant.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39803>
2026-02-12 15:18:25 +00:00
Rhys Perry
fa5d4174c4 nir/search: use memcmp/memcpy/memset
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39808>
2026-02-12 14:47:06 +00:00
Rhys Perry
5d92942241 nir/search: remove creation of swizzle
match_expression() only accesses the first instr->def.num_components
elements, so we don't need to ensure the rest are zero.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39808>
2026-02-12 14:47:06 +00:00
Konstantin Seurer
f574de2249 radv: Fix setting the viewport for depth stencil FS resolves
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Fixes: 704fbbb ("radv/meta: rework depth/stencil resolves using graphics")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39836>
2026-02-12 14:25:31 +00:00
Konstantin Seurer
bc86c5adae radv: Stop saving descriptors before acceleration structure OPs
They only use compute+constants.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39836>
2026-02-12 14:25:31 +00:00
Utku Iseri
7c9b4fc524 panvk: BDA capture/replay support on v10+
The spec recommends the capture/replay enabled buffers to be separated
from other buffers created by the implementation, so this introduces a
split-heap mode to be used only when this feature is enabled.

The rest of the change is trivial, as we can allocate from the
fixed-heap on BDA-C/R-enabled allocations during capture, and simply
map the address we're given on that same heap during replays.

Architectures older than v10 use AUTO_VA, so we can't do the same thing
on them.

Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38871>
2026-02-12 14:00:50 +00:00
Utku Iseri
3a853e0ba4 panvk: add max supported va to physical device
This is slightly neater to check during device feature
filling instead of calculating it repeatedly.

Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38871>
2026-02-12 14:00:50 +00:00
Utku Iseri
a1b2d2293f panvk: use AUTO_VA with v9
v9 uses panfrost, which only supports AUTO_VA

Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/38871>
2026-02-12 14:00:49 +00:00
jiajia Qian
f16d17a454 nir/opt_phi_precision: Fix bit size mismatch when moving widening conversions
Add a check to ensure that when load_const can be narrowed, the bit size

from other widening conversion sources must be 16-bit to maintain

consistency across all phi sources.

Signed-off-by: jiajia Qian <jiajia.qian@nxp.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39773>
2026-02-12 12:27:55 +00:00
Ansari, Muhammad
d42268f3e5 amd/vpelib: Adding new wrapper for register profiling
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
[WHY]
To read back register read/write counts from VPEs, we need to add a new
wrapper function.

[HOW]
Added a wrapper that calls build command and populate the register
profiling data structure.

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Muhammad Ansari <Muhammad.Ansari@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39848>
2026-02-12 11:56:26 +00:00
Ali, Nawwar
2a5124a09f amd/vpelib: Fix crash during encoding test
[WHY]
Fix crash during encoding test

Co-authored-by: Agate, Jesse <Jesse.Agate+amdeng@amd.com>
Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Nawwar Ali <Nawwar.Ali@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39848>
2026-02-12 11:56:25 +00:00
Agate, Jesse
39187b36b5 amd/vpelib: Add RGB 601 Primaires to BG Color
[WHY]
RGB 601 Primaries are missing from vpe_is_limited_cs

[HOW]
Add 601 primaries to the switch statement

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-Off-by: Jesse Agate <Jesse.Agate@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39848>
2026-02-12 11:56:25 +00:00
Rouf, Farhan
edf352a71a amd/vpelib: Embedded Buffer Size for 3DLUT FL
[WHY]
The embedded-buffer usage decision should be based on the stream's 3DLUT
mode rather than a loosely defined tm_enabled boolean.

[HOW]
- Replace cmd_info.tm_enabled with cmd_info.lut3d_type
- Add vpe_get_stream_lut3d_type() helper and use it in cmd info/buffer req
- Prefix internal helpers (vpe_calculate_scaling_ratios, vpe_should_generate_cmd_info)

Signed-Off-by: Farhan Rouf <Farhan.Rouf@amd.com>
Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39848>
2026-02-12 11:56:25 +00:00
Assadian, Navid
dd7c2f9528 amd/vpelib: Reorder function pointers
[HOW]
- Re-order the function pointer assignments to have the same order as
defined.

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-Off-by: Navid Assadian <Navid.Assadian@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39848>
2026-02-12 11:56:25 +00:00
You, Min-Hsuan
e33bbe7ee7 amd/vpelib: refactor minor change
Make dscl_set_scaler_position be a function pointer

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Singed-off-by: Min-Hsuan You <Min-Hsuan.You@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39848>
2026-02-12 11:56:25 +00:00
Chan, Roy
3d750ed881 amd/vpelib: fix uninitialized variable
[WHY]
The packet header has uninitialized fields that can introduce 1b'1 in
reserved bits.

[HOW]
initialize the header to 0

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Roy Chan <Roy.Chan@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39848>
2026-02-12 11:56:25 +00:00
Ali, Nawwar
3216b0c193 amd/vpelib: coding style rectify
Revised the coding style

Co-authored-by: Roy Chan <Roy.Chan@amd.com>
Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Nawwar Ali <Nawwar.Ali@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39848>
2026-02-12 11:56:25 +00:00
Ansari, Muhammad
58c544a9bd amd/vpelib: Fix potential overflow calculation
[WHY]
Multiplication result may overflow int before it is converted to long
long

[HOW]
Updated the expression to avoid possible overflow

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Muhammad Ansari <Muhammad.Ansari@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39848>
2026-02-12 11:56:24 +00:00
Lin, Ricky
dbff0fabf0 amd/vpelib: Augment swizzling modes
[WHY]
Support different generations of swizzle mode.

[HOW]
Added different swizzle mode parameters for supporting plane
description.

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Ricky Lin <Ricky.Lin@amdeng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39848>
2026-02-12 11:56:24 +00:00
Ali, Nawwar
f3db1d5f46 amd/vpelib: update 3dlut and shaper FL
[WHY]
Fast load support is required for 3DLUT and Shaper features.
The calculation logic needs to be modularized and exposed via
the resource interface to support this.

[HOW]
1. Add `calculate_shaper` and `program_fastload` function pointers to the `resource` struct.
2. Move shaper normalization, HDR multiplier update, and 3DLUT update logic from
   `vpe_color_update_movable_cm` into a new core function `vpe_calculate_shaper`.
3. Implement `vpe10_calculate_shaper` and assign it to the resource function table for VPE10 and VPE11.
4. Update `vpe_create_engine` return signature to remove `const` qualifier.

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Nawwar Ali <Nawwar.Ali@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39848>
2026-02-12 11:56:24 +00:00
Chang, Tomson
4ffd5a1c31 amd/vpelib: avoid using reg_update for multi-thread
[WHY]
Reg_update macro and its lastWritten_value design are static global
variables and cannot support multi-thread usage

[HOW]
remove reg_update usage and combine the separated calls together

Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Signed-off-by: Tomson Chang <tomson.chang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39848>
2026-02-12 11:56:24 +00:00
Eric Engestrom
39a94e4868 mr-label-maker: add label CI to bin/ci/*
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39847>
2026-02-12 11:51:10 +00:00
Rhys Perry
c811348dc2 radv: include ahit/isec shaders in radv_get_shader_from_executable_index
This is necessary for GetPipelineExecutablePropertiesKHR, RADV_DEBUG and
fossil-db.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39827>
2026-02-12 11:31:37 +00:00
Pierre-Eric Pelloux-Prayer
e231405de2 radeonsi/sqtt: use radeon_add_to_buffer_list
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
macOS-CI / macOS-CI (xlib) (push) Waiting to run
No need to use ws->cs_add_buffer directly.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39194>
2026-02-12 10:08:44 +00:00
Pierre-Eric Pelloux-Prayer
e1081603ae radeonsi/sqtt: allocate BOs in VRAM
Having them in GTT makes read back fast but it also affects performance
a lot. Now that a staging buffer can be used for read back, we can
switch to VRAM without drawbacks.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39194>
2026-02-12 10:08:44 +00:00
Pierre-Eric Pelloux-Prayer
2f849f7f65 radeonsi/sqtt: use pipe_buffer_map instead of ws->buffer_map
pipe_buffer_map has heuristics to chose the best method to access
the BO's content, including using a staging buffer if needed.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39194>
2026-02-12 10:08:44 +00:00
Pierre-Eric Pelloux-Prayer
8f7f7a90b7 radeonsi/sqtt: use pipe_aligned_buffer_create to allocate bo
pipe_aligned_buffer_create can allow allocate 4GB but that's large enough
for now.
PIPE_USAGE_STREAM is used for now to keep the 2 BOs in GTT.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39194>
2026-02-12 10:08:43 +00:00
Pierre-Eric Pelloux-Prayer
6ffcb2f47e radeonsi/sqtt: retrieve sqtt data after the flush ended
This will allow to use a staging buffer to copy the sqtt data
without moving away the BO from VRAM (without this change,
the vram->staging copy won't be executed since we're in the
middle of a flush).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39194>
2026-02-12 10:08:43 +00:00
Eric Engestrom
4014a20da3 ci/deqp-runner: also limit the number of test log and caselist files
Avoids job log spam like https://gitlab.freedesktop.org/mesa/mesa/-/jobs/92981114

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39829>
2026-02-12 09:33:34 +00:00