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amd/vpelib: Embedded Buffer Size for 3DLUT FL

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[WHY]
The embedded-buffer usage decision should be based on the stream's 3DLUT
mode rather than a loosely defined tm_enabled boolean.

[HOW]
- Replace cmd_info.tm_enabled with cmd_info.lut3d_type
- Add vpe_get_stream_lut3d_type() helper and use it in cmd info/buffer req
- Prefix internal helpers (vpe_calculate_scaling_ratios, vpe_should_generate_cmd_info)

Signed-Off-by: Farhan Rouf <Farhan.Rouf@amd.com>
Acked-by: Chuanyu Tseng <Chuanyu.Tseng@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39848>
This commit is contained in:
Rouf, Farhan 2025-11-20 15:36:11 -05:00 • committed by Marge Bot
parent dd7c2f9528
commit edf352a71a
5 changed files with 34 additions and 12 deletions
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14
src/amd/vpelib/src/chip/vpe10/vpe10_resource.c
View file

@ -230,7 +230,8 @@ static bool vpe10_init_scaler_data(struct vpe_priv *vpe_priv, struct stream_ctx
struct dpp *dpp;
dpp = vpe_priv->resource.dpp[0];
calculate_scaling_ratios(scl_data, src_rect, dst_rect, stream_ctx->stream.surface_info.format);
vpe_calculate_scaling_ratios(
scl_data, src_rect, dst_rect, stream_ctx->stream.surface_info.format);
scl_data->taps.v_taps = stream_ctx->stream.scaling_info.taps.v_taps;
scl_data->taps.h_taps = stream_ctx->stream.scaling_info.taps.h_taps;
@ -1039,12 +1040,12 @@ enum vpe_status vpe10_populate_cmd_info(struct vpe_priv *vpe_priv)
uint16_t segment_idx;
struct stream_ctx *stream_ctx;
struct vpe_cmd_info cmd_info = {0};
bool tm_enabled;
enum lut3d_type lut3d_type;
for (stream_idx = 0; stream_idx < vpe_priv->num_streams; stream_idx++) {
stream_ctx = &vpe_priv->stream_ctx[stream_idx];
tm_enabled = stream_ctx->stream.tm_params.UID != 0 || stream_ctx->stream.tm_params.enable_3dlut;
lut3d_type = vpe_get_stream_lut3d_type(stream_ctx);
for (segment_idx = 0; segment_idx < stream_ctx->num_segments; segment_idx++) {
@ -1060,7 +1061,7 @@ enum vpe_status vpe10_populate_cmd_info(struct vpe_priv *vpe_priv)
cmd_info.num_inputs = 1;
cmd_info.ops = VPE_CMD_OPS_COMPOSITING;
cmd_info.tm_enabled = tm_enabled;
cmd_info.lut3d_type = lut3d_type;
cmd_info.insert_start_csync = false;
cmd_info.insert_end_csync = false;
vpe_vector_push(vpe_priv->vpe_cmd_vector, &cmd_info);
@ -1232,8 +1233,9 @@ void vpe10_get_bufs_req(struct vpe_priv *vpe_priv, struct vpe_bufs_req *req)
// just the segment specific config size is added
if (cmd_info->ops == VPE_CMD_OPS_COMPOSITING) {
if (stream_idx != cmd_info->inputs[0].stream_idx) {
emb_req = cmd_info->tm_enabled ? VPE10_GENERAL_EMB_USAGE_3DLUT_FRAME_SHARED
: VPE10_GENERAL_EMB_USAGE_FRAME_SHARED;
emb_req = (cmd_info->lut3d_type == LUT3D_TYPE_CPU)
? VPE10_GENERAL_EMB_USAGE_3DLUT_FRAME_SHARED
: VPE10_GENERAL_EMB_USAGE_FRAME_SHARED;
stream_idx = cmd_info->inputs[0].stream_idx;
} else {
emb_req = VPE10_GENERAL_EMB_USAGE_SEG_NON_SHARED;

2
src/amd/vpelib/src/core/background.c
View file

@ -117,7 +117,7 @@ void vpe_create_bg_segments(
cmd_info.num_inputs = 1;
cmd_info.ops = ops;
cmd_info.cd = (uint16_t)(gaps_cnt - gap_index - 1);
cmd_info.tm_enabled = false; // currently only support frontend tm
cmd_info.lut3d_type = LUT3D_TYPE_NONE; // currently only support frontend tm
vpe_vector_push(vpe_priv->vpe_cmd_vector, &cmd_info);
}
}

6
src/amd/vpelib/src/core/inc/resource.h
View file

@ -160,13 +160,15 @@ struct pipe_ctx *vpe_pipe_find_owner(struct vpe_priv *vpe_priv, uint32_t stream_
void vpe_clip_stream(
struct vpe_rect *src_rect, struct vpe_rect *dst_rect, const struct vpe_rect *target_rect);
void calculate_scaling_ratios(struct scaler_data *scl_data, struct vpe_rect *src_rect,
void vpe_calculate_scaling_ratios(struct scaler_data *scl_data, struct vpe_rect *src_rect,
struct vpe_rect *dst_rect, enum vpe_surface_pixel_format format);
enum lut3d_type vpe_get_stream_lut3d_type(struct stream_ctx *stream_ctx);
uint16_t vpe_get_num_segments(struct vpe_priv *vpe_priv, const struct vpe_rect *src,
const struct vpe_rect *dst, const uint32_t max_seg_width);
bool should_generate_cmd_info(struct stream_ctx *stream_ctx);
bool vpe_should_generate_cmd_info(struct stream_ctx *stream_ctx);
enum vpe_status vpe_resource_build_scaling_params(struct segment_ctx *segment);

8
src/amd/vpelib/src/core/inc/vpe_priv.h
View file

@ -81,6 +81,11 @@ enum vpe_stream_type {
VPE_STREAM_TYPE_BG_GEN,
};
enum lut3d_type {
LUT3D_TYPE_NONE,
LUT3D_TYPE_CPU,
};
/** this represents a segement context.
* each segment has its own version of data */
struct segment_ctx {
@ -111,7 +116,8 @@ struct vpe_cmd_info {
uint16_t num_outputs;
struct vpe_cmd_output outputs[MAX_OUTPUT_PIPE];
bool tm_enabled;
enum lut3d_type lut3d_type;
bool insert_start_csync;
bool insert_end_csync;
};

16
src/amd/vpelib/src/core/resource.c
View file

@ -418,7 +418,7 @@ static void calculate_recout(struct segment_ctx *segment)
}
}
void calculate_scaling_ratios(struct scaler_data *scl_data, struct vpe_rect *src_rect,
void vpe_calculate_scaling_ratios(struct scaler_data *scl_data, struct vpe_rect *src_rect,
struct vpe_rect *dst_rect, enum vpe_surface_pixel_format format)
{
// no rotation support
@ -605,6 +605,18 @@ static enum vpe_status calculate_inits_and_viewports(struct segment_ctx *segment
return VPE_STATUS_OK;
}
enum lut3d_type vpe_get_stream_lut3d_type(struct stream_ctx *stream_ctx)
{
enum lut3d_type lut3d;
if ((stream_ctx->stream.tm_params.UID == 0) || (!stream_ctx->stream.tm_params.enable_3dlut)) {
lut3d = LUT3D_TYPE_NONE;
} else {
lut3d = LUT3D_TYPE_CPU;
}
return lut3d;
}
uint16_t vpe_get_num_segments(struct vpe_priv *vpe_priv, const struct vpe_rect *src,
const struct vpe_rect *dst, const uint32_t max_seg_width)
{
@ -613,7 +625,7 @@ uint16_t vpe_get_num_segments(struct vpe_priv *vpe_priv, const struct vpe_rect *
return (uint16_t)(max(max(num_seg_src, num_seg_dst), 1));
}
bool should_generate_cmd_info(struct stream_ctx *stream_ctx)
bool vpe_should_generate_cmd_info(struct stream_ctx *stream_ctx)
{
enum vpe_stream_type stream_type = stream_ctx->stream_type;