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Author SHA1 Message Date
Rhys Perry
6e2debe27c radv: copy spirv in radv_graphics_shaders_nir_to_asm instead 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40627>
 2026-03-30 09:42:46 +00:00
Rhys Perry
06b9660baf radv: move radv_shader_create out of radv_compute_pipeline_compile 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40627>
 2026-03-30 09:42:46 +00:00
Rhys Perry
41ffb087d2 radv: add radv_shader_debug_info parameter to radv_shader_create 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40627>
 2026-03-30 09:42:46 +00:00
Rhys Perry
98f96bd076 radv: add radv_parse_binary_debug_info 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40627>
 2026-03-30 09:42:46 +00:00
Rhys Perry
8cf1fc930c radv: simplify radv_shader_dump_debug_info 
And rename to better reflect what it does.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40627>
 2026-03-30 09:42:46 +00:00
Rhys Perry
4073cdf753 radv: add radv_shader_debug_info 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40627>
 2026-03-30 09:42:45 +00:00
Rhys Perry
574f577657 radv: fix memory leak in radv_rt_nir_to_asm 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Backport-to: 26.0
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40627>
 2026-03-30 09:42:45 +00:00
Samuel Pitoiset
3324abad06 radv: introduce RADV_EXPERIMENTAL envvar for experimental features 
Abusing RADV_PERFTEST for experimental features doesn't make real
sense, and I think we should stop doing that.

The existing RADV_PERFTEST options like RADV_PERFTEST=transfer_queue
still exists but they are marked as deprecated, they will be removed
in future Mesa releases.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40646>
 2026-03-30 07:27:01 +00:00
Faith Ekstrand
4d56fa661f vulkan: Rename some VK_EXT_descriptor_buffer properties 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40649>
 2026-03-30 06:51:26 +00:00
Benjamin Cheng
34e090ae11 radv/video: Add low-latency flags
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radv equivalent of 62f07b8c.

Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40524>
 2026-03-29 15:56:50 +00:00
Benjamin Cheng
917dff0b22 ac: Update FW required for variable slice mode
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There are some compatiblity issues with variable slice mode and
preencode that are fixed with newer FW.

Fixes: d9ba641e28 ("ac: Add variable slice mode interface")
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40604>
 2026-03-29 15:30:55 +00:00
Natalie Vock
1f9bc71051 radv/rt: Remove RADV_OFFSET_UNUSED
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RADV_OFFSET_UNUSED became unused, itself.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39985>
 2026-03-28 16:48:46 +01:00
Natalie Vock
579feda38b radv/rt: Fix cases in which the bound BVH build pipeline gets clobbered 
The most egregious case was AS updates, in which case radv_copy_memory
would decide to use compute, which overwrites the bound pipeline with
a copy shader. Subsequent dispatches assumed the update pipeline to be
bound, but dispatched another copy shader instead.

There is also a chance of this happening for geometry info copying for
RRA, so add another pass for that.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39985>
 2026-03-28 16:48:46 +01:00
Natalie Vock
6f80027447 vulkan: Rename {encode,update}_bind_pipeline to {encode,update}_prepare 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39985>
 2026-03-28 16:12:09 +01:00
Samuel Pitoiset
dede14cce3 radv: advertise VK_KHR_device_address_commands 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40386>
 2026-03-27 16:17:02 +00:00
Samuel Pitoiset
a97c889a7b radv: implement VK_KHR_device_address_commands 
Because there is no way to know where the address has been allocated
(GTT or VRAM), the existing entrypoints aren't dropped and the sparse
bit is derived from VK_ADDRESS_COMMAND_FULLY_BOUND_BIT_KHR.

It would be nice to figure out if the CP DMA vs compute heuristic for
GTT BOs on dGPUs could be removed to simplify this implementation.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40386>
 2026-03-27 16:17:02 +00:00
Samuel Pitoiset
479a992b02 radv: replace radv_copy_flags by VkAddressCopyFlagsKHR 
Same meaning.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40386>
 2026-03-27 16:17:02 +00:00
Rhys Perry
3b52d61bb0 radv: don't copy radv_vertex_input_state in CmdSetVertexInputEXT 
This doubles vkoverhead's draw_16vattrib_change_dynamic performance.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40603>
 2026-03-27 13:38:29 +00:00
Samuel Pitoiset
eecb37962c radv/amdgpu: always return VK_ERROR_INVALID_EXTERNAL_HANDLE for host ptr imports
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Less confusing than VK_ERROR_UNKNOWN.

Related to https://gitlab.freedesktop.org/mesa/mesa/-/issues/15144.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40574>
 2026-03-27 07:07:31 +00:00
Georg Lehmann
bcdef7c79b radv: preserve fp_math_ctrl when lowering cmat alu ops 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40630>
 2026-03-26 13:15:50 +00:00
Samuel Pitoiset
c5619aec32 Revert "radv: remove adding a BO to the per-cmdbuf list when unnecessary"
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This breaks Gamescope because WSI BOs aren't added to the global BO
list because this might affect implicit sync. Let's revert this commit
for now until I found a better solution.

This reverts commit 9f224289b0.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40602>
 2026-03-25 07:27:08 +00:00
Faith Ekstrand
3ea2e51c8b treewide: Enable lowering of primitive ID in a bunch of Vulkan drivers 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Mary Guillemard <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40512>
 2026-03-25 03:11:56 +00:00
Daniel Schürmann
218be90084 radv: call nir_opt_if late again 
Totals from 1715 (1.22% of 140074) affected shaders:

Instrs: 1086964 -> 1079896 (-0.65%); split: -0.65%, +0.00%
CodeSize: 5600856 -> 5554620 (-0.83%); split: -0.84%, +0.02%
VGPRs: 95868 -> 95976 (+0.11%)
Latency: 4005981 -> 3992353 (-0.34%); split: -0.38%, +0.04%
InvThroughput: 682121 -> 682071 (-0.01%); split: -0.11%, +0.10%
VClause: 19117 -> 19093 (-0.13%); split: -0.15%, +0.02%
SClause: 17075 -> 17040 (-0.20%); split: -0.21%, +0.01%
Copies: 101031 -> 98193 (-2.81%); split: -2.87%, +0.07%
Branches: 24106 -> 24011 (-0.39%); split: -0.43%, +0.03%
PreSGPRs: 67254 -> 66797 (-0.68%); split: -0.70%, +0.02%
PreVGPRs: 71827 -> 71830 (+0.00%)
VALU: 571206 -> 570516 (-0.12%); split: -0.12%, +0.00%
SALU: 180525 -> 177146 (-1.87%); split: -1.90%, +0.03%
VMEM: 34030 -> 34010 (-0.06%)
SMEM: 27669 -> 27622 (-0.17%)
VOPD: 4485 -> 4481 (-0.09%); split: +0.04%, -0.13%
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40453>
 2026-03-23 21:24:40 +00:00
Samuel Pitoiset
23e34532bd radv: cleanup redundant radv_image_has_hiz_metadata() checks 
All callers check that already.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40176>
 2026-03-23 15:33:26 +00:00
Samuel Pitoiset
fbcc4565c1 radv: fix a perf issue when clearing depth/stencil images on GFX12 
Clearing on graphics updates HiZ correctly and expanding it always
after the clear might hurt because it means HiZ will be disabled.

This probably helps performance with the full GFX12 HiZ WA.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40176>
 2026-03-23 15:33:26 +00:00
Samuel Pitoiset
cea75b3d95 radv: only consider HiZ as valid after clears with the depth aspect 
If it's a stencil-only clear it shouldn't be marked as valid because
HiZ wasn't updated by the clear.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40176>
 2026-03-23 15:33:25 +00:00
Samuel Pitoiset
8b993f46f5 radv: ignore the GFX12 HiZ WA for internal blits 
To update HiZ properly during depth/stencil clears. There is a risk
but it's very minimal and it's also much better for performance.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40176>
 2026-03-23 15:33:25 +00:00
kingstom.chen
5a7f4c62d8 radv/rt: only run move_rt_instructions() for CPS shaders 
move_rt_instructions() only makes sense for CPS recursive shaders, where
later rt_trace_ray calls can overwrite the current shader's RT system
values.

Running it on the function-call path can hoist load_hit_attrib_amd
above merged intersection writes, which corrupts any-hit
hitAttributeEXT. Move the pass into the existing CPS-only
non-intersection branch before nir_lower_shader_calls().

Fixes: c5d796c902 ("radv/rt: Use function call structure in NIR lowering")
Closes: #15074

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40531>
 2026-03-23 11:24:07 +00:00
Samuel Pitoiset
9f224289b0 radv: remove adding a BO to the per-cmdbuf list when unnecessary
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All BOs allocated from vkAllocateMemory are either local BOs or added
to the global BO list. Only BOs allocated internally should be added
to the per-cmdbuf list.

Verified this by doing a full CTS run with amdgpu.debug=0x1.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40466>
 2026-03-23 09:50:41 +00:00
Samuel Pitoiset
fb195bd6bd radv/amdgpu: remove the virtual BOs tracking logic 
All BOs allocated by applications are local BOs, so this can be
removed completely.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40466>
 2026-03-23 09:50:41 +00:00
Samuel Pitoiset
2cf84eedb9 radv: stop allocating an array of BO for descriptors 
They are no longer added to the per cmdbuf BO list.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40466>
 2026-03-23 09:50:41 +00:00
Samuel Pitoiset
375c82a27e radv: cleanup functions that writes descriptors 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40466>
 2026-03-23 09:50:41 +00:00
Samuel Pitoiset
b24c18667d radv: remove radv_device::use_global_bo_list 
This is always TRUE now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40466>
 2026-03-23 09:50:40 +00:00
Samuel Pitoiset
09f83982e2 radv: stop allowing users to disable the global BO list 
The global BO list for app allocations has been enabled by default
since Mesa 25.3 and we didn't find any blockers, so let's make it the
default for real. Note that vkd3d-proton and Zink always used that
path and DXVK started to use it in August 2025 after requiring BDA.

This removes RADV_DEBUG=nobolist which was added only for debugging
purposes since the global BO list was enabled by default for app
allocations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40466>
 2026-03-23 09:50:40 +00:00
Samuel Pitoiset
57e2b272d5 radv: emit PFP_SYNC_ME right after STRMOUT_BUFFER_UPDATE is emitted 
This is likely less frequent than the draws, and it's only needed
when the VA is used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40341>
 2026-03-23 08:40:23 +00:00
Samuel Pitoiset
a0471ddad8 radv: update color/ds clear metadata in ME 
It's probably sligthly better because loading the clear registers
is likely more frequent than updating them.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40341>
 2026-03-23 08:40:23 +00:00
Samuel Pitoiset
fd019c24e9 radv: remove useless PFP_SYNC_ME when loading color/ds metadata on GFX6-7 
WRITE_DATA is emitted in PFP and the COPY_DATA in ME, so this shouldn't
be necessary.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40341>
 2026-03-23 08:40:23 +00:00
Samuel Pitoiset
2751a427e1 radv: use LOAD_CONTEXT_REG_INDEX when supported for streamout 
It's supported on GFX9+ and on GFX8+ with a specific fw version. It's
more correct with preemption.

Also rewrite the comment now that we got more information from Marek.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40341>
 2026-03-23 08:40:22 +00:00
Marek Olšák
fa5175023b Final rename of sha1 names to blake3 
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383>
 2026-03-23 07:03:28 +00:00
Marek Olšák
ae9ea27e0d Rename *_sha1 names to *_blake3 
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383>
 2026-03-23 07:03:28 +00:00
Marek Olšák
102d41799b Rename more sha and sha1 names to blake3 
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383>
 2026-03-23 07:03:28 +00:00
Marek Olšák
c0ac992a2a Remove mesa-sha1.h 
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383>
 2026-03-23 07:03:27 +00:00
Marek Olšák
53c64973e8 Inline _mesa_sha1_compute/format, remove the other unused ones 
_mesa_sha1_format has a few remaining uses, so it's moved to build_id.c,
which is its last user.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383>
 2026-03-23 07:03:27 +00:00
Marek Olšák
699f9d7066 Inline _mesa_sha1_init/update/final functions 
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383>
 2026-03-23 07:03:27 +00:00
Marek Olšák
3ae8f910ad Inline SHA1* functions, remove sha1.h 
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383>
 2026-03-23 07:03:27 +00:00
Marek Olšák
a965ada6ee Inline mesa_sha1, SHA1_CTX 
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383>
 2026-03-23 07:03:27 +00:00
Marek Olšák
0da88d237a Inline SHA1_DIGEST_STRING_LENGTH 
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383>
 2026-03-23 07:03:27 +00:00
Marek Olšák
110632f702 Inline SHA1_DIGEST_LENGTH 
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40383>
 2026-03-23 07:03:27 +00:00
Daniel Schürmann
058d15fa11 radv/dgc: add and lower loop continue construct 
We are going to disallow continue statements without
loop continue constructs.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39942>
 2026-03-21 07:42:55 +00:00
Daniel Schürmann
2d73dd15d6 radv/rt: add and lower loop continue construct in traversal shaders 
We are going to disallow continue statements without
loop continue constructs.

Totals from 58 (0.07% of 84369) affected shaders: (Navi21)
Instrs: 2320937 -> 2318938 (-0.09%)
CodeSize: 12554896 -> 12546892 (-0.06%); split: -0.06%, +0.00%
SpillSGPRs: 116 -> 102 (-12.07%)
SpillVGPRs: 2648 -> 2627 (-0.79%)
Latency: 13440088 -> 13424694 (-0.11%)
InvThroughput: 3262579 -> 3259088 (-0.11%)
VClause: 69628 -> 69666 (+0.05%)
SClause: 51528 -> 51519 (-0.02%)
Copies: 203958 -> 203478 (-0.24%); split: -0.29%, +0.05%
Branches: 70777 -> 70400 (-0.53%)
PreSGPRs: 4768 -> 4660 (-2.27%)
VALU: 1537105 -> 1536899 (-0.01%); split: -0.02%, +0.01%
SALU: 340938 -> 339623 (-0.39%)
VMEM: 120339 -> 120286 (-0.04%)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/39942>
 2026-03-21 07:42:55 +00:00