fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-06-06 10:38:17 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

ac: Update FW required for variable slice mode
Some checks are pending
macOS-CI / macOS-CI (dri) (push) Waiting to run
Details
macOS-CI / macOS-CI (xlib) (push) Waiting to run
Details

Browse source 
There are some compatiblity issues with variable slice mode and
preencode that are fixed with newer FW.

Fixes: d9ba641e28 ("ac: Add variable slice mode interface")
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/40604>
This commit is contained in:
Benjamin Cheng 2026-03-24 07:40:17 -04:00 • committed by Marge Bot
parent bb6d57c90d
commit 917dff0b22
4 changed files with 21 additions and 11 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

20
src/amd/common/ac_vcn_enc.c
View file

@ -136,12 +136,20 @@ void ac_vcn_enc_init_cmds(rvcn_enc_cmd_t *cmd, enum vcn_version version)
}
bool
ac_vcn_enc_variable_slice_mode_supported(const struct radeon_info *info)
ac_vcn_enc_variable_slice_mode_supported(const struct radeon_info *info, bool preencode)
{
if (info->vcn_ip_version >= VCN_5_0_0)
return info->vcn_enc_minor_version >= 11;
else if (info->vcn_ip_version >= VCN_4_0_0)
return info->vcn_enc_minor_version >= 24;
else
if (info->vcn_ip_version >= VCN_5_0_0) {
if (preencode)
return info->vcn_enc_minor_version > 12 ||
(info->vcn_enc_minor_version == 12 && info->vcn_fw_revision >= 0xA);
else
return info->vcn_enc_minor_version >= 11;
} else if (info->vcn_ip_version >= VCN_4_0_0) {
if (preencode)
return info->vcn_enc_minor_version > 24 ||
(info->vcn_enc_minor_version == 24 && info->vcn_fw_revision >= 0x23);
else
return info->vcn_enc_minor_version >= 24;
} else
return false;
}

2
src/amd/common/ac_vcn_enc.h
View file

@ -779,6 +779,6 @@ typedef struct rvcn_enc_hevc_slice_info_var_s
} rvcn_enc_hevc_slice_info_var_t;
void ac_vcn_enc_init_cmds(rvcn_enc_cmd_t *cmd, enum vcn_version version);
bool ac_vcn_enc_variable_slice_mode_supported(const struct radeon_info *info);
bool ac_vcn_enc_variable_slice_mode_supported(const struct radeon_info *info, bool preencode);
#endif

4
src/amd/vulkan/radv_video_enc.c
View file

@ -611,7 +611,7 @@ radv_enc_slice_control(struct radv_cmd_buffer *cmd_buffer, const struct VkVideoE
uint32_t slice_control_mode = RENCODE_H264_SLICE_CONTROL_MODE_FIXED_MBS;
if (ac_vcn_enc_variable_slice_mode_supported(&pdev->info) &&
if (ac_vcn_enc_variable_slice_mode_supported(&pdev->info, false) &&
h264_picture_info->naluSliceEntryCount <= RENCODE_MAX_NUM_SLICES) {
uint32_t last_mb = 0;
slice_control_mode = RENCODE_H264_SLICE_CONTROL_MODE_VARIABLE_MBS;
@ -718,7 +718,7 @@ radv_enc_slice_control_hevc(struct radv_cmd_buffer *cmd_buffer, const struct VkV
num_ctbs_in_slice = DIV_ROUND_UP(width_in_ctb * height_in_ctb, h265_picture_info->naluSliceSegmentEntryCount);
uint32_t slice_control_mode = RENCODE_HEVC_SLICE_CONTROL_MODE_FIXED_CTBS;
if (ac_vcn_enc_variable_slice_mode_supported(&pdev->info) &&
if (ac_vcn_enc_variable_slice_mode_supported(&pdev->info, false) &&
h265_picture_info->naluSliceSegmentEntryCount <= RENCODE_MAX_NUM_SLICES) {
uint32_t last_ctb = 0;
slice_control_mode = RENCODE_HEVC_SLICE_CONTROL_MODE_VARIABLE_CTBS;

6
src/gallium/drivers/radeonsi/radeon_vcn_enc.c
View file

@ -435,7 +435,8 @@ static void radeon_vcn_enc_h264_get_slice_ctrl_param(struct radeon_encoder *enc,
enc->enc_pic.slice_ctrl.slice_control_mode = RENCODE_H264_SLICE_CONTROL_MODE_FIXED_MBS;
enc->enc_pic.slice_ctrl.num_mbs_per_slice = num_mbs_in_slice;
if (ac_vcn_enc_variable_slice_mode_supported(&((struct si_screen *)enc->screen)->info) &&
if (ac_vcn_enc_variable_slice_mode_supported(&((struct si_screen *)enc->screen)->info,
enc->enc_pic.quality_modes.pre_encode_mode) &&
pic->num_slice_descriptors <= RENCODE_MAX_NUM_SLICES)
{
enc->enc_pic.slice_ctrl.slice_control_mode = RENCODE_H264_SLICE_CONTROL_MODE_VARIABLE_MBS;
@ -833,7 +834,8 @@ static void radeon_vcn_enc_hevc_get_slice_ctrl_param(struct radeon_encoder *enc,
enc->enc_pic.hevc_slice_ctrl.fixed_ctbs_per_slice.num_ctbs_per_slice_segment =
num_ctbs_in_slice;
if (ac_vcn_enc_variable_slice_mode_supported(&((struct si_screen *)enc->screen)->info) &&
if (ac_vcn_enc_variable_slice_mode_supported(&((struct si_screen *)enc->screen)->info,
enc->enc_pic.quality_modes.pre_encode_mode) &&
pic->num_slice_descriptors <= RENCODE_MAX_NUM_SLICES)
{
enc->enc_pic.hevc_slice_ctrl.slice_control_mode = RENCODE_HEVC_SLICE_CONTROL_MODE_VARIABLE_CTBS;